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MdePkg/Register/Amd: Define all bits from MSR_SEV_STATUS_REGISTER
For now we need DebugSwap but others are likely to be needed too. Cc: Liming Gao <gaoliming@byosoft.com.cn> Cc: Michael D Kinney <michael.d.kinney@intel.com> Cc: Zhiguang Liu <zhiguang.liu@intel.com> Reviewed-by: Tom Lendacky <thomas.lendacky@amd.com> Signed-off-by: Alexey Kardashevskiy <aik@amd.com> Changes: v5: * "rb" from Tom v4: * added more from April/2024 APM
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@ -126,19 +126,106 @@ typedef union {
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///
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/// [Bit 0] Secure Encrypted Virtualization (Sev) is enabled
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///
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UINT32 SevBit : 1;
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UINT32 SevBit : 1;
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///
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/// [Bit 1] Secure Encrypted Virtualization Encrypted State (SevEs) is enabled
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///
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UINT32 SevEsBit : 1;
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UINT32 SevEsBit : 1;
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///
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/// [Bit 2] Secure Nested Paging (SevSnp) is enabled
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///
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UINT32 SevSnpBit : 1;
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UINT32 SevSnpBit : 1;
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UINT32 Reserved2 : 29;
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///
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/// [Bit 3] Virtual TOM feature is enabled in SEV_FEATURES[1]
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///
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UINT32 vTOM : 1;
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///
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/// [Bit 4] ReflectVC feature is enabled in SEV_FEATURES[2]
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///
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UINT32 ReflectVC : 1;
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///
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/// [Bit 5] Restricted Injection feature is enabled in SEV_FEATURES[3]
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///
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UINT32 RestrictedInjection : 1;
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///
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/// [Bit 6] Alternate Injection feature is enabled in SEV_FEATURES[4]
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///
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UINT32 AlternateInjection : 1;
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///
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/// [Bit 7] Debug Virtualization feature is enabled in SEV_FEATURES[5]
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///
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UINT32 DebugVirtualization : 1;
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///
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/// [Bit 8] PreventHostIBS feature is enabled in SEV_FEATURES[6]
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///
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UINT32 PreventHostIBS : 1;
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///
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/// [Bit 9] BTB isolation feature is enabled in SEV_FEATURES[7]
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///
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UINT32 SNPBTBIsolation : 1;
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///
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/// [Bit 10] VMPL SSS feature is enabled in SEV_FEATURES[8]
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///
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UINT32 VmplSSS : 1;
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///
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/// [Bit 11] Secure TSC feature is enabled in SEV_FEATURES[9]
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///
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UINT32 SecureTsc : 1;
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///
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/// [Bit 12] VMGEXIT Parameter feature is enabled in SEV_FEATURES[10]
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///
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UINT32 VmgexitParameter : 1;
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///
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/// [Bit 13] PMC Virtualization feature is enabled in SEV_FEATURES[11]
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///
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UINT32 PmcVirtualization : 1;
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///
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/// [Bit 14] IBS Virtualization feature is enabled in SEV_FEATURES[12]
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///
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UINT32 IbsVirtualization : 1;
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///
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/// [Bit 15]
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///
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UINT32 Reserved1 : 1;
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///
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/// [Bit 16] VMSA Register Protection feature is enabled in SEV_FEATURES[14]
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///
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UINT32 VmsaRegProt : 1;
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///
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/// [Bit 17] SMT Protection feature is enabled in SEV_FEATURES[15]
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///
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UINT32 SmtProtection : 1;
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///
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///
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/// [Bit 18] Secure AVIC feature is enabled in SEV_FEATURES[16]
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///
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UINT32 SecureAVIC : 1;
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UINT32 Reserved2 : 4;
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///
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/// [Bit 23] IBPB on Entry feature is enabled in SEV_FEATURES[21]
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///
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UINT32 IbpbOnEntry : 1;
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UINT32 Reserved3 : 8;
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} Bits;
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///
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/// All bit fields as a 32-bit value
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