mirror of https://github.com/acidanthera/audk.git
ArmPkg: merge ArmGicV[23]Lib.h into ArmGicLib.h
Before splitting off ArmGicArchLib and moving it out of ArmPkg/Drivers/ArmGic into ArmPkg/Library, make sure that the GIC specific declarations it depends on are not hidden away in local headers "GicV2/GicV2Lib.h" and "GicV3/GicV3Lib.h". So merge them with <Library/ArmGicLib.h>. This is entirely appropriate, since this is not a header that declares a public interface into ArmGicLib, but defines implementation internals. Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Ard Biesheuvel <ard.biesheuvel@linaro.org> Reviewed-by: Laszlo Ersek <lersek@redhat.com> Reviewed-by: Leif Lindholm <leif.lindholm@linaro.org> Tested-by: Leif Lindholm <leif.lindholm@linaro.org> git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@18097 6f19259b-4bc3-4df7-8a09-765794883524
This commit is contained in:
Ard Biesheuvel
abiesheuvel
parent
983fffd431
commit
bce29e3059
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@ -15,8 +15,6 @@
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#include <Library/ArmLib.h>
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#include <Library/ArmGicLib.h>
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#include "GicV3/ArmGicV3Lib.h"
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ARM_GIC_ARCH_REVISION
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EFIAPI
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ArmGicGetSupportedArchRevision (
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@ -15,8 +15,6 @@
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#include <Library/ArmLib.h>
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#include <Library/ArmGicLib.h>
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#include "GicV3/ArmGicV3Lib.h"
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ARM_GIC_ARCH_REVISION
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EFIAPI
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ArmGicGetSupportedArchRevision (
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@ -19,9 +19,6 @@
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#include <Library/IoLib.h>
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#include <Library/PcdLib.h>
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#include "GicV2/ArmGicV2Lib.h"
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#include "GicV3/ArmGicV3Lib.h"
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/**
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* Return the base address of the GIC redistributor for the current CPU
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*
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@ -17,8 +17,6 @@
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#include <Library/IoLib.h>
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#include <Library/ArmGicLib.h>
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#include "GicV2/ArmGicV2Lib.h"
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/*
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* This function configures the interrupts set by the mask to be secure.
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*
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@ -22,8 +22,9 @@ Abstract:
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--*/
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#include <Library/ArmGicLib.h>
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#include "ArmGicDxe.h"
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#include "GicV2/ArmGicV2Lib.h"
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#define ARM_GIC_DEFAULT_PRIORITY 0x80
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@ -1,54 +0,0 @@
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/** @file
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*
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* Copyright (c) 2013-2014, ARM Limited. All rights reserved.
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*
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* This program and the accompanying materials
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* are licensed and made available under the terms and conditions of the BSD License
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* which accompanies this distribution. The full text of the license may be found at
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* http://opensource.org/licenses/bsd-license.php
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*
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* THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
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* WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
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*
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**/
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#ifndef _ARM_GIC_V2_H_
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#define _ARM_GIC_V2_H_
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// Interrupts from 1020 to 1023 are considered as special interrupts (eg: spurious interrupts)
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#define ARM_GIC_IS_SPECIAL_INTERRUPTS(Interrupt) (((Interrupt) >= 1020) && ((Interrupt) <= 1023))
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VOID
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EFIAPI
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ArmGicV2SetupNonSecure (
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IN UINTN MpId,
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IN INTN GicDistributorBase,
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IN INTN GicInterruptInterfaceBase
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);
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VOID
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EFIAPI
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ArmGicV2EnableInterruptInterface (
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IN INTN GicInterruptInterfaceBase
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);
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VOID
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EFIAPI
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ArmGicV2DisableInterruptInterface (
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IN INTN GicInterruptInterfaceBase
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);
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UINTN
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EFIAPI
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ArmGicV2AcknowledgeInterrupt (
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IN UINTN GicInterruptInterfaceBase
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);
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VOID
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EFIAPI
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ArmGicV2EndOfInterrupt (
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IN UINTN GicInterruptInterfaceBase,
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IN UINTN Source
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);
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#endif
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@ -12,8 +12,9 @@
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*
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**/
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#include <Library/ArmGicLib.h>
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#include "ArmGicDxe.h"
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#include "GicV3/ArmGicV3Lib.h"
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#define ARM_GIC_DEFAULT_PRIORITY 0x80
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@ -1,68 +0,0 @@
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/** @file
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*
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* Copyright (c) 2014-2015, ARM Limited. All rights reserved.
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*
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* This program and the accompanying materials are licensed and made available
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* under the terms and conditions of the BSD License which accompanies this
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* distribution. The full text of the license may be found at
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* http://opensource.org/licenses/bsd-license.php
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*
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* THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
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* WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
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*
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**/
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#ifndef _ARM_GIC_V3_H_
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#define _ARM_GIC_V3_H_
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#define ICC_SRE_EL2_SRE (1 << 0)
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#define ARM_GICD_IROUTER_IRM BIT31
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UINT32
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EFIAPI
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ArmGicV3GetControlSystemRegisterEnable (
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VOID
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);
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VOID
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EFIAPI
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ArmGicV3SetControlSystemRegisterEnable (
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IN UINT32 ControlSystemRegisterEnable
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);
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VOID
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EFIAPI
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ArmGicV3EnableInterruptInterface (
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VOID
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);
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VOID
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EFIAPI
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ArmGicV3DisableInterruptInterface (
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VOID
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);
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UINTN
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EFIAPI
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ArmGicV3AcknowledgeInterrupt (
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VOID
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);
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VOID
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EFIAPI
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ArmGicV3EndOfInterrupt (
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IN UINTN Source
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);
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VOID
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ArmGicV3SetBinaryPointer (
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IN UINTN BinaryPoint
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);
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VOID
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ArmGicV3SetPriorityMask (
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IN UINTN Priority
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);
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#endif
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@ -231,4 +231,98 @@ ArmGicIsInterruptEnabled (
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IN UINTN Source
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);
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//
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// GIC revision 2 specific declarations
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//
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// Interrupts from 1020 to 1023 are considered as special interrupts (eg: spurious interrupts)
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#define ARM_GIC_IS_SPECIAL_INTERRUPTS(Interrupt) (((Interrupt) >= 1020) && ((Interrupt) <= 1023))
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VOID
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EFIAPI
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ArmGicV2SetupNonSecure (
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IN UINTN MpId,
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IN INTN GicDistributorBase,
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IN INTN GicInterruptInterfaceBase
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);
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VOID
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EFIAPI
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ArmGicV2EnableInterruptInterface (
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IN INTN GicInterruptInterfaceBase
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);
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VOID
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EFIAPI
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ArmGicV2DisableInterruptInterface (
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IN INTN GicInterruptInterfaceBase
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);
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UINTN
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EFIAPI
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ArmGicV2AcknowledgeInterrupt (
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IN UINTN GicInterruptInterfaceBase
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);
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VOID
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EFIAPI
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ArmGicV2EndOfInterrupt (
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IN UINTN GicInterruptInterfaceBase,
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IN UINTN Source
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);
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//
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// GIC revision 3 specific declarations
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//
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#define ICC_SRE_EL2_SRE (1 << 0)
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#define ARM_GICD_IROUTER_IRM BIT31
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UINT32
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EFIAPI
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ArmGicV3GetControlSystemRegisterEnable (
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VOID
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);
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VOID
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EFIAPI
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ArmGicV3SetControlSystemRegisterEnable (
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IN UINT32 ControlSystemRegisterEnable
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);
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VOID
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EFIAPI
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ArmGicV3EnableInterruptInterface (
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VOID
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);
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VOID
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EFIAPI
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ArmGicV3DisableInterruptInterface (
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VOID
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);
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UINTN
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EFIAPI
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ArmGicV3AcknowledgeInterrupt (
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VOID
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);
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VOID
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EFIAPI
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ArmGicV3EndOfInterrupt (
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IN UINTN Source
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);
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VOID
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ArmGicV3SetBinaryPointer (
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IN UINTN BinaryPoint
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);
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VOID
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ArmGicV3SetPriorityMask (
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IN UINTN Priority
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);
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#endif
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