mirror of https://github.com/acidanthera/audk.git
Add support for ARM MOVW/MOVT instructions that were added in the latest PE/COFF specification. Currently they are not hooked in as we need to wait for the tools to get updated. Tools are needed to convert ELF to PE/COFF and to refixup FVs.
git-svn-id: https://edk2.svn.sourceforge.net/svnroot/edk2/trunk/edk2@11176 6f19259b-4bc3-4df7-8a09-765794883524
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andrewfish
parent
70b356a9ff
commit
bcec20df61
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@ -2,7 +2,7 @@
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Specific relocation fixups for ARM architecture.
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Copyright (c) 2006 - 2009, Intel Corporation. All rights reserved.<BR>
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Portions copyright (c) 2008 - 2009, Apple Inc. All rights reserved.<BR>
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Portions copyright (c) 2008 - 2010, Apple Inc. All rights reserved.<BR>
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This program and the accompanying materials
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are licensed and made available under the terms and conditions of the BSD License
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which accompanies this distribution. The full text of the license may be found at
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@ -14,8 +14,120 @@
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**/
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#include "BasePeCoffLibInternals.h"
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#include <Library/BaseLib.h>
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/**
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Pass in a pointer to an ARM MOVT or MOVW immediate instruciton and
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return the immediate data encoded in the instruction
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@param Instruction Pointer to ARM MOVT or MOVW immediate instruction
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@return Immediate address encoded in the instruction
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**/
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UINT16
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ThumbMovtImmediateAddress (
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IN UINT16 *Instruction
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)
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{
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UINT32 Movt;
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UINT16 Address;
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// Thumb2 is two 16-bit instructions working together. Not a single 32-bit instruction
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// Example MOVT R0, #0 is 0x0000f2c0 or 0xf2c0 0x0000
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Movt = (*Instruction << 16) | (*(Instruction + 1));
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// imm16 = imm4:i:imm3:imm8
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// imm4 -> Bit19:Bit16
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// i -> Bit26
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// imm3 -> Bit14:Bit12
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// imm8 -> Bit7:Bit0
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Address = (UINT16)(Movt & 0x000000ff); // imm8
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Address |= (UINT16)((Movt >> 4) & 0x0000f700); // imm4 imm3
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Address |= ((Movt & BIT26) ? BIT11 : 0); // i
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return Address;
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}
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/**
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Update an ARM MOVT or MOVW immediate instruction immediate data.
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@param Instruction Pointer to ARM MOVT or MOVW immediate instruction
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@param Address New addres to patch into the instruction
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**/
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VOID
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ThumbMovtImmediatePatch (
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IN OUT UINT16 *Instruction,
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IN UINT16 Address
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)
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{
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UINT16 Patch;
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// First 16-bit chunk of instruciton
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Patch = ((Address >> 12) & 0x000f); // imm4
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Patch |= (((Address & BIT11) != 0) ? BIT10 : 0); // i
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// Mask out instruction bits and or in address
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*(Instruction) = (*Instruction & ~0x040f) | Patch;
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// Second 16-bit chunk of instruction
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Patch = Address & 0x000000ff; // imm8
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Patch |= ((Address << 4) & 0x00007000); // imm3
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// Mask out instruction bits and or in address
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Instruction++;
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*Instruction = (*Instruction & ~0x70ff) | Patch;
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}
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/**
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Pass in a pointer to an ARM MOVW/MOVT instruciton pair and
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return the immediate data encoded in the two` instruction
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@param Instructions Pointer to ARM MOVW/MOVT insturction pair
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@return Immediate address encoded in the instructions
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**/
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UINT32
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ThumbMovwMovtImmediateAddress (
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IN UINT16 *Instructions
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)
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{
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UINT16 *Word;
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UINT16 *Top;
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Word = Instructions; // MOVW
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Top = Word + 2; // MOVT
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return (ThumbMovtImmediateAddress (Top) << 16) + ThumbMovtImmediateAddress (Word);
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}
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/**
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Update an ARM MOVW/MOVT immediate instruction instruction pair.
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@param Instructions Pointer to ARM MOVW/MOVT instruction pair
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@param Address New addres to patch into the instructions
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**/
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VOID
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ThumbMovwMovtImmediatePatch (
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IN OUT UINT16 *Instructions,
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IN UINT32 Address
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)
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{
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UINT16 *Word;
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UINT16 *Top;
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Word = Instructions; // MOVW
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Top = Word + 2; // MOVT
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ThumbMovtImmediatePatch (Word, (UINT16)(Address & 0xffff));
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ThumbMovtImmediatePatch (Top, (UINT16)(Address >> 16));
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}
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/**
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Performs an ARM-based specific relocation fixup and is a no-op on other
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instruction sets.
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@ -36,7 +148,33 @@ PeCoffLoaderRelocateImageEx (
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IN UINT64 Adjust
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)
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{
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return RETURN_UNSUPPORTED;
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UINT16 *Fixup16;
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UINT32 FixupVal;
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Fixup16 = (UINT16 *) Fixup;
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switch ((*Reloc) >> 12) {
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case EFI_IMAGE_REL_BASED_ARM_MOV32T:
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FixupVal = ThumbMovwMovtImmediateAddress (Fixup16) + (UINT32)Adjust;
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ThumbMovwMovtImmediatePatch (Fixup16, FixupVal);
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if (*FixupData != NULL) {
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*FixupData = ALIGN_POINTER(*FixupData, sizeof(UINT64));
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// Fixup16 is not aligned so we must copy it. Thumb instructions are streams of 16 bytes.
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CopyMem (*FixupData, Fixup16, sizeof (UINT64));
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*FixupData = *FixupData + sizeof(UINT64);
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}
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break;
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case EFI_IMAGE_REL_BASED_ARM_MOV32A:
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ASSERT (FALSE);
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// break omitted - ARM instruction encoding not implemented
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default:
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return RETURN_UNSUPPORTED;
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}
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return RETURN_SUCCESS;
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}
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/**
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@ -45,8 +183,6 @@ PeCoffLoaderRelocateImageEx (
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loading and relocating of the image type. It's up to the caller to support
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the entry point.
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The IA32/X64 version PE/COFF loader/relocater both support IA32, X64 and EBC images.
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@param Machine Machine type from the PE Header.
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@return TRUE if this PE/COFF loader can load the image
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@ -85,6 +221,29 @@ PeHotRelocateImageEx (
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IN UINT64 Adjust
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)
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{
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return RETURN_UNSUPPORTED;
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UINT16 *Fixup16;
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UINT32 FixupVal;
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Fixup16 = (UINT16 *)Fixup;
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switch ((*Reloc) >> 12) {
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case EFI_IMAGE_REL_BASED_ARM_MOV32T:
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*FixupData = ALIGN_POINTER (*FixupData, sizeof (UINT64));
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if (*(UINT64 *) (*FixupData) == ReadUnaligned64 ((UINT64 *)Fixup16)) {
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FixupVal = ThumbMovwMovtImmediateAddress (Fixup16) + (UINT32)Adjust;
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ThumbMovwMovtImmediatePatch (Fixup16, FixupVal);
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}
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break;
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case EFI_IMAGE_REL_BASED_ARM_MOV32A:
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ASSERT (FALSE);
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// break omitted - ARM instruction encoding not implemented
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default:
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DEBUG ((EFI_D_ERROR, "PeHotRelocateEx:unknown fixed type\n"));
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return RETURN_UNSUPPORTED;
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}
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return RETURN_SUCCESS;
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}
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