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OvmfPkg/Microvm/pcie: mPhysMemAddressWidth tweak 

microvm places the 64bit mmio space at the end of the physical address
space.  So mPhysMemAddressWidth must be correct, otherwise the pci host
bridge setup throws an error because it thinks the 64bit mmio window is
not addressable.

On microvm we can simply use standard cpuid to figure the address width
because the host-phys-bits option (-cpu ${name},host-phys-bits=on) is
forced to be enabled.  Side note: For 'pc' and 'q35' this is not the
case for backward compatibility reasons.

Signed-off-by: Gerd Hoffmann <kraxel@redhat.com>
This commit is contained in:
Gerd Hoffmann 2022-06-02 10:42:15 +02:00 committed by mergify[bot]
parent ad3bafa7d5
commit bd10d4e201
2 changed files with 42 additions and 1 deletions
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41
OvmfPkg/Library/PlatformInitLib/MemDetect.c
View File

@ -491,6 +491,42 @@ PlatformGetFirstNonAddress (
return FirstNonAddress;
}
/*
* Use CPUID to figure physical address width. Does *not* work
* reliable on qemu. For historical reasons qemu returns phys-bits=40
* even in case the host machine supports less than that.
*
* qemu has a cpu property (host-phys-bits={on,off}) to change that
* and make sure guest phys-bits are not larger than host phys-bits.,
* but it is off by default. Exception: microvm machine type
* hard-wires that property to on.
*/
VOID
EFIAPI
PlatformAddressWidthFromCpuid (
IN OUT EFI_HOB_PLATFORM_INFO *PlatformInfoHob
)
{
UINT32 RegEax;
AsmCpuid (0x80000000, &RegEax, NULL, NULL, NULL);
if (RegEax >= 0x80000008) {
AsmCpuid (0x80000008, &RegEax, NULL, NULL, NULL);
PlatformInfoHob->PhysMemAddressWidth = (UINT8)RegEax;
} else {
PlatformInfoHob->PhysMemAddressWidth = 36;
}
PlatformInfoHob->FirstNonAddress = LShiftU64 (1, PlatformInfoHob->PhysMemAddressWidth);
DEBUG ((
DEBUG_INFO,
"%a: cpuid: phys-bits is %d\n",
__FUNCTION__,
PlatformInfoHob->PhysMemAddressWidth
));
}
/**
Initialize the PhysMemAddressWidth field in PlatformInfoHob based on guest RAM size.
**/
@ -503,6 +539,11 @@ PlatformAddressWidthInitialization (
UINT64 FirstNonAddress;
UINT8 PhysMemAddressWidth;
if (PlatformInfoHob->HostBridgeDevId == 0xffff /* microvm */) {
PlatformAddressWidthFromCpuid (PlatformInfoHob);
return;
}
//
// As guest-physical memory size grows, the permanent PEI RAM requirements
// are dominated by the identity-mapping page tables built by the DXE IPL.

2
OvmfPkg/PlatformPei/Platform.c
View File

@ -357,12 +357,12 @@ InitializePlatform (
S3Verification ();
BootModeInitialization (&mPlatformInfoHob);
AddressWidthInitialization (&mPlatformInfoHob);
//
// Query Host Bridge DID
//
mPlatformInfoHob.HostBridgeDevId = PciRead16 (OVMF_HOSTBRIDGE_DID);
AddressWidthInitialization (&mPlatformInfoHob);
MaxCpuCountInitialization (&mPlatformInfoHob);