mirror of https://github.com/acidanthera/audk.git
OvmfPkg/PlatformPei: Skip various items for S3 resume
We will not be running DXE on S3 resume, so we don't need to do these initialization items: * Reserve EMU Variable memory range * Declare Firmware volumes * Add memory HOBs v5: * Move MiscInitialization back to running on S3 resume Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Jordan Justen <jordan.l.justen@intel.com> Reviewed-by: Laszlo Ersek <lersek@redhat.com> git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@15295 6f19259b-4bc3-4df7-8a09-765794883524
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@ -147,18 +147,22 @@ QemuInitializeRam (
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LowerMemorySize = GetSystemMemorySizeBelow4gb ();
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LowerMemorySize = GetSystemMemorySizeBelow4gb ();
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UpperMemorySize = GetSystemMemorySizeAbove4gb ();
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UpperMemorySize = GetSystemMemorySizeAbove4gb ();
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//
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if (mBootMode != BOOT_ON_S3_RESUME) {
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// Create memory HOBs
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//
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//
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// Create memory HOBs
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AddMemoryRangeHob (BASE_1MB, LowerMemorySize);
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//
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AddMemoryRangeHob (0, BASE_512KB + BASE_128KB);
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AddMemoryRangeHob (BASE_1MB, LowerMemorySize);
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AddMemoryRangeHob (0, BASE_512KB + BASE_128KB);
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}
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MtrrSetMemoryAttribute (BASE_1MB, LowerMemorySize - BASE_1MB, CacheWriteBack);
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MtrrSetMemoryAttribute (BASE_1MB, LowerMemorySize - BASE_1MB, CacheWriteBack);
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MtrrSetMemoryAttribute (0, BASE_512KB + BASE_128KB, CacheWriteBack);
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MtrrSetMemoryAttribute (0, BASE_512KB + BASE_128KB, CacheWriteBack);
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if (UpperMemorySize != 0) {
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if (UpperMemorySize != 0) {
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AddUntestedMemoryBaseSizeHob (BASE_4GB, UpperMemorySize);
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if (mBootMode != BOOT_ON_S3_RESUME) {
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AddUntestedMemoryBaseSizeHob (BASE_4GB, UpperMemorySize);
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}
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MtrrSetMemoryAttribute (BASE_4GB, UpperMemorySize, CacheWriteBack);
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MtrrSetMemoryAttribute (BASE_4GB, UpperMemorySize, CacheWriteBack);
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}
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}
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@ -375,11 +375,13 @@ InitializePlatform (
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InitializeXen ();
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InitializeXen ();
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}
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}
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ReserveEmuVariableNvStore ();
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if (mBootMode != BOOT_ON_S3_RESUME) {
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ReserveEmuVariableNvStore ();
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PeiFvInitialization ();
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PeiFvInitialization ();
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MemMapInitialization ();
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MemMapInitialization ();
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}
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MiscInitialization ();
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MiscInitialization ();
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