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MdeModulePkg/SdMmcPciHcDxe: Add controller version defines
Add SDHCI controller defines, this is useful as the version in the register does not explictly map to a specification version. For example vesion 4.10 of the specification is version 0x04. https://bugzilla.tianocore.org/show_bug.cgi?id=1233 Contributed-under: TianoCore Contribution Agreement 1.1 Signed-off-by: Jeff Brasen <jbrasen@nvidia.com> Reviewed-by: Hao Wu <hao.a.wu@intel.com>
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@ -978,9 +978,9 @@ SdCardIdentification (
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return Status;
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}
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if ((ControllerVer & 0xFF) == 2) {
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if ((ControllerVer & 0xFF) == SD_MMC_HC_CTRL_VER_300) {
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S18r = TRUE;
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} else if (((ControllerVer & 0xFF) == 0) || ((ControllerVer & 0xFF) == 1)) {
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} else if (((ControllerVer & 0xFF) == SD_MMC_HC_CTRL_VER_100) || ((ControllerVer & 0xFF) == SD_MMC_HC_CTRL_VER_200)) {
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S18r = FALSE;
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} else {
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ASSERT (FALSE);
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@ -782,7 +782,7 @@ SdMmcHcClockSupply (
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//
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// Set SDCLK Frequency Select and Internal Clock Enable fields in Clock Control register.
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//
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if ((ControllerVer & 0xFF) == 2) {
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if ((ControllerVer & 0xFF) == SD_MMC_HC_CTRL_VER_300) {
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ASSERT (Divisor <= 0x3FF);
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ClockCtrl = ((Divisor & 0xFF) << 8) | ((Divisor & 0x300) >> 2);
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} else if (((ControllerVer & 0xFF) == 0) || ((ControllerVer & 0xFF) == 1)) {
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@ -135,6 +135,16 @@ typedef struct {
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UINT32 Hs400:1; // bit 63
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} SD_MMC_HC_SLOT_CAP;
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//
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// SD Host controller version
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//
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#define SD_MMC_HC_CTRL_VER_100 0x00
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#define SD_MMC_HC_CTRL_VER_200 0x01
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#define SD_MMC_HC_CTRL_VER_300 0x02
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#define SD_MMC_HC_CTRL_VER_400 0x03
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#define SD_MMC_HC_CTRL_VER_410 0x04
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#define SD_MMC_HC_CTRL_VER_420 0x05
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/**
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Dump the content of SD/MMC host controller's Capability Register.
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