mirror of https://github.com/acidanthera/audk.git
Add AsmEnableCache() and AsmDisableCache() as the IA32 & x64 specific BaseLib API.
git-svn-id: https://edk2.svn.sourceforge.net/svnroot/edk2/trunk/edk2@6807 6f19259b-4bc3-4df7-8a09-765794883524
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@ -5212,6 +5212,34 @@ AsmCpuidEx (
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);
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/**
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Set CD bit and clear NW bit of CR0 followed by a WBINVD.
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Disables the caches by setting the CD bit of CR0 to 1, clearing the NW bit of CR0 to 0,
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and executing a WBINVD instruction. This function is only available on IA-32 and x64.
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**/
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VOID
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EFIAPI
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AsmDisableCache (
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VOID
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);
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/**
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Perform a WBINVD and clear both the CD and NW bits of CR0.
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Enables the caches by executing a WBINVD instruction and then clear both the CD and NW
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bits of CR0 to 0. This function is only available on IA-32 and x64.
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**/
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VOID
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EFIAPI
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AsmEnableCache (
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VOID
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);
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/**
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Returns the lower 32-bits of a Machine Specific Register(MSR).
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@ -13,10 +13,10 @@
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**/
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/**
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Disables caches.
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Set CD bit and clear NW bit of CR0 followed by a WBINVD.
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Set the CD bit of CR0 to 1, clear the NW bit of CR0 to 0, and flush all caches with a
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WBINVD instruction.
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Disables the caches by setting the CD bit of CR0 to 1, clearing the NW bit of CR0 to 0,
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and executing a WBINVD instruction. This function is only available on IA-32 and x64.
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**/
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VOID
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@ -13,10 +13,10 @@
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**/
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/**
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Enabled caches.
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Perform a WBINVD and clear both the CD and NW bits of CR0.
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Flush all caches with a WBINVD instruction, clear the CD bit of CR0 to 0, and clear
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the NW bit of CR0 to 0
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Enables the caches by executing a WBINVD instruction and then clear both the CD and NW
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bits of CR0 to 0. This function is only available on IA-32 and x64.
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**/
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VOID
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