ArmPlatformPkg: Move PcdStandalone from Feature PCD to Fixed PCD

Feature PCDs cannot be used in assembly files.
The PcdStandalone PCD is needed in one of the assembly file of the
ArmPlatformPkg/PrePi module.



git-svn-id: https://edk2.svn.sourceforge.net/svnroot/edk2/trunk/edk2@11952 6f19259b-4bc3-4df7-8a09-765794883524
This commit is contained in:
oliviermartin 2011-07-01 14:21:12 +00:00
parent 4883513061
commit bf72cf3381
15 changed files with 26 additions and 26 deletions

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@ -39,13 +39,13 @@
gVariableRuntimeDxeFileGuid = { 0xcbd2e4d5, 0x7068, 0x4ff5, { 0xb4, 0x62, 0x98, 0x22, 0xb4, 0xad, 0x8d, 0x60 } }
[PcdsFeatureFlag.common]
gArmPlatformTokenSpaceGuid.PcdStandalone|FALSE|BOOLEAN|0x00000001
# Set this PCD to TRUE to map NORFlash at 0x0. FALSE means the DRAM is mapped at 0x0.
gArmPlatformTokenSpaceGuid.PcdNorFlashRemapping|FALSE|BOOLEAN|0x00000012
[PcdsFixedAtBuild.common]
# These PCDs should be FeaturePcds. But we used these PCDs as an '#if' in an ASM file.
# Using a FeaturePcd make a '(BOOLEAN) casting for its value which is not understood by the preprocessor.
gArmPlatformTokenSpaceGuid.PcdStandalone|0|UINT32|0x00000001
gArmPlatformTokenSpaceGuid.PcdMPCoreSupport|0|UINT32|0x00000003
# Stack for CPU Cores in Secure Mode

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@ -248,8 +248,6 @@
gArmTokenSpaceGuid.PcdCpuDxeProduceDebugSupport|FALSE
gEfiMdeModulePkgTokenSpaceGuid.PcdTurnOffUsbLegacySupport|TRUE
gArmPlatformTokenSpaceGuid.PcdStandalone|TRUE
!if $(EDK2_SKIP_PEICORE) == 1
gArmTokenSpaceGuid.PcdSkipPeiCore|TRUE
@ -328,6 +326,8 @@
#
gArmTokenSpaceGuid.PcdCpuVectorBaseAddress|0x00000000
gArmPlatformTokenSpaceGuid.PcdStandalone|1
# Stack for CPU Cores in Secure Mode
gArmPlatformTokenSpaceGuid.PcdCPUCoresSecStackBase|0x4B000000 # Top of SEC Stack for Secure World
gArmPlatformTokenSpaceGuid.PcdCPUCoreSecStackSize|0x2000 # Size of SEC Stack for Secure World

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@ -250,8 +250,6 @@
gArmTokenSpaceGuid.PcdCpuDxeProduceDebugSupport|FALSE
gEfiMdeModulePkgTokenSpaceGuid.PcdTurnOffUsbLegacySupport|TRUE
gArmPlatformTokenSpaceGuid.PcdStandalone|TRUE
!if $(EDK2_SKIP_PEICORE) == 1
gArmTokenSpaceGuid.PcdSkipPeiCore|TRUE
@ -330,6 +328,7 @@
#
gArmTokenSpaceGuid.PcdCpuVectorBaseAddress|0x00000000
gArmPlatformTokenSpaceGuid.PcdStandalone|1
gArmPlatformTokenSpaceGuid.PcdMPCoreSupport|1
# Stacks for MPCores in Secure World

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@ -41,6 +41,6 @@
[FeaturePcd]
gEmbeddedTokenSpaceGuid.PcdCacheEnable
gArmPlatformTokenSpaceGuid.PcdStandalone
[FixedPcd]
gArmPlatformTokenSpaceGuid.PcdStandalone

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@ -39,6 +39,6 @@
[FeaturePcd]
gEmbeddedTokenSpaceGuid.PcdCacheEnable
gArmPlatformTokenSpaceGuid.PcdStandalone
[FixedPcd]
gArmPlatformTokenSpaceGuid.PcdStandalone

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@ -272,10 +272,6 @@
gEfiMdeModulePkgTokenSpaceGuid.PcdTurnOffUsbLegacySupport|TRUE
!if $(EDK2_ARMVE_STANDALONE) == 1
gArmPlatformTokenSpaceGuid.PcdStandalone|TRUE
!endif
!if $(EDK2_SKIP_PEICORE) == 1
gArmTokenSpaceGuid.PcdSkipPeiCore|TRUE
!endif
@ -365,6 +361,10 @@
gArmPlatformTokenSpaceGuid.PcdMPCoreSupport|1
gArmTokenSpaceGuid.PcdVFPEnabled|1
!if $(EDK2_ARMVE_STANDALONE) == 1
gArmPlatformTokenSpaceGuid.PcdStandalone|1
!endif
# Stacks for MPCores in Secure World
gArmPlatformTokenSpaceGuid.PcdCPUCoresSecStackBase|0x49E00000 # Top of SEC Stack for Secure World
gArmPlatformTokenSpaceGuid.PcdCPUCoreSecStackSize|0x2000 # Stack for each of the 4 CPU cores

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@ -45,8 +45,9 @@
[FeaturePcd]
gEmbeddedTokenSpaceGuid.PcdCacheEnable
gArmPlatformTokenSpaceGuid.PcdStandalone
gArmPlatformTokenSpaceGuid.PcdNorFlashRemapping
[FixedPcd]
gArmPlatformTokenSpaceGuid.PcdStandalone
gArmTokenSpaceGuid.PcdL2x0ControllerBase

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@ -47,8 +47,9 @@
[FeaturePcd]
gEmbeddedTokenSpaceGuid.PcdCacheEnable
gArmPlatformTokenSpaceGuid.PcdStandalone
gArmPlatformTokenSpaceGuid.PcdNorFlashRemapping
[FixedPcd]
gArmPlatformTokenSpaceGuid.PcdStandalone
gArmTokenSpaceGuid.PcdL2x0ControllerBase

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@ -112,7 +112,7 @@ InitializeMemory (
//
// Initialize the System Memory (DRAM)
//
if (FeaturePcdGet(PcdStandalone)) {
if (PcdGet32 (PcdStandalone)) {
// In case of a standalone version, the DRAM is already initialized
ArmPlatformInitializeSystemMemory();
}
@ -120,7 +120,7 @@ InitializeMemory (
//
// Declare the UEFI memory to PEI
//
if (FeaturePcdGet(PcdStandalone)) {
if (PcdGet32 (PcdStandalone)) {
// In case of standalone UEFI, we set the UEFI memory region at the top of the DRAM
UefiMemoryBase = SystemMemoryTop - FixedPcdGet32 (PcdSystemMemoryUefiRegionSize);
} else {

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@ -49,9 +49,10 @@
[FeaturePcd]
gEmbeddedTokenSpaceGuid.PcdPrePiProduceMemoryTypeInformationHob
gArmPlatformTokenSpaceGuid.PcdStandalone
[FixedPcd]
gArmPlatformTokenSpaceGuid.PcdStandalone
gArmTokenSpaceGuid.PcdNormalFdBaseAddress
gArmTokenSpaceGuid.PcdNormalFdSize

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@ -71,7 +71,7 @@ PrimaryMain (
PL390GicEnableDistributor(PcdGet32(PcdGicDistributorBase));
// If ArmVe has not been built as Standalone then we need to wake up the secondary cores
if (FeaturePcdGet(PcdStandalone) == FALSE) {
if (!PcdGet32(PcdStandalone)) {
// Sending SGI to all the Secondary CPU interfaces
PL390GicSendSgiTo (PcdGet32(PcdGicDistributorBase), GIC_ICDSGIR_FILTER_EVERYONEELSE, 0x0E);
}

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@ -49,10 +49,9 @@
[Ppis]
gEfiTemporaryRamSupportPpiGuid
[FeaturePcd]
gArmPlatformTokenSpaceGuid.PcdStandalone
[FixedPcd]
gArmPlatformTokenSpaceGuid.PcdStandalone
gArmTokenSpaceGuid.PcdNormalFvBaseAddress
gArmTokenSpaceGuid.PcdNormalFvSize

View File

@ -46,10 +46,9 @@
[Ppis]
gEfiTemporaryRamSupportPpiGuid
[FeaturePcd]
gArmPlatformTokenSpaceGuid.PcdStandalone
[FixedPcd]
gArmPlatformTokenSpaceGuid.PcdStandalone
gArmTokenSpaceGuid.PcdNormalFvBaseAddress
gArmTokenSpaceGuid.PcdNormalFvSize

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@ -119,7 +119,7 @@ CEntryPoint (
// If we skip the PEI Core we could want to initialize the DRAM in the SEC phase.
// If we are in standalone, we need the initialization to copy the UEFI firmware into DRAM
if (FeaturePcdGet(PcdSkipPeiCore) || !FeaturePcdGet(PcdStandalone)) {
if (FeaturePcdGet(PcdSkipPeiCore) || !PcdGet32(PcdStandalone)) {
// Initialize system memory (DRAM)
ArmPlatformInitializeSystemMemory ();
}
@ -204,7 +204,7 @@ CEntryPoint (
}
// If ArmVe has not been built as Standalone then we need to patch the DRAM to add an infinite loop at the start address
if (FeaturePcdGet(PcdStandalone) == FALSE) {
if (!PcdGet32(PcdStandalone)) {
if (CoreId == ARM_PRIMARY_CORE) {
UINTN* StartAddress = (UINTN*)PcdGet32(PcdNormalFvBaseAddress);

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@ -45,10 +45,10 @@
SerialPortLib
[FeaturePcd]
gArmPlatformTokenSpaceGuid.PcdStandalone
gArmTokenSpaceGuid.PcdSkipPeiCore
[FixedPcd]
gArmPlatformTokenSpaceGuid.PcdStandalone
gArmTokenSpaceGuid.PcdVFPEnabled
gArmPlatformTokenSpaceGuid.PcdMPCoreSupport