MdePkg/BaseLib: implement SpeculationBarrier() for ARM and AArch64

Replace the dummy C implementation of SpeculationBarrier() with
implementations consisting of the recommended DSB SY + ISB sequence,
as recommended by ARM in the whitepaper "Cache Speculation Side-channels"
version 2.4, dated October 2018.

Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Ard Biesheuvel <ard.biesheuvel@linaro.org>
Reviewed-by: Liming Gao <liming.gao@intel.com>
Reviewed-by: Leif Lindholm <leif.lindholm@linaro.org>
This commit is contained in:
Ard Biesheuvel 2019-02-06 00:08:22 +00:00
parent 1a35dd723b
commit c0959b4426
6 changed files with 160 additions and 32 deletions

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@ -0,0 +1,39 @@
##------------------------------------------------------------------------------
#
# SpeculationBarrier() for AArch64
#
# Copyright (c) 2019, Linaro Ltd. All rights reserved.
#
# This program and the accompanying materials
# are licensed and made available under the terms and conditions of the BSD License
# which accompanies this distribution. The full text of the license may be found at
# http://opensource.org/licenses/bsd-license.php.
#
# THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
# WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
#
##------------------------------------------------------------------------------
.text
.p2align 2
GCC_ASM_EXPORT(SpeculationBarrier)
#/**
# Uses as a barrier to stop speculative execution.
#
# Ensures that no later instruction will execute speculatively, until all prior
# instructions have completed.
#
#**/
#VOID
#EFIAPI
#SpeculationBarrier (
# VOID
# );
#
ASM_PFX(SpeculationBarrier):
dsb sy
isb
ret

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@ -0,0 +1,38 @@
;------------------------------------------------------------------------------
;
; SpeculationBarrier() for AArch64
;
; Copyright (c) 2019, Linaro Ltd. All rights reserved.
;
; This program and the accompanying materials
; are licensed and made available under the terms and conditions of the BSD License
; which accompanies this distribution. The full text of the license may be found at
; http://opensource.org/licenses/bsd-license.php.
;
; THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
; WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
;
;------------------------------------------------------------------------------
EXPORT SpeculationBarrier
AREA BaseLib_LowLevel, CODE, READONLY
;/**
; Uses as a barrier to stop speculative execution.
;
; Ensures that no later instruction will execute speculatively, until all prior
; instructions have completed.
;
;**/
;VOID
;EFIAPI
;SpeculationBarrier (
; VOID
; );
;
SpeculationBarrier
dsb sy
isb
ret
END

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@ -0,0 +1,39 @@
##------------------------------------------------------------------------------
#
# SpeculationBarrier() for AArch64
#
# Copyright (c) 2019, Linaro Ltd. All rights reserved.
#
# This program and the accompanying materials
# are licensed and made available under the terms and conditions of the BSD License
# which accompanies this distribution. The full text of the license may be found at
# http://opensource.org/licenses/bsd-license.php.
#
# THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
# WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
#
##------------------------------------------------------------------------------
.text
.p2align 2
GCC_ASM_EXPORT(SpeculationBarrier)
#/**
# Uses as a barrier to stop speculative execution.
#
# Ensures that no later instruction will execute speculatively, until all prior
# instructions have completed.
#
#**/
#VOID
#EFIAPI
#SpeculationBarrier (
# VOID
# );
#
ASM_PFX(SpeculationBarrier):
dsb
isb
bx lr

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@ -0,0 +1,39 @@
;------------------------------------------------------------------------------
;
; SpeculationBarrier() for AArch64
;
; Copyright (c) 2019, Linaro Ltd. All rights reserved.
;
; This program and the accompanying materials
; are licensed and made available under the terms and conditions of the BSD License
; which accompanies this distribution. The full text of the license may be found at
; http://opensource.org/licenses/bsd-license.php.
;
; THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
; WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
;
;------------------------------------------------------------------------------
EXPORT SpeculationBarrier
AREA MemoryBarriers, CODE, READONLY
;/**
; Uses as a barrier to stop speculative execution.
;
; Ensures that no later instruction will execute speculatively, until all prior
; instructions have completed.
;
;**/
;VOID
;EFIAPI
;SpeculationBarrier (
; VOID
; );
;
SpeculationBarrier
dsb
isb
bx lr
END

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@ -1,30 +0,0 @@
/** @file
SpeculationBarrier() function for ARM.
Copyright (C) 2018, Intel Corporation. All rights reserved.<BR>
This program and the accompanying materials are licensed and made available
under the terms and conditions of the BSD License which accompanies this
distribution. The full text of the license may be found at
http://opensource.org/licenses/bsd-license.php.
THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS, WITHOUT
WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
**/
/**
Uses as a barrier to stop speculative execution.
Ensures that no later instruction will execute speculatively, until all prior
instructions have completed.
**/
VOID
EFIAPI
SpeculationBarrier (
VOID
)
{
}

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@ -552,7 +552,6 @@
[Sources.ARM] [Sources.ARM]
Arm/InternalSwitchStack.c Arm/InternalSwitchStack.c
Arm/Unaligned.c Arm/Unaligned.c
Arm/SpeculationBarrier.c
Math64.c | RVCT Math64.c | RVCT
Math64.c | MSFT Math64.c | MSFT
@ -564,6 +563,7 @@
Arm/CpuPause.asm | RVCT Arm/CpuPause.asm | RVCT
Arm/CpuBreakpoint.asm | RVCT Arm/CpuBreakpoint.asm | RVCT
Arm/MemoryFence.asm | RVCT Arm/MemoryFence.asm | RVCT
Arm/SpeculationBarrier.S | RVCT
Arm/SwitchStack.asm | MSFT Arm/SwitchStack.asm | MSFT
Arm/SetJumpLongJump.asm | MSFT Arm/SetJumpLongJump.asm | MSFT
@ -573,6 +573,7 @@
Arm/CpuPause.asm | MSFT Arm/CpuPause.asm | MSFT
Arm/CpuBreakpoint.asm | MSFT Arm/CpuBreakpoint.asm | MSFT
Arm/MemoryFence.asm | MSFT Arm/MemoryFence.asm | MSFT
Arm/SpeculationBarrier.asm | MSFT
Arm/Math64.S | GCC Arm/Math64.S | GCC
Arm/SwitchStack.S | GCC Arm/SwitchStack.S | GCC
@ -582,11 +583,11 @@
Arm/SetJumpLongJump.S | GCC Arm/SetJumpLongJump.S | GCC
Arm/CpuBreakpoint.S | GCC Arm/CpuBreakpoint.S | GCC
Arm/MemoryFence.S | GCC Arm/MemoryFence.S | GCC
Arm/SpeculationBarrier.S | GCC
[Sources.AARCH64] [Sources.AARCH64]
Arm/InternalSwitchStack.c Arm/InternalSwitchStack.c
Arm/Unaligned.c Arm/Unaligned.c
Arm/SpeculationBarrier.c
Math64.c Math64.c
AArch64/MemoryFence.S | GCC AArch64/MemoryFence.S | GCC
@ -596,6 +597,7 @@
AArch64/GetInterruptsState.S | GCC AArch64/GetInterruptsState.S | GCC
AArch64/SetJumpLongJump.S | GCC AArch64/SetJumpLongJump.S | GCC
AArch64/CpuBreakpoint.S | GCC AArch64/CpuBreakpoint.S | GCC
AArch64/SpeculationBarrier.S | GCC
AArch64/MemoryFence.asm | MSFT AArch64/MemoryFence.asm | MSFT
AArch64/SwitchStack.asm | MSFT AArch64/SwitchStack.asm | MSFT
@ -604,6 +606,7 @@
AArch64/GetInterruptsState.asm | MSFT AArch64/GetInterruptsState.asm | MSFT
AArch64/SetJumpLongJump.asm | MSFT AArch64/SetJumpLongJump.asm | MSFT
AArch64/CpuBreakpoint.asm | MSFT AArch64/CpuBreakpoint.asm | MSFT
AArch64/SpeculationBarrier.asm | MSFT
[Packages] [Packages]
MdePkg/MdePkg.dec MdePkg/MdePkg.dec