From c13cb4aebf4a27dd056f3a4b36d18646ffccef3b Mon Sep 17 00:00:00 2001
From: Jiewen Yao <jiewen.yao@intel.com>
Date: Fri, 20 Oct 2017 16:47:48 +0800
Subject: [PATCH] IntelSiliconPkg/VtdInfoSample: Fix IGD RMRR memory.

Fix a calculation problem in IGD RMRR memory.

Cc: Zeng Star <zeng.star@intel.com>
Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Jiewen Yao <jiewen.yao@intel.com>
Reviewed-by: Zeng Star <zeng.star@intel.com>
---
 .../VTd/PlatformVTdInfoSamplePei/PlatformVTdInfoSamplePei.c     | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/IntelSiliconPkg/Feature/VTd/PlatformVTdInfoSamplePei/PlatformVTdInfoSamplePei.c b/IntelSiliconPkg/Feature/VTd/PlatformVTdInfoSamplePei/PlatformVTdInfoSamplePei.c
index 08a4db3e63..6267da7233 100644
--- a/IntelSiliconPkg/Feature/VTd/PlatformVTdInfoSamplePei/PlatformVTdInfoSamplePei.c
+++ b/IntelSiliconPkg/Feature/VTd/PlatformVTdInfoSamplePei/PlatformVTdInfoSamplePei.c
@@ -159,7 +159,7 @@ PatchDmar (
   /// Calculate GTT mem size
   ///
   GttMemSize = 0;
-  GttMode = PciRead16 (PCI_LIB_ADDRESS(0, 0, 0, R_SA_GGC) & B_SKL_SA_GGC_GGMS_MASK) >> N_SKL_SA_GGC_GGMS_OFFSET;
+  GttMode = (PciRead16 (PCI_LIB_ADDRESS(0, 0, 0, R_SA_GGC)) & B_SKL_SA_GGC_GGMS_MASK) >> N_SKL_SA_GGC_GGMS_OFFSET;
   if (GttMode <= V_SKL_SA_GGC_GGMS_8MB) {
     GttMemSize = (1 << GttMode) * (1024) * (1024);
   }