SourceLevelDebugPkg: Apply uncrustify changes

REF: https://bugzilla.tianocore.org/show_bug.cgi?id=3737

Apply uncrustify changes to .c/.h files in the SourceLevelDebugPkg package

Cc: Andrew Fish <afish@apple.com>
Cc: Leif Lindholm <leif@nuviainc.com>
Cc: Michael D Kinney <michael.d.kinney@intel.com>
Signed-off-by: Michael Kubacki <michael.kubacki@microsoft.com>
Reviewed-by: Hao A Wu <hao.a.wu@intel.com>
Reviewed-by: Ray Ni <ray.ni@intel.com>
This commit is contained in:
Michael Kubacki 2021-12-05 14:54:15 -08:00 committed by mergify[bot]
parent b878648967
commit c1e126b119
35 changed files with 3547 additions and 3381 deletions

View File

@ -12,7 +12,7 @@ SPDX-License-Identifier: BSD-2-Clause-Patent
#include <Library/DebugAgentLib.h>
#include <Library/UefiLib.h>
EFI_EVENT mExitBootServiceEvent;
EFI_EVENT mExitBootServiceEvent;
/**
One notified function to disable Debug Timer interrupt when gBS->ExitBootServices() called.
@ -24,8 +24,8 @@ EFI_EVENT mExitBootServiceEvent;
VOID
EFIAPI
DisableDebugTimerExitBootService (
EFI_EVENT Event,
VOID *Context
EFI_EVENT Event,
VOID *Context
)
{
@ -46,12 +46,12 @@ DisableDebugTimerExitBootService (
**/
EFI_STATUS
EFIAPI
DebugAgentDxeInitialize(
IN EFI_HANDLE ImageHandle,
IN EFI_SYSTEM_TABLE *SystemTable
DebugAgentDxeInitialize (
IN EFI_HANDLE ImageHandle,
IN EFI_SYSTEM_TABLE *SystemTable
)
{
EFI_STATUS Status;
EFI_STATUS Status;
if (gST->ConOut != NULL) {
Print (L"If the Debug Port is serial port, please make sure this serial port isn't connected by");
@ -81,14 +81,17 @@ DebugAgentDxeInitialize(
Print (L"3: Shell> disconnect EA\r\n");
Print (L"4: Shell> load -nc DebugAgentDxe.efi\r\n\r\n");
}
Status = EFI_UNSUPPORTED;
InitializeDebugAgent (DEBUG_AGENT_INIT_DXE_LOAD, &Status, NULL);
if (EFI_ERROR (Status)) {
return Status;
}
if (gST->ConOut != NULL) {
Print (L"Debug Agent: Initialized successfully!\r\n\r\n");
}
//
// Create event to disable Debug Timer interrupt when exit boot service.
//
@ -117,20 +120,20 @@ DebugAgentDxeInitialize(
EFI_STATUS
EFIAPI
DebugAgentDxeUnload (
IN EFI_HANDLE ImageHandle
IN EFI_HANDLE ImageHandle
)
{
EFI_STATUS Status;
EFI_STATUS Status;
Status = EFI_UNSUPPORTED;
InitializeDebugAgent (DEBUG_AGENT_INIT_DXE_UNLOAD, &Status, NULL);
switch (Status) {
case EFI_ACCESS_DENIED:
Print (L"Debug Agent: Host is still connected, please de-attach TARGET firstly!\r\n");
break;
case EFI_NOT_STARTED:
Print (L"Debug Agent: It hasn't been initialized, cannot unload it!\r\n");
break;
case EFI_ACCESS_DENIED:
Print (L"Debug Agent: Host is still connected, please de-attach TARGET firstly!\r\n");
break;
case EFI_NOT_STARTED:
Print (L"Debug Agent: It hasn't been initialized, cannot unload it!\r\n");
break;
}
return Status;

View File

@ -31,7 +31,7 @@ DebugAgentPeiInitialize (
IN CONST EFI_PEI_SERVICES **PeiServices
)
{
EFI_STATUS Status;
EFI_STATUS Status;
Status = EFI_UNSUPPORTED;
InitializeDebugAgent (DEBUG_AGENT_INIT_PEI, &Status, NULL);

View File

@ -21,6 +21,6 @@
0x865a5a9b, 0xb85d, 0x474c, { 0x84, 0x55, 0x65, 0xd1, 0xbe, 0x84, 0x4b, 0xe2 } \
}
extern EFI_GUID gEfiDebugAgentGuid;
extern EFI_GUID gEfiDebugAgentGuid;
#endif

View File

@ -39,79 +39,79 @@
#define SOFT_DEBUGGER_REGISTER_CR3 0x17
#define SOFT_DEBUGGER_REGISTER_CR4 0x18
#define SOFT_DEBUGGER_REGISTER_DI 0x19
#define SOFT_DEBUGGER_REGISTER_SI 0x1A
#define SOFT_DEBUGGER_REGISTER_BP 0x1B
#define SOFT_DEBUGGER_REGISTER_SP 0x1C
#define SOFT_DEBUGGER_REGISTER_DX 0x1D
#define SOFT_DEBUGGER_REGISTER_CX 0x1E
#define SOFT_DEBUGGER_REGISTER_BX 0x1F
#define SOFT_DEBUGGER_REGISTER_AX 0x20
#define SOFT_DEBUGGER_REGISTER_DI 0x19
#define SOFT_DEBUGGER_REGISTER_SI 0x1A
#define SOFT_DEBUGGER_REGISTER_BP 0x1B
#define SOFT_DEBUGGER_REGISTER_SP 0x1C
#define SOFT_DEBUGGER_REGISTER_DX 0x1D
#define SOFT_DEBUGGER_REGISTER_CX 0x1E
#define SOFT_DEBUGGER_REGISTER_BX 0x1F
#define SOFT_DEBUGGER_REGISTER_AX 0x20
//
// This below registers are only available for x64 (not valid for Ia32 mode)
//
#define SOFT_DEBUGGER_REGISTER_CR8 0x21
#define SOFT_DEBUGGER_REGISTER_R8 0x22
#define SOFT_DEBUGGER_REGISTER_R9 0x23
#define SOFT_DEBUGGER_REGISTER_R10 0x24
#define SOFT_DEBUGGER_REGISTER_R11 0x25
#define SOFT_DEBUGGER_REGISTER_R12 0x26
#define SOFT_DEBUGGER_REGISTER_R13 0x27
#define SOFT_DEBUGGER_REGISTER_R14 0x28
#define SOFT_DEBUGGER_REGISTER_R15 0x29
#define SOFT_DEBUGGER_REGISTER_CR8 0x21
#define SOFT_DEBUGGER_REGISTER_R8 0x22
#define SOFT_DEBUGGER_REGISTER_R9 0x23
#define SOFT_DEBUGGER_REGISTER_R10 0x24
#define SOFT_DEBUGGER_REGISTER_R11 0x25
#define SOFT_DEBUGGER_REGISTER_R12 0x26
#define SOFT_DEBUGGER_REGISTER_R13 0x27
#define SOFT_DEBUGGER_REGISTER_R14 0x28
#define SOFT_DEBUGGER_REGISTER_R15 0x29
//
// This below registers are FP / MMX / XMM registers
//
#define SOFT_DEBUGGER_REGISTER_FP_BASE 0x30
#define SOFT_DEBUGGER_REGISTER_FP_BASE 0x30
#define SOFT_DEBUGGER_REGISTER_FP_FCW (SOFT_DEBUGGER_REGISTER_FP_BASE + 0x00)
#define SOFT_DEBUGGER_REGISTER_FP_FSW (SOFT_DEBUGGER_REGISTER_FP_BASE + 0x01)
#define SOFT_DEBUGGER_REGISTER_FP_FTW (SOFT_DEBUGGER_REGISTER_FP_BASE + 0x02)
#define SOFT_DEBUGGER_REGISTER_FP_OPCODE (SOFT_DEBUGGER_REGISTER_FP_BASE + 0x03)
#define SOFT_DEBUGGER_REGISTER_FP_EIP (SOFT_DEBUGGER_REGISTER_FP_BASE + 0x04)
#define SOFT_DEBUGGER_REGISTER_FP_CS (SOFT_DEBUGGER_REGISTER_FP_BASE + 0x05)
#define SOFT_DEBUGGER_REGISTER_FP_DATAOFFSET (SOFT_DEBUGGER_REGISTER_FP_BASE + 0x06)
#define SOFT_DEBUGGER_REGISTER_FP_DS (SOFT_DEBUGGER_REGISTER_FP_BASE + 0x07)
#define SOFT_DEBUGGER_REGISTER_FP_MXCSR (SOFT_DEBUGGER_REGISTER_FP_BASE + 0x08)
#define SOFT_DEBUGGER_REGISTER_FP_MXCSR_MASK (SOFT_DEBUGGER_REGISTER_FP_BASE + 0x09)
#define SOFT_DEBUGGER_REGISTER_ST0 (SOFT_DEBUGGER_REGISTER_FP_BASE + 0x0A)
#define SOFT_DEBUGGER_REGISTER_ST1 (SOFT_DEBUGGER_REGISTER_FP_BASE + 0x0B)
#define SOFT_DEBUGGER_REGISTER_ST2 (SOFT_DEBUGGER_REGISTER_FP_BASE + 0x0C)
#define SOFT_DEBUGGER_REGISTER_ST3 (SOFT_DEBUGGER_REGISTER_FP_BASE + 0x0D)
#define SOFT_DEBUGGER_REGISTER_ST4 (SOFT_DEBUGGER_REGISTER_FP_BASE + 0x0E)
#define SOFT_DEBUGGER_REGISTER_ST5 (SOFT_DEBUGGER_REGISTER_FP_BASE + 0x0F)
#define SOFT_DEBUGGER_REGISTER_ST6 (SOFT_DEBUGGER_REGISTER_FP_BASE + 0x10)
#define SOFT_DEBUGGER_REGISTER_ST7 (SOFT_DEBUGGER_REGISTER_FP_BASE + 0x11)
#define SOFT_DEBUGGER_REGISTER_XMM0 (SOFT_DEBUGGER_REGISTER_FP_BASE + 0x12)
#define SOFT_DEBUGGER_REGISTER_XMM1 (SOFT_DEBUGGER_REGISTER_FP_BASE + 0x13)
#define SOFT_DEBUGGER_REGISTER_XMM2 (SOFT_DEBUGGER_REGISTER_FP_BASE + 0x14)
#define SOFT_DEBUGGER_REGISTER_XMM3 (SOFT_DEBUGGER_REGISTER_FP_BASE + 0x15)
#define SOFT_DEBUGGER_REGISTER_XMM4 (SOFT_DEBUGGER_REGISTER_FP_BASE + 0x16)
#define SOFT_DEBUGGER_REGISTER_XMM5 (SOFT_DEBUGGER_REGISTER_FP_BASE + 0x17)
#define SOFT_DEBUGGER_REGISTER_XMM6 (SOFT_DEBUGGER_REGISTER_FP_BASE + 0x18)
#define SOFT_DEBUGGER_REGISTER_XMM7 (SOFT_DEBUGGER_REGISTER_FP_BASE + 0x19)
#define SOFT_DEBUGGER_REGISTER_XMM8 (SOFT_DEBUGGER_REGISTER_FP_BASE + 0x1A)
#define SOFT_DEBUGGER_REGISTER_XMM9 (SOFT_DEBUGGER_REGISTER_FP_BASE + 0x1B)
#define SOFT_DEBUGGER_REGISTER_XMM10 (SOFT_DEBUGGER_REGISTER_FP_BASE + 0x1C)
#define SOFT_DEBUGGER_REGISTER_XMM11 (SOFT_DEBUGGER_REGISTER_FP_BASE + 0x1D)
#define SOFT_DEBUGGER_REGISTER_XMM12 (SOFT_DEBUGGER_REGISTER_FP_BASE + 0x1E)
#define SOFT_DEBUGGER_REGISTER_XMM13 (SOFT_DEBUGGER_REGISTER_FP_BASE + 0x1F)
#define SOFT_DEBUGGER_REGISTER_XMM14 (SOFT_DEBUGGER_REGISTER_FP_BASE + 0x20)
#define SOFT_DEBUGGER_REGISTER_XMM15 (SOFT_DEBUGGER_REGISTER_FP_BASE + 0x21)
#define SOFT_DEBUGGER_REGISTER_MM0 (SOFT_DEBUGGER_REGISTER_FP_BASE + 0x22)
#define SOFT_DEBUGGER_REGISTER_MM1 (SOFT_DEBUGGER_REGISTER_FP_BASE + 0x23)
#define SOFT_DEBUGGER_REGISTER_MM2 (SOFT_DEBUGGER_REGISTER_FP_BASE + 0x24)
#define SOFT_DEBUGGER_REGISTER_MM3 (SOFT_DEBUGGER_REGISTER_FP_BASE + 0x25)
#define SOFT_DEBUGGER_REGISTER_MM4 (SOFT_DEBUGGER_REGISTER_FP_BASE + 0x26)
#define SOFT_DEBUGGER_REGISTER_MM5 (SOFT_DEBUGGER_REGISTER_FP_BASE + 0x27)
#define SOFT_DEBUGGER_REGISTER_MM6 (SOFT_DEBUGGER_REGISTER_FP_BASE + 0x28)
#define SOFT_DEBUGGER_REGISTER_MM7 (SOFT_DEBUGGER_REGISTER_FP_BASE + 0x29)
#define SOFT_DEBUGGER_REGISTER_FP_FCW (SOFT_DEBUGGER_REGISTER_FP_BASE + 0x00)
#define SOFT_DEBUGGER_REGISTER_FP_FSW (SOFT_DEBUGGER_REGISTER_FP_BASE + 0x01)
#define SOFT_DEBUGGER_REGISTER_FP_FTW (SOFT_DEBUGGER_REGISTER_FP_BASE + 0x02)
#define SOFT_DEBUGGER_REGISTER_FP_OPCODE (SOFT_DEBUGGER_REGISTER_FP_BASE + 0x03)
#define SOFT_DEBUGGER_REGISTER_FP_EIP (SOFT_DEBUGGER_REGISTER_FP_BASE + 0x04)
#define SOFT_DEBUGGER_REGISTER_FP_CS (SOFT_DEBUGGER_REGISTER_FP_BASE + 0x05)
#define SOFT_DEBUGGER_REGISTER_FP_DATAOFFSET (SOFT_DEBUGGER_REGISTER_FP_BASE + 0x06)
#define SOFT_DEBUGGER_REGISTER_FP_DS (SOFT_DEBUGGER_REGISTER_FP_BASE + 0x07)
#define SOFT_DEBUGGER_REGISTER_FP_MXCSR (SOFT_DEBUGGER_REGISTER_FP_BASE + 0x08)
#define SOFT_DEBUGGER_REGISTER_FP_MXCSR_MASK (SOFT_DEBUGGER_REGISTER_FP_BASE + 0x09)
#define SOFT_DEBUGGER_REGISTER_ST0 (SOFT_DEBUGGER_REGISTER_FP_BASE + 0x0A)
#define SOFT_DEBUGGER_REGISTER_ST1 (SOFT_DEBUGGER_REGISTER_FP_BASE + 0x0B)
#define SOFT_DEBUGGER_REGISTER_ST2 (SOFT_DEBUGGER_REGISTER_FP_BASE + 0x0C)
#define SOFT_DEBUGGER_REGISTER_ST3 (SOFT_DEBUGGER_REGISTER_FP_BASE + 0x0D)
#define SOFT_DEBUGGER_REGISTER_ST4 (SOFT_DEBUGGER_REGISTER_FP_BASE + 0x0E)
#define SOFT_DEBUGGER_REGISTER_ST5 (SOFT_DEBUGGER_REGISTER_FP_BASE + 0x0F)
#define SOFT_DEBUGGER_REGISTER_ST6 (SOFT_DEBUGGER_REGISTER_FP_BASE + 0x10)
#define SOFT_DEBUGGER_REGISTER_ST7 (SOFT_DEBUGGER_REGISTER_FP_BASE + 0x11)
#define SOFT_DEBUGGER_REGISTER_XMM0 (SOFT_DEBUGGER_REGISTER_FP_BASE + 0x12)
#define SOFT_DEBUGGER_REGISTER_XMM1 (SOFT_DEBUGGER_REGISTER_FP_BASE + 0x13)
#define SOFT_DEBUGGER_REGISTER_XMM2 (SOFT_DEBUGGER_REGISTER_FP_BASE + 0x14)
#define SOFT_DEBUGGER_REGISTER_XMM3 (SOFT_DEBUGGER_REGISTER_FP_BASE + 0x15)
#define SOFT_DEBUGGER_REGISTER_XMM4 (SOFT_DEBUGGER_REGISTER_FP_BASE + 0x16)
#define SOFT_DEBUGGER_REGISTER_XMM5 (SOFT_DEBUGGER_REGISTER_FP_BASE + 0x17)
#define SOFT_DEBUGGER_REGISTER_XMM6 (SOFT_DEBUGGER_REGISTER_FP_BASE + 0x18)
#define SOFT_DEBUGGER_REGISTER_XMM7 (SOFT_DEBUGGER_REGISTER_FP_BASE + 0x19)
#define SOFT_DEBUGGER_REGISTER_XMM8 (SOFT_DEBUGGER_REGISTER_FP_BASE + 0x1A)
#define SOFT_DEBUGGER_REGISTER_XMM9 (SOFT_DEBUGGER_REGISTER_FP_BASE + 0x1B)
#define SOFT_DEBUGGER_REGISTER_XMM10 (SOFT_DEBUGGER_REGISTER_FP_BASE + 0x1C)
#define SOFT_DEBUGGER_REGISTER_XMM11 (SOFT_DEBUGGER_REGISTER_FP_BASE + 0x1D)
#define SOFT_DEBUGGER_REGISTER_XMM12 (SOFT_DEBUGGER_REGISTER_FP_BASE + 0x1E)
#define SOFT_DEBUGGER_REGISTER_XMM13 (SOFT_DEBUGGER_REGISTER_FP_BASE + 0x1F)
#define SOFT_DEBUGGER_REGISTER_XMM14 (SOFT_DEBUGGER_REGISTER_FP_BASE + 0x20)
#define SOFT_DEBUGGER_REGISTER_XMM15 (SOFT_DEBUGGER_REGISTER_FP_BASE + 0x21)
#define SOFT_DEBUGGER_REGISTER_MM0 (SOFT_DEBUGGER_REGISTER_FP_BASE + 0x22)
#define SOFT_DEBUGGER_REGISTER_MM1 (SOFT_DEBUGGER_REGISTER_FP_BASE + 0x23)
#define SOFT_DEBUGGER_REGISTER_MM2 (SOFT_DEBUGGER_REGISTER_FP_BASE + 0x24)
#define SOFT_DEBUGGER_REGISTER_MM3 (SOFT_DEBUGGER_REGISTER_FP_BASE + 0x25)
#define SOFT_DEBUGGER_REGISTER_MM4 (SOFT_DEBUGGER_REGISTER_FP_BASE + 0x26)
#define SOFT_DEBUGGER_REGISTER_MM5 (SOFT_DEBUGGER_REGISTER_FP_BASE + 0x27)
#define SOFT_DEBUGGER_REGISTER_MM6 (SOFT_DEBUGGER_REGISTER_FP_BASE + 0x28)
#define SOFT_DEBUGGER_REGISTER_MM7 (SOFT_DEBUGGER_REGISTER_FP_BASE + 0x29)
#define SOFT_DEBUGGER_REGISTER_MAX SOFT_DEBUGGER_REGISTER_MM7
#define SOFT_DEBUGGER_REGISTER_MAX SOFT_DEBUGGER_REGISTER_MM7
#define SOFT_DEBUGGER_MSR_EFER (0xC0000080)
#define SOFT_DEBUGGER_MSR_EFER (0xC0000080)
#pragma pack(1)
@ -120,82 +120,82 @@
/// FP / MMX / XMM registers (see fxrstor instruction definition)
///
typedef struct {
UINT16 Fcw;
UINT16 Fsw;
UINT16 Ftw;
UINT16 Opcode;
UINT32 Eip;
UINT16 Cs;
UINT16 Reserved1;
UINT32 DataOffset;
UINT16 Ds;
UINT8 Reserved2[2];
UINT32 Mxcsr;
UINT32 Mxcsr_Mask;
UINT8 St0Mm0[10];
UINT8 Reserved3[6];
UINT8 St1Mm1[10];
UINT8 Reserved4[6];
UINT8 St2Mm2[10];
UINT8 Reserved5[6];
UINT8 St3Mm3[10];
UINT8 Reserved6[6];
UINT8 St4Mm4[10];
UINT8 Reserved7[6];
UINT8 St5Mm5[10];
UINT8 Reserved8[6];
UINT8 St6Mm6[10];
UINT8 Reserved9[6];
UINT8 St7Mm7[10];
UINT8 Reserved10[6];
UINT8 Xmm0[16];
UINT8 Xmm1[16];
UINT8 Xmm2[16];
UINT8 Xmm3[16];
UINT8 Xmm4[16];
UINT8 Xmm5[16];
UINT8 Xmm6[16];
UINT8 Xmm7[16];
UINT8 Reserved11[14 * 16];
UINT16 Fcw;
UINT16 Fsw;
UINT16 Ftw;
UINT16 Opcode;
UINT32 Eip;
UINT16 Cs;
UINT16 Reserved1;
UINT32 DataOffset;
UINT16 Ds;
UINT8 Reserved2[2];
UINT32 Mxcsr;
UINT32 Mxcsr_Mask;
UINT8 St0Mm0[10];
UINT8 Reserved3[6];
UINT8 St1Mm1[10];
UINT8 Reserved4[6];
UINT8 St2Mm2[10];
UINT8 Reserved5[6];
UINT8 St3Mm3[10];
UINT8 Reserved6[6];
UINT8 St4Mm4[10];
UINT8 Reserved7[6];
UINT8 St5Mm5[10];
UINT8 Reserved8[6];
UINT8 St6Mm6[10];
UINT8 Reserved9[6];
UINT8 St7Mm7[10];
UINT8 Reserved10[6];
UINT8 Xmm0[16];
UINT8 Xmm1[16];
UINT8 Xmm2[16];
UINT8 Xmm3[16];
UINT8 Xmm4[16];
UINT8 Xmm5[16];
UINT8 Xmm6[16];
UINT8 Xmm7[16];
UINT8 Reserved11[14 * 16];
} DEBUG_DATA_IA32_FX_SAVE_STATE;
///
/// IA-32 processor context definition
///
typedef struct {
UINT32 ExceptionData;
DEBUG_DATA_IA32_FX_SAVE_STATE FxSaveState;
UINT32 Dr0;
UINT32 Dr1;
UINT32 Dr2;
UINT32 Dr3;
UINT32 Dr6;
UINT32 Dr7;
UINT32 Eflags;
UINT32 Ldtr;
UINT32 Tr;
UINT32 Gdtr[2];
UINT32 Idtr[2];
UINT32 Eip;
UINT32 Gs;
UINT32 Fs;
UINT32 Es;
UINT32 Ds;
UINT32 Cs;
UINT32 Ss;
UINT32 Cr0;
UINT32 Cr1; ///< Reserved
UINT32 Cr2;
UINT32 Cr3;
UINT32 Cr4;
UINT32 Edi;
UINT32 Esi;
UINT32 Ebp;
UINT32 Esp;
UINT32 Edx;
UINT32 Ecx;
UINT32 Ebx;
UINT32 Eax;
UINT32 ExceptionData;
DEBUG_DATA_IA32_FX_SAVE_STATE FxSaveState;
UINT32 Dr0;
UINT32 Dr1;
UINT32 Dr2;
UINT32 Dr3;
UINT32 Dr6;
UINT32 Dr7;
UINT32 Eflags;
UINT32 Ldtr;
UINT32 Tr;
UINT32 Gdtr[2];
UINT32 Idtr[2];
UINT32 Eip;
UINT32 Gs;
UINT32 Fs;
UINT32 Es;
UINT32 Ds;
UINT32 Cs;
UINT32 Ss;
UINT32 Cr0;
UINT32 Cr1; ///< Reserved
UINT32 Cr2;
UINT32 Cr3;
UINT32 Cr4;
UINT32 Edi;
UINT32 Esi;
UINT32 Ebp;
UINT32 Esp;
UINT32 Edx;
UINT32 Ecx;
UINT32 Ebx;
UINT32 Eax;
} DEBUG_DATA_IA32_SYSTEM_CONTEXT;
///
@ -203,102 +203,101 @@ typedef struct {
/// FP / MMX / XMM registers (see fxrstor instruction definition)
///
typedef struct {
UINT16 Fcw;
UINT16 Fsw;
UINT16 Ftw;
UINT16 Opcode;
UINT32 Eip;
UINT16 Cs;
UINT16 Reserved1;
UINT32 DataOffset;
UINT16 Ds;
UINT8 Reserved2[2];
UINT32 Mxcsr;
UINT32 Mxcsr_Mask;
UINT8 St0Mm0[10];
UINT8 Reserved3[6];
UINT8 St1Mm1[10];
UINT8 Reserved4[6];
UINT8 St2Mm2[10];
UINT8 Reserved5[6];
UINT8 St3Mm3[10];
UINT8 Reserved6[6];
UINT8 St4Mm4[10];
UINT8 Reserved7[6];
UINT8 St5Mm5[10];
UINT8 Reserved8[6];
UINT8 St6Mm6[10];
UINT8 Reserved9[6];
UINT8 St7Mm7[10];
UINT8 Reserved10[6];
UINT8 Xmm0[16];
UINT8 Xmm1[16];
UINT8 Xmm2[16];
UINT8 Xmm3[16];
UINT8 Xmm4[16];
UINT8 Xmm5[16];
UINT8 Xmm6[16];
UINT8 Xmm7[16];
UINT8 Xmm8[16];
UINT8 Xmm9[16];
UINT8 Xmm10[16];
UINT8 Xmm11[16];
UINT8 Xmm12[16];
UINT8 Xmm13[16];
UINT8 Xmm14[16];
UINT8 Xmm15[16];
UINT8 Reserved11[6 * 16];
UINT16 Fcw;
UINT16 Fsw;
UINT16 Ftw;
UINT16 Opcode;
UINT32 Eip;
UINT16 Cs;
UINT16 Reserved1;
UINT32 DataOffset;
UINT16 Ds;
UINT8 Reserved2[2];
UINT32 Mxcsr;
UINT32 Mxcsr_Mask;
UINT8 St0Mm0[10];
UINT8 Reserved3[6];
UINT8 St1Mm1[10];
UINT8 Reserved4[6];
UINT8 St2Mm2[10];
UINT8 Reserved5[6];
UINT8 St3Mm3[10];
UINT8 Reserved6[6];
UINT8 St4Mm4[10];
UINT8 Reserved7[6];
UINT8 St5Mm5[10];
UINT8 Reserved8[6];
UINT8 St6Mm6[10];
UINT8 Reserved9[6];
UINT8 St7Mm7[10];
UINT8 Reserved10[6];
UINT8 Xmm0[16];
UINT8 Xmm1[16];
UINT8 Xmm2[16];
UINT8 Xmm3[16];
UINT8 Xmm4[16];
UINT8 Xmm5[16];
UINT8 Xmm6[16];
UINT8 Xmm7[16];
UINT8 Xmm8[16];
UINT8 Xmm9[16];
UINT8 Xmm10[16];
UINT8 Xmm11[16];
UINT8 Xmm12[16];
UINT8 Xmm13[16];
UINT8 Xmm14[16];
UINT8 Xmm15[16];
UINT8 Reserved11[6 * 16];
} DEBUG_DATA_X64_FX_SAVE_STATE;
///
/// x64 processor context definition
///
typedef struct {
UINT64 ExceptionData;
DEBUG_DATA_X64_FX_SAVE_STATE FxSaveState;
UINT64 Dr0;
UINT64 Dr1;
UINT64 Dr2;
UINT64 Dr3;
UINT64 Dr6;
UINT64 Dr7;
UINT64 Eflags;
UINT64 Ldtr;
UINT64 Tr;
UINT64 Gdtr[2];
UINT64 Idtr[2];
UINT64 Eip;
UINT64 Gs;
UINT64 Fs;
UINT64 Es;
UINT64 Ds;
UINT64 Cs;
UINT64 Ss;
UINT64 Cr0;
UINT64 Cr1; ///< Reserved
UINT64 Cr2;
UINT64 Cr3;
UINT64 Cr4;
UINT64 Rdi;
UINT64 Rsi;
UINT64 Rbp;
UINT64 Rsp;
UINT64 Rdx;
UINT64 Rcx;
UINT64 Rbx;
UINT64 Rax;
UINT64 Cr8;
UINT64 R8;
UINT64 R9;
UINT64 R10;
UINT64 R11;
UINT64 R12;
UINT64 R13;
UINT64 R14;
UINT64 R15;
UINT64 ExceptionData;
DEBUG_DATA_X64_FX_SAVE_STATE FxSaveState;
UINT64 Dr0;
UINT64 Dr1;
UINT64 Dr2;
UINT64 Dr3;
UINT64 Dr6;
UINT64 Dr7;
UINT64 Eflags;
UINT64 Ldtr;
UINT64 Tr;
UINT64 Gdtr[2];
UINT64 Idtr[2];
UINT64 Eip;
UINT64 Gs;
UINT64 Fs;
UINT64 Es;
UINT64 Ds;
UINT64 Cs;
UINT64 Ss;
UINT64 Cr0;
UINT64 Cr1; ///< Reserved
UINT64 Cr2;
UINT64 Cr3;
UINT64 Cr4;
UINT64 Rdi;
UINT64 Rsi;
UINT64 Rbp;
UINT64 Rsp;
UINT64 Rdx;
UINT64 Rcx;
UINT64 Rbx;
UINT64 Rax;
UINT64 Cr8;
UINT64 R8;
UINT64 R9;
UINT64 R10;
UINT64 R11;
UINT64 R12;
UINT64 R13;
UINT64 R14;
UINT64 R15;
} DEBUG_DATA_X64_SYSTEM_CONTEXT;
#pragma pack()
#endif

View File

@ -19,4 +19,3 @@
#define DEBUG_AGENT_IMAGE_CONTINUE 0x01
#endif

View File

@ -9,7 +9,7 @@
#ifndef __DEBUG_COMMUNICATION_LIB_H__
#define __DEBUG_COMMUNICATION_LIB_H__
typedef VOID * DEBUG_PORT_HANDLE;
typedef VOID *DEBUG_PORT_HANDLE;
/**
Caller provided function to be invoked at the end of DebugPortInitialize().
@ -22,7 +22,7 @@ typedef VOID * DEBUG_PORT_HANDLE;
**/
typedef
VOID
(EFIAPI * DEBUG_PORT_CONTINUE)(
(EFIAPI *DEBUG_PORT_CONTINUE)(
IN VOID *Context,
IN DEBUG_PORT_HANDLE DebugPortHandle
);
@ -70,7 +70,6 @@ DebugPortInitialize (
IN DEBUG_PORT_CONTINUE Function
);
/**
Read data from debug device and save the datas in buffer.
@ -91,13 +90,12 @@ DebugPortInitialize (
UINTN
EFIAPI
DebugPortReadBuffer (
IN DEBUG_PORT_HANDLE Handle,
IN UINT8 *Buffer,
IN UINTN NumberOfBytes,
IN UINTN Timeout
IN DEBUG_PORT_HANDLE Handle,
IN UINT8 *Buffer,
IN UINTN NumberOfBytes,
IN UINTN Timeout
);
/**
Write data from buffer to debug device.
@ -118,9 +116,9 @@ DebugPortReadBuffer (
UINTN
EFIAPI
DebugPortWriteBuffer (
IN DEBUG_PORT_HANDLE Handle,
IN UINT8 *Buffer,
IN UINTN NumberOfBytes
IN DEBUG_PORT_HANDLE Handle,
IN UINT8 *Buffer,
IN UINTN NumberOfBytes
);
/**
@ -139,8 +137,7 @@ DebugPortWriteBuffer (
BOOLEAN
EFIAPI
DebugPortPollBuffer (
IN DEBUG_PORT_HANDLE Handle
IN DEBUG_PORT_HANDLE Handle
);
#endif

View File

@ -16,19 +16,19 @@
// Current revision of transfer protocol
// 0.4: Packet compression and decompression.
//
#define DEBUG_AGENT_REVISION_03 ((0 << 16) | 03)
#define DEBUG_AGENT_REVISION_04 ((0 << 16) | 04)
#define DEBUG_AGENT_CAPABILITIES 0
#define DEBUG_AGENT_REVISION_03 ((0 << 16) | 03)
#define DEBUG_AGENT_REVISION_04 ((0 << 16) | 04)
#define DEBUG_AGENT_CAPABILITIES 0
//
// Definitions for the (A)ttach command
//
#define DEBUG_STARTING_SYMBOL_ATTACH (0xFA)
#define DEBUG_STARTING_SYMBOL_ATTACH (0xFA)
//
// Definition for starting symbol of a normal debug packet. Choose a non-ASCII to avoid conflict with other serial output.
//
#define DEBUG_STARTING_SYMBOL_NORMAL (0xFE)
#define DEBUG_STARTING_SYMBOL_NORMAL (0xFE)
//
// Definition for starting symbol of a (C)ompressed debug packet. Choose a non-ASCII to avoid conflict with other serial output.
@ -41,66 +41,66 @@
// Definition for debug packet header for debug packets (not including attach command)
//
typedef struct {
UINT8 StartSymbol;
UINT8 Command;
UINT8 Length; // Length of Debug Packet including header and payload in byte
UINT8 SequenceNo;
UINT16 Crc;
UINT8 StartSymbol;
UINT8 Command;
UINT8 Length; // Length of Debug Packet including header and payload in byte
UINT8 SequenceNo;
UINT16 Crc;
} DEBUG_PACKET_HEADER;
//
// Definition for Command field for debug packets
//
#define DEBUG_COMMAND_REQUEST (0 << 7)
#define DEBUG_COMMAND_RESPONSE (1 << 7)
#define DEBUG_COMMAND_REQUEST (0 << 7)
#define DEBUG_COMMAND_RESPONSE (1 << 7)
#define IS_REQUEST(x) (((x)->Command & DEBUG_COMMAND_RESPONSE) == 0)
#define IS_REQUEST(x) (((x)->Command & DEBUG_COMMAND_RESPONSE) == 0)
//
// HOST initiated commands
//
#define DEBUG_COMMAND_RESET (DEBUG_COMMAND_REQUEST | 0x00)
#define DEBUG_COMMAND_GO (DEBUG_COMMAND_REQUEST | 0x01)
#define DEBUG_COMMAND_BREAK_CAUSE (DEBUG_COMMAND_REQUEST | 0x02)
#define DEBUG_COMMAND_SET_HW_BREAKPOINT (DEBUG_COMMAND_REQUEST | 0x03)
#define DEBUG_COMMAND_CLEAR_HW_BREAKPOINT (DEBUG_COMMAND_REQUEST | 0x04)
#define DEBUG_COMMAND_SINGLE_STEPPING (DEBUG_COMMAND_REQUEST | 0x05)
#define DEBUG_COMMAND_SET_SW_BREAKPOINT (DEBUG_COMMAND_REQUEST | 0x06)
#define DEBUG_COMMAND_READ_MEMORY (DEBUG_COMMAND_REQUEST | 0x07)
#define DEBUG_COMMAND_WRITE_MEMORY (DEBUG_COMMAND_REQUEST | 0x08)
#define DEBUG_COMMAND_READ_IO (DEBUG_COMMAND_REQUEST | 0x09)
#define DEBUG_COMMAND_WRITE_IO (DEBUG_COMMAND_REQUEST | 0x0A)
#define DEBUG_COMMAND_READ_REGISTER (DEBUG_COMMAND_REQUEST | 0x0B)
#define DEBUG_COMMAND_WRITE_REGISTER (DEBUG_COMMAND_REQUEST | 0x0C)
#define DEBUG_COMMAND_READ_ALL_REGISTERS (DEBUG_COMMAND_REQUEST | 0x0D)
#define DEBUG_COMMAND_ARCH_MODE (DEBUG_COMMAND_REQUEST | 0x0E)
#define DEBUG_COMMAND_READ_MSR (DEBUG_COMMAND_REQUEST | 0x0F)
#define DEBUG_COMMAND_WRITE_MSR (DEBUG_COMMAND_REQUEST | 0x10)
#define DEBUG_COMMAND_SET_DEBUG_SETTING (DEBUG_COMMAND_REQUEST | 0x11)
#define DEBUG_COMMAND_GET_REVISION (DEBUG_COMMAND_REQUEST | 0x12)
#define DEBUG_COMMAND_GET_EXCEPTION (DEBUG_COMMAND_REQUEST | 0x13)
#define DEBUG_COMMAND_SET_VIEWPOINT (DEBUG_COMMAND_REQUEST | 0x14)
#define DEBUG_COMMAND_GET_VIEWPOINT (DEBUG_COMMAND_REQUEST | 0x15)
#define DEBUG_COMMAND_DETACH (DEBUG_COMMAND_REQUEST | 0x16)
#define DEBUG_COMMAND_CPUID (DEBUG_COMMAND_REQUEST | 0x17)
#define DEBUG_COMMAND_SEARCH_SIGNATURE (DEBUG_COMMAND_REQUEST | 0x18)
#define DEBUG_COMMAND_HALT (DEBUG_COMMAND_REQUEST | 0x19)
#define DEBUG_COMMAND_RESET (DEBUG_COMMAND_REQUEST | 0x00)
#define DEBUG_COMMAND_GO (DEBUG_COMMAND_REQUEST | 0x01)
#define DEBUG_COMMAND_BREAK_CAUSE (DEBUG_COMMAND_REQUEST | 0x02)
#define DEBUG_COMMAND_SET_HW_BREAKPOINT (DEBUG_COMMAND_REQUEST | 0x03)
#define DEBUG_COMMAND_CLEAR_HW_BREAKPOINT (DEBUG_COMMAND_REQUEST | 0x04)
#define DEBUG_COMMAND_SINGLE_STEPPING (DEBUG_COMMAND_REQUEST | 0x05)
#define DEBUG_COMMAND_SET_SW_BREAKPOINT (DEBUG_COMMAND_REQUEST | 0x06)
#define DEBUG_COMMAND_READ_MEMORY (DEBUG_COMMAND_REQUEST | 0x07)
#define DEBUG_COMMAND_WRITE_MEMORY (DEBUG_COMMAND_REQUEST | 0x08)
#define DEBUG_COMMAND_READ_IO (DEBUG_COMMAND_REQUEST | 0x09)
#define DEBUG_COMMAND_WRITE_IO (DEBUG_COMMAND_REQUEST | 0x0A)
#define DEBUG_COMMAND_READ_REGISTER (DEBUG_COMMAND_REQUEST | 0x0B)
#define DEBUG_COMMAND_WRITE_REGISTER (DEBUG_COMMAND_REQUEST | 0x0C)
#define DEBUG_COMMAND_READ_ALL_REGISTERS (DEBUG_COMMAND_REQUEST | 0x0D)
#define DEBUG_COMMAND_ARCH_MODE (DEBUG_COMMAND_REQUEST | 0x0E)
#define DEBUG_COMMAND_READ_MSR (DEBUG_COMMAND_REQUEST | 0x0F)
#define DEBUG_COMMAND_WRITE_MSR (DEBUG_COMMAND_REQUEST | 0x10)
#define DEBUG_COMMAND_SET_DEBUG_SETTING (DEBUG_COMMAND_REQUEST | 0x11)
#define DEBUG_COMMAND_GET_REVISION (DEBUG_COMMAND_REQUEST | 0x12)
#define DEBUG_COMMAND_GET_EXCEPTION (DEBUG_COMMAND_REQUEST | 0x13)
#define DEBUG_COMMAND_SET_VIEWPOINT (DEBUG_COMMAND_REQUEST | 0x14)
#define DEBUG_COMMAND_GET_VIEWPOINT (DEBUG_COMMAND_REQUEST | 0x15)
#define DEBUG_COMMAND_DETACH (DEBUG_COMMAND_REQUEST | 0x16)
#define DEBUG_COMMAND_CPUID (DEBUG_COMMAND_REQUEST | 0x17)
#define DEBUG_COMMAND_SEARCH_SIGNATURE (DEBUG_COMMAND_REQUEST | 0x18)
#define DEBUG_COMMAND_HALT (DEBUG_COMMAND_REQUEST | 0x19)
//
// TARGET initiated commands
//
#define DEBUG_COMMAND_INIT_BREAK (DEBUG_COMMAND_REQUEST | 0x3F)
#define DEBUG_COMMAND_BREAK_POINT (DEBUG_COMMAND_REQUEST | 0x3E)
#define DEBUG_COMMAND_MEMORY_READY (DEBUG_COMMAND_REQUEST | 0x3D)
#define DEBUG_COMMAND_PRINT_MESSAGE (DEBUG_COMMAND_REQUEST | 0x3C)
#define DEBUG_COMMAND_ATTACH_BREAK (DEBUG_COMMAND_REQUEST | 0x3B)
#define DEBUG_COMMAND_INIT_BREAK (DEBUG_COMMAND_REQUEST | 0x3F)
#define DEBUG_COMMAND_BREAK_POINT (DEBUG_COMMAND_REQUEST | 0x3E)
#define DEBUG_COMMAND_MEMORY_READY (DEBUG_COMMAND_REQUEST | 0x3D)
#define DEBUG_COMMAND_PRINT_MESSAGE (DEBUG_COMMAND_REQUEST | 0x3C)
#define DEBUG_COMMAND_ATTACH_BREAK (DEBUG_COMMAND_REQUEST | 0x3B)
//
// Response commands
//
#define DEBUG_COMMAND_OK (DEBUG_COMMAND_RESPONSE | 0x00)
#define DEBUG_COMMAND_RESEND (DEBUG_COMMAND_RESPONSE | 0x01)
#define DEBUG_COMMAND_ABORT (DEBUG_COMMAND_RESPONSE | 0x02)
#define DEBUG_COMMAND_OK (DEBUG_COMMAND_RESPONSE | 0x00)
#define DEBUG_COMMAND_RESEND (DEBUG_COMMAND_RESPONSE | 0x01)
#define DEBUG_COMMAND_ABORT (DEBUG_COMMAND_RESPONSE | 0x02)
//
// The below 2 commands are used when transferring big data (like > ~250 bytes).
// The sequence is:
@ -112,32 +112,32 @@ typedef struct {
// <= OK with the last part of data
// OK (no data as ACK) =>
//
#define DEBUG_COMMAND_IN_PROGRESS (DEBUG_COMMAND_RESPONSE | 0x03)
#define DEBUG_COMMAND_CONTINUE (DEBUG_COMMAND_RESPONSE | 0x04)
#define DEBUG_COMMAND_IN_PROGRESS (DEBUG_COMMAND_RESPONSE | 0x03)
#define DEBUG_COMMAND_CONTINUE (DEBUG_COMMAND_RESPONSE | 0x04)
//
// The below 2 commands are used to support deferred halt:
// TARGET returns HALT_DEFERRED when it receives a HALT request in inter-active mode.
// TARGET returns HALT_PROCESSED when it receives a GO request and has a pending HALT request.
//
#define DEBUG_COMMAND_HALT_DEFERRED (DEBUG_COMMAND_RESPONSE | 0x05)
#define DEBUG_COMMAND_HALT_PROCESSED (DEBUG_COMMAND_RESPONSE | 0x06)
#define DEBUG_COMMAND_HALT_DEFERRED (DEBUG_COMMAND_RESPONSE | 0x05)
#define DEBUG_COMMAND_HALT_PROCESSED (DEBUG_COMMAND_RESPONSE | 0x06)
#define DEBUG_COMMAND_TIMEOUT (DEBUG_COMMAND_RESPONSE | 0x07)
#define DEBUG_COMMAND_NOT_SUPPORTED (DEBUG_COMMAND_RESPONSE | 0x0F)
#define DEBUG_COMMAND_TIMEOUT (DEBUG_COMMAND_RESPONSE | 0x07)
#define DEBUG_COMMAND_NOT_SUPPORTED (DEBUG_COMMAND_RESPONSE | 0x0F)
//
// Definition for data field for debug packets
//
#define DEBUG_DATA_UPPER_LIMIT 0xff // Upper limit for the data size, by the limit of the packet header definition.
#define DEBUG_DATA_UPPER_LIMIT 0xff // Upper limit for the data size, by the limit of the packet header definition.
#define DEBUG_DATA_MAXIMUM_REAL_DATA (DEBUG_DATA_UPPER_LIMIT - sizeof (DEBUG_PACKET_HEADER))
#define DEBUG_DATA_MAXIMUM_REAL_DATA (DEBUG_DATA_UPPER_LIMIT - sizeof (DEBUG_PACKET_HEADER))
//
// Response data for DEBUG_COMMAND_BREAK_CAUSE
//
typedef struct {
UINT8 Cause;
UINT64 StopAddress;
UINT8 Cause;
UINT64 StopAddress;
} DEBUG_DATA_RESPONSE_BREAK_CAUSE;
//
// Break type definitions for DEBUG_DATA_BREAK_CAUSE
@ -157,153 +157,153 @@ typedef struct {
// Response data for DEBUG_COMMAND_ARCH_MODE, defined as SOFT_DEBUGGER_PROCESSOR_...
//
typedef struct {
UINT8 CpuMode;
UINT8 CpuMode;
} DEBUG_DATA_RESPONSE_ARCH_MODE;
//
// Cpu architecture definitions for DEBUG_DATA_RESPONSE_ARCH_MODE
//
#define DEBUG_DATA_BREAK_CPU_ARCH_IA16 0
#define DEBUG_DATA_BREAK_CPU_ARCH_IA32 1
#define DEBUG_DATA_BREAK_CPU_ARCH_X64 2
#define DEBUG_DATA_BREAK_CPU_ARCH_IA16 0
#define DEBUG_DATA_BREAK_CPU_ARCH_IA32 1
#define DEBUG_DATA_BREAK_CPU_ARCH_X64 2
typedef struct {
UINT8 Length:2; // Refer to below DEBUG_DATA_BREAKPOINT_LENGTH_XX macros
UINT8 Access:2; // Refer to below DEBUG_DATA_BREAKPOINT_ACCESS_XX macros
UINT8 Index:2; // Index of debug register
UINT8 Reserved:2;
UINT8 Length : 2; // Refer to below DEBUG_DATA_BREAKPOINT_LENGTH_XX macros
UINT8 Access : 2; // Refer to below DEBUG_DATA_BREAKPOINT_ACCESS_XX macros
UINT8 Index : 2; // Index of debug register
UINT8 Reserved : 2;
} DEBUG_DATA_BREAKPOINT_TYPE;
#define DEBUG_DATA_BREAKPOINT_MEMORY_ACCESS (0x3)
#define DEBUG_DATA_BREAKPOINT_IO_ACCESS (0x2)
#define DEBUG_DATA_BREAKPOINT_MEMORY_WRITE (0x1)
#define DEBUG_DATA_BREAKPOINT_MEMORY_EXECUTE (0x0)
#define DEBUG_DATA_BREAKPOINT_LENGTH_32 (0x3)
#define DEBUG_DATA_BREAKPOINT_LENGTH_64 (0x2)
#define DEBUG_DATA_BREAKPOINT_LENGTH_16 (0x1)
#define DEBUG_DATA_BREAKPOINT_LENGTH_8 (0x0)
#define DEBUG_DATA_BREAKPOINT_MEMORY_ACCESS (0x3)
#define DEBUG_DATA_BREAKPOINT_IO_ACCESS (0x2)
#define DEBUG_DATA_BREAKPOINT_MEMORY_WRITE (0x1)
#define DEBUG_DATA_BREAKPOINT_MEMORY_EXECUTE (0x0)
#define DEBUG_DATA_BREAKPOINT_LENGTH_32 (0x3)
#define DEBUG_DATA_BREAKPOINT_LENGTH_64 (0x2)
#define DEBUG_DATA_BREAKPOINT_LENGTH_16 (0x1)
#define DEBUG_DATA_BREAKPOINT_LENGTH_8 (0x0)
//
// Request data for DEBUG_COMMAND_SET_HW_BREAKPOINT
//
typedef struct {
DEBUG_DATA_BREAKPOINT_TYPE Type;
UINT64 Address;
DEBUG_DATA_BREAKPOINT_TYPE Type;
UINT64 Address;
} DEBUG_DATA_SET_HW_BREAKPOINT;
//
// Request data for DEBUG_COMMAND_CLEAR_HW_BREAKPOINT
//
typedef struct {
UINT8 IndexMask; // 0x0f will clear all hw breakpoints
UINT8 IndexMask; // 0x0f will clear all hw breakpoints
} DEBUG_DATA_CLEAR_HW_BREAKPOINT;
//
// Request and response data for DEBUG_COMMAND_SET_SW_BREAKPOINT
//
typedef struct {
UINT64 Address;
UINT64 Address;
} DEBUG_DATA_SET_SW_BREAKPOINT;
typedef struct {
UINT8 OriginalData;
UINT8 OriginalData;
} DEBUG_DATA_RESPONSE_SET_SW_BREAKPOINT;
//
// Request data for DEBUG_COMMAND_READ_MEMORY
//
typedef struct {
UINT64 Address;
UINT8 Width;
UINT16 Count;
UINT64 Address;
UINT8 Width;
UINT16 Count;
} DEBUG_DATA_READ_MEMORY;
//
// Request data for DEBUG_COMMAND_WRITE_MEMORY
//
typedef struct {
UINT64 Address;
UINT8 Width;
UINT16 Count;
UINT8 Data[1]; // The actual length is (Width * Count)
UINT64 Address;
UINT8 Width;
UINT16 Count;
UINT8 Data[1]; // The actual length is (Width * Count)
} DEBUG_DATA_WRITE_MEMORY;
//
// Request and response data for DEBUG_COMMAND_READ_IO
//
typedef struct {
UINT64 Port;
UINT8 Width;
UINT64 Port;
UINT8 Width;
} DEBUG_DATA_READ_IO;
typedef struct {
UINT8 Data[1]; // The actual length depends on the packet header
UINT8 Data[1]; // The actual length depends on the packet header
} DEBUG_DATA_RESPONSE_READ_IO;
//
// Request data for DEBUG_COMMAND_WRITE_IO
//
typedef struct {
UINT64 Port;
UINT8 Width;
UINT8 Data[1]; // The actual length is Width
UINT64 Port;
UINT8 Width;
UINT8 Data[1]; // The actual length is Width
} DEBUG_DATA_WRITE_IO;
//
// Request data for DEBUG_COMMAND_READ_REGISTER
//
typedef struct {
UINT8 Index; // defined as SOFT_DEBUGGER_REGISTER_XX
UINT8 Index; // defined as SOFT_DEBUGGER_REGISTER_XX
} DEBUG_DATA_READ_REGISTER;
//
// Request data for DEBUG_COMMAND_WRITE_REGISTER
//
typedef struct {
UINT8 Index; // defined as SOFT_DEBUGGER_REGISTER_XX
UINT8 Length;
UINT8 Data[1]; // The actual length is Length
UINT8 Index; // defined as SOFT_DEBUGGER_REGISTER_XX
UINT8 Length;
UINT8 Data[1]; // The actual length is Length
} DEBUG_DATA_WRITE_REGISTER;
//
// Request and response data for DEBUG_COMMAND_READ_MSR
//
typedef struct {
UINT32 Index;
UINT32 Index;
} DEBUG_DATA_READ_MSR;
typedef struct {
UINT64 Value;
UINT64 Value;
} DEBUG_DATA_RESPONSE_READ_MSR;
//
// Request data for DEBUG_COMMAND_WRITE_MSR
//
typedef struct {
UINT32 Index;
UINT64 Value;
UINT32 Index;
UINT64 Value;
} DEBUG_DATA_WRITE_MSR;
//
// Response data for DEBUG_COMMAND_GET_REVISION
//
typedef struct {
UINT32 Revision;
UINT32 Capabilities;
UINT32 Revision;
UINT32 Capabilities;
} DEBUG_DATA_RESPONSE_GET_REVISION;
//
// Response data for DEBUG_COMMAND_GET_EXCEPTION
//
typedef struct {
UINT8 ExceptionNum;
UINT32 ExceptionData;
UINT8 ExceptionNum;
UINT32 ExceptionData;
} DEBUG_DATA_RESPONSE_GET_EXCEPTION;
//
// Request data for DEBUG_DATA_SET_DEBUG_SETTING
//
typedef struct {
UINT8 Key;
UINT8 Value;
UINT8 Key;
UINT8 Value;
} DEBUG_DATA_SET_DEBUG_SETTING;
//
// Supported keys
@ -314,57 +314,56 @@ typedef struct {
//
// Bitmask of print error level for debug message
//
#define DEBUG_AGENT_ERROR BIT0
#define DEBUG_AGENT_WARNING BIT1
#define DEBUG_AGENT_INFO BIT2
#define DEBUG_AGENT_VERBOSE BIT3
#define DEBUG_AGENT_ERROR BIT0
#define DEBUG_AGENT_WARNING BIT1
#define DEBUG_AGENT_INFO BIT2
#define DEBUG_AGENT_VERBOSE BIT3
//
// Request data for DEBUG_COMMAND_SET_VIEWPOINT
//
typedef struct {
UINT32 ViewPoint; // The index of viewpoint will be set
UINT32 ViewPoint; // The index of viewpoint will be set
} DEBUG_DATA_SET_VIEWPOINT;
//
// Response data for DEBUG_COMMAND_GET_VIEWPOINT
//
typedef struct {
UINT32 ViewPoint; // The index of viewpoint will be returned
UINT32 ViewPoint; // The index of viewpoint will be returned
} DEBUG_DATA_RESPONSE_GET_VIEWPOINT;
//
// Request and response data for DEBUG_COMMAND_CPUID
//
typedef struct {
UINT32 Eax; // The value of EAX prior to invoking the CPUID instruction
UINT32 Ecx; // The value of ECX prior to invoking the CPUID instruction
UINT32 Eax; // The value of EAX prior to invoking the CPUID instruction
UINT32 Ecx; // The value of ECX prior to invoking the CPUID instruction
} DEBUG_DATA_CPUID;
typedef struct {
UINT32 Eax; // The value of EAX returned by the CPUID instruction
UINT32 Ebx; // The value of EBX returned by the CPUID instruction
UINT32 Ecx; // The value of ECX returned by the CPUID instruction
UINT32 Edx; // The value of EDX returned by the CPUID instruction
UINT32 Eax; // The value of EAX returned by the CPUID instruction
UINT32 Ebx; // The value of EBX returned by the CPUID instruction
UINT32 Ecx; // The value of ECX returned by the CPUID instruction
UINT32 Edx; // The value of EDX returned by the CPUID instruction
} DEBUG_DATA_RESPONSE_CPUID;
//
// Request and response data for DEBUG_COMMAND_SEARCH_SIGNATURE
//
typedef struct {
UINT64 Start;
UINT32 Count;
UINT32 Alignment;
BOOLEAN Positive; // TRUE to search in higher address memory
UINT8 DataLength;
UINT8 Data[1];
UINT64 Start;
UINT32 Count;
UINT32 Alignment;
BOOLEAN Positive; // TRUE to search in higher address memory
UINT8 DataLength;
UINT8 Data[1];
} DEBUG_DATA_SEARCH_SIGNATURE;
typedef struct {
UINT64 Address; // -1 indicates not found
UINT64 Address; // -1 indicates not found
} DEBUG_DATA_RESPONSE_SEARCH_SIGNATURE;
#pragma pack()
#endif

View File

@ -41,32 +41,32 @@
//
// These macros may be already defined in DebugAgentLib.h
//
#define DEBUG_AGENT_INIT_PEI 9
#define DEBUG_AGENT_INIT_DXE_LOAD 10
#define DEBUG_AGENT_INIT_DXE_UNLOAD 11
#define DEBUG_AGENT_INIT_THUNK_PEI_IA32TOX64 12
#define DEBUG_AGENT_INIT_PEI 9
#define DEBUG_AGENT_INIT_DXE_LOAD 10
#define DEBUG_AGENT_INIT_DXE_UNLOAD 11
#define DEBUG_AGENT_INIT_THUNK_PEI_IA32TOX64 12
#define DEBUG_INT1_VECTOR DEBUG_EXCEPT_DEBUG
#define DEBUG_INT3_VECTOR DEBUG_EXCEPT_BREAKPOINT
#define DEBUG_TIMER_VECTOR 32
#define DEBUG_MAILBOX_VECTOR 33
#define DEBUG_INT1_VECTOR DEBUG_EXCEPT_DEBUG
#define DEBUG_INT3_VECTOR DEBUG_EXCEPT_BREAKPOINT
#define DEBUG_TIMER_VECTOR 32
#define DEBUG_MAILBOX_VECTOR 33
//
// Timeout value for reading packet (unit is microsecond)
//
#define READ_PACKET_TIMEOUT (500 * 1000)
#define DEBUG_TIMER_INTERVAL (100 * 1000)
#define READ_PACKET_TIMEOUT (500 * 1000)
#define DEBUG_TIMER_INTERVAL (100 * 1000)
#define SOFT_INTERRUPT_SIGNATURE SIGNATURE_32('S','O','F','T')
#define SYSTEM_RESET_SIGNATURE SIGNATURE_32('S','Y','S','R')
#define MEMORY_READY_SIGNATURE SIGNATURE_32('M','E','M','R')
#define SOFT_INTERRUPT_SIGNATURE SIGNATURE_32('S','O','F','T')
#define SYSTEM_RESET_SIGNATURE SIGNATURE_32('S','Y','S','R')
#define MEMORY_READY_SIGNATURE SIGNATURE_32('M','E','M','R')
extern UINTN Exception0Handle;
extern UINTN TimerInterruptHandle;
extern UINT32 ExceptionStubHeaderSize;
extern BOOLEAN mSkipBreakpoint;
extern EFI_VECTOR_HANDOFF_INFO mVectorHandoffInfoDebugAgent[];
extern UINTN mVectorHandoffInfoCount;
extern UINTN Exception0Handle;
extern UINTN TimerInterruptHandle;
extern UINT32 ExceptionStubHeaderSize;
extern BOOLEAN mSkipBreakpoint;
extern EFI_VECTOR_HANDOFF_INFO mVectorHandoffInfoDebugAgent[];
extern UINTN mVectorHandoffInfoCount;
//
// CPU exception information issued by debug agent
@ -75,11 +75,11 @@ typedef struct {
//
// This field is used to save CPU content before executing HOST command
//
BASE_LIBRARY_JUMP_BUFFER JumpBuffer;
BASE_LIBRARY_JUMP_BUFFER JumpBuffer;
//
// This field returns the exception information issued by the HOST command
//
DEBUG_DATA_RESPONSE_GET_EXCEPTION ExceptionContent;
DEBUG_DATA_RESPONSE_GET_EXCEPTION ExceptionContent;
} DEBUG_AGENT_EXCEPTION_BUFFER;
#define DEBUG_AGENT_FLAG_HOST_ATTACHED BIT0
@ -107,38 +107,38 @@ typedef union {
//
// Lower 32 bits to store the status of DebugAgent
//
UINT32 HostAttached : 1; // 1: HOST is attached
UINT32 AgentInProgress : 1; // 1: Debug Agent is communicating with HOST
UINT32 MemoryReady : 1; // 1: Memory is ready
UINT32 SteppingFlag : 1; // 1: Agent is running stepping command
UINT32 CheckMailboxInHob : 1; // 1: Need to check mailbox saved in HOB
UINT32 InitArch : 2; // value of DEBUG_DATA_RESPONSE_ARCH_MODE
UINT32 InterruptFlag : 1; // 1: EFLAGS.IF is set
UINT32 Reserved1 : 24;
UINT32 HostAttached : 1; // 1: HOST is attached
UINT32 AgentInProgress : 1; // 1: Debug Agent is communicating with HOST
UINT32 MemoryReady : 1; // 1: Memory is ready
UINT32 SteppingFlag : 1; // 1: Agent is running stepping command
UINT32 CheckMailboxInHob : 1; // 1: Need to check mailbox saved in HOB
UINT32 InitArch : 2; // value of DEBUG_DATA_RESPONSE_ARCH_MODE
UINT32 InterruptFlag : 1; // 1: EFLAGS.IF is set
UINT32 Reserved1 : 24;
//
// Higher 32bits to control the behavior of DebugAgent
//
UINT32 BreakOnNextSmi : 1; // 1: Break on next SMI
UINT32 PrintErrorLevel : 4; // Bitmask of print error level for debug message
UINT32 BreakOnBootScript : 1; // 1: Break before executing boot script
UINT32 Reserved2 : 26;
UINT32 BreakOnNextSmi : 1; // 1: Break on next SMI
UINT32 PrintErrorLevel : 4; // Bitmask of print error level for debug message
UINT32 BreakOnBootScript : 1; // 1: Break before executing boot script
UINT32 Reserved2 : 26;
} Bits;
UINT64 Uint64;
UINT64 Uint64;
} DEBUG_AGENT_FLAG;
typedef struct {
DEBUG_AGENT_FLAG DebugFlag;
UINT64 DebugPortHandle;
DEBUG_AGENT_FLAG DebugFlag;
UINT64 DebugPortHandle;
//
// Pointer to DEBUG_AGENT_EXCEPTION_BUFFER
//
UINT64 ExceptionBufferPointer;
UINT8 LastAck; // The last ack packet type
UINT8 SequenceNo;
UINT8 HostSequenceNo;
UINT32 DebugTimerFrequency;
UINT8 CheckSum; // Mailbox checksum
UINT8 ToBeCheckSum; // To be Mailbox checksum at the next
UINT64 ExceptionBufferPointer;
UINT8 LastAck; // The last ack packet type
UINT8 SequenceNo;
UINT8 HostSequenceNo;
UINT32 DebugTimerFrequency;
UINT8 CheckSum; // Mailbox checksum
UINT8 ToBeCheckSum; // To be Mailbox checksum at the next
} DEBUG_AGENT_MAILBOX;
#pragma pack()
@ -147,33 +147,32 @@ typedef struct {
///
typedef union {
struct {
UINT32 OffsetLow:16; ///< Offset bits 15..0.
UINT32 Selector:16; ///< Selector.
UINT32 Reserved_0:8; ///< Reserved.
UINT32 GateType:8; ///< Gate Type. See #defines above.
UINT32 OffsetHigh:16; ///< Offset bits 31..16.
UINT32 OffsetLow : 16; ///< Offset bits 15..0.
UINT32 Selector : 16; ///< Selector.
UINT32 Reserved_0 : 8; ///< Reserved.
UINT32 GateType : 8; ///< Gate Type. See #defines above.
UINT32 OffsetHigh : 16; ///< Offset bits 31..16.
} Bits;
UINT64 Uint64;
UINT64 Uint64;
} IA32_IDT_ENTRY;
typedef union {
struct {
UINT32 LimitLow : 16;
UINT32 BaseLow : 16;
UINT32 BaseMid : 8;
UINT32 Type : 4;
UINT32 System : 1;
UINT32 Dpl : 2;
UINT32 Present : 1;
UINT32 LimitHigh : 4;
UINT32 Software : 1;
UINT32 Reserved : 1;
UINT32 DefaultSize : 1;
UINT32 Granularity : 1;
UINT32 BaseHigh : 8;
UINT32 LimitLow : 16;
UINT32 BaseLow : 16;
UINT32 BaseMid : 8;
UINT32 Type : 4;
UINT32 System : 1;
UINT32 Dpl : 2;
UINT32 Present : 1;
UINT32 LimitHigh : 4;
UINT32 Software : 1;
UINT32 Reserved : 1;
UINT32 DefaultSize : 1;
UINT32 Granularity : 1;
UINT32 BaseHigh : 8;
} Bits;
UINT64 Uint64;
UINT64 Uint64;
} IA32_GDT;
/**
@ -197,9 +196,9 @@ InitializeDebugIdt (
**/
UINT8 *
ArchReadRegisterBuffer (
IN DEBUG_CPU_CONTEXT *CpuContext,
IN UINT8 Index,
IN UINT8 *Width
IN DEBUG_CPU_CONTEXT *CpuContext,
IN UINT8 Index,
IN UINT8 *Width
);
/**
@ -216,9 +215,9 @@ ArchReadRegisterBuffer (
**/
RETURN_STATUS
SendDataResponsePacket (
IN UINT8 *Data,
IN UINT16 DataSize,
IN OUT DEBUG_PACKET_HEADER *DebugHeader
IN UINT8 *Data,
IN UINT16 DataSize,
IN OUT DEBUG_PACKET_HEADER *DebugHeader
);
/**
@ -267,8 +266,8 @@ GetDebugPortHandle (
**/
EFI_STATUS
DebugReadBreakSymbol (
IN DEBUG_PORT_HANDLE Handle,
OUT UINT8 *BreakSymbol
IN DEBUG_PORT_HANDLE Handle,
OUT UINT8 *BreakSymbol
);
/**
@ -286,8 +285,8 @@ DebugReadBreakSymbol (
VOID
EFIAPI
DebugAgentMsgPrint (
IN UINT8 ErrorLevel,
IN CHAR8 *Format,
IN UINT8 ErrorLevel,
IN CHAR8 *Format,
...
);
@ -299,7 +298,7 @@ DebugAgentMsgPrint (
**/
VOID
TriggerSoftInterrupt (
IN UINT32 Signature
IN UINT32 Signature
);
/**
@ -322,7 +321,7 @@ MultiProcessorDebugSupport (
**/
VOID
FindAndReportModuleImageInfo (
IN UINTN AlignSize
IN UINTN AlignSize
);
/**
@ -345,7 +344,7 @@ IsDebugAgentInitialzed (
**/
VOID
UpdateMailboxChecksum (
IN DEBUG_AGENT_MAILBOX *Mailbox
IN DEBUG_AGENT_MAILBOX *Mailbox
);
/**
@ -358,7 +357,7 @@ UpdateMailboxChecksum (
**/
VOID
VerifyMailboxChecksum (
IN DEBUG_AGENT_MAILBOX *Mailbox
IN DEBUG_AGENT_MAILBOX *Mailbox
);
/**
@ -370,8 +369,8 @@ VerifyMailboxChecksum (
**/
VOID
SetDebugFlag (
IN UINT64 FlagMask,
IN UINT32 FlagValue
IN UINT64 FlagMask,
IN UINT32 FlagValue
);
/**
@ -384,7 +383,7 @@ SetDebugFlag (
**/
UINT32
GetDebugFlag (
IN UINT64 FlagMask
IN UINT64 FlagMask
);
/**
@ -397,9 +396,9 @@ GetDebugFlag (
**/
VOID
UpdateMailboxContent (
IN DEBUG_AGENT_MAILBOX *Mailbox,
IN UINTN Index,
IN UINT64 Value
IN DEBUG_AGENT_MAILBOX *Mailbox,
IN UINTN Index,
IN UINT64 Value
);
/**
@ -412,7 +411,7 @@ UpdateMailboxContent (
**/
VOID *
GetExceptionHandlerInIdtEntry (
IN UINTN ExceptionNum
IN UINTN ExceptionNum
);
/**
@ -424,8 +423,8 @@ GetExceptionHandlerInIdtEntry (
**/
VOID
SetExceptionHandlerInIdtEntry (
IN UINTN ExceptionNum,
IN VOID *ExceptionHandler
IN UINTN ExceptionNum,
IN VOID *ExceptionHandler
);
/**
@ -446,10 +445,10 @@ SetExceptionHandlerInIdtEntry (
VOID
EFIAPI
DebugAgentDataMsgPrint (
IN UINT8 ErrorLevel,
IN BOOLEAN IsSend,
IN UINT8 *Data,
IN UINT8 Length
IN UINT8 ErrorLevel,
IN BOOLEAN IsSend,
IN UINT8 *Data,
IN UINT8 Length
);
/**
@ -465,8 +464,8 @@ DebugAgentDataMsgPrint (
**/
EFI_STATUS
ReadRemainingBreakPacket (
IN DEBUG_PORT_HANDLE Handle,
IN OUT DEBUG_PACKET_HEADER *DebugHeader
IN DEBUG_PORT_HANDLE Handle,
IN OUT DEBUG_PACKET_HEADER *DebugHeader
);
/**
@ -488,11 +487,10 @@ ReadRemainingBreakPacket (
**/
UINTN
DebugAgentReadBuffer (
IN DEBUG_PORT_HANDLE Handle,
IN OUT UINT8 *Buffer,
IN UINTN NumberOfBytes,
IN UINTN Timeout
IN DEBUG_PORT_HANDLE Handle,
IN OUT UINT8 *Buffer,
IN UINTN NumberOfBytes,
IN UINTN Timeout
);
#endif

View File

@ -8,9 +8,9 @@
#include "DebugAgent.h"
GLOBAL_REMOVE_IF_UNREFERENCED DEBUG_MP_CONTEXT volatile mDebugMpContext = {0,0,0,{0},{0},0,0,0,0,FALSE,FALSE};
GLOBAL_REMOVE_IF_UNREFERENCED DEBUG_MP_CONTEXT volatile mDebugMpContext = { 0, 0, 0, { 0 }, { 0 }, 0, 0, 0, 0, FALSE, FALSE };
GLOBAL_REMOVE_IF_UNREFERENCED DEBUG_CPU_DATA volatile mDebugCpuData = {0};
GLOBAL_REMOVE_IF_UNREFERENCED DEBUG_CPU_DATA volatile mDebugCpuData = { 0 };
/**
Acquire a spin lock when Multi-processor supported.
@ -23,10 +23,10 @@ GLOBAL_REMOVE_IF_UNREFERENCED DEBUG_CPU_DATA volatile mDebugCpuData = {0};
**/
VOID
AcquireMpSpinLock (
IN OUT SPIN_LOCK *MpSpinLock
IN OUT SPIN_LOCK *MpSpinLock
)
{
if (!MultiProcessorDebugSupport()) {
if (!MultiProcessorDebugSupport ()) {
return;
}
@ -34,6 +34,7 @@ AcquireMpSpinLock (
if (AcquireSpinLockOrFail (MpSpinLock)) {
break;
}
CpuPause ();
continue;
}
@ -47,10 +48,10 @@ AcquireMpSpinLock (
**/
VOID
ReleaseMpSpinLock (
IN OUT SPIN_LOCK *MpSpinLock
IN OUT SPIN_LOCK *MpSpinLock
)
{
if (!MultiProcessorDebugSupport()) {
if (!MultiProcessorDebugSupport ()) {
return;
}
@ -65,12 +66,12 @@ ReleaseMpSpinLock (
**/
VOID
HaltOtherProcessors (
IN UINT32 CurrentProcessorIndex
IN UINT32 CurrentProcessorIndex
)
{
DebugAgentMsgPrint (DEBUG_AGENT_INFO, "processor[%x]:Try to halt other processors.\n", CurrentProcessorIndex);
if (!DebugAgentIsBsp (CurrentProcessorIndex)) {
SetIpiSentByApFlag (TRUE);;
SetIpiSentByApFlag (TRUE);
}
mDebugMpContext.BreakAtCpuIndex = CurrentProcessorIndex;
@ -84,7 +85,6 @@ HaltOtherProcessors (
// Send fixed IPI to other processors.
//
SendFixedIpiAllExcludingSelf (DEBUG_TIMER_VECTOR);
}
/**
@ -98,14 +98,14 @@ GetProcessorIndex (
VOID
)
{
UINT32 Index;
UINT16 LocalApicID;
UINT32 Index;
UINT16 LocalApicID;
LocalApicID = (UINT16) GetApicId ();
LocalApicID = (UINT16)GetApicId ();
AcquireMpSpinLock (&mDebugMpContext.MpContextSpinLock);
for (Index = 0; Index < mDebugCpuData.CpuCount; Index ++) {
for (Index = 0; Index < mDebugCpuData.CpuCount; Index++) {
if (mDebugCpuData.ApicID[Index] == LocalApicID) {
break;
}
@ -113,7 +113,7 @@ GetProcessorIndex (
if (Index == mDebugCpuData.CpuCount) {
mDebugCpuData.ApicID[Index] = LocalApicID;
mDebugCpuData.CpuCount ++ ;
mDebugCpuData.CpuCount++;
}
ReleaseMpSpinLock (&mDebugMpContext.MpContextSpinLock);
@ -153,6 +153,7 @@ DebugAgentIsBsp (
mDebugMpContext.BspIndex = ProcessorIndex;
ReleaseMpSpinLock (&mDebugMpContext.MpContextSpinLock);
}
return TRUE;
} else {
return FALSE;
@ -169,12 +170,12 @@ DebugAgentIsBsp (
**/
VOID
SetCpuStopFlagByIndex (
IN UINT32 ProcessorIndex,
IN BOOLEAN StopFlag
IN UINT32 ProcessorIndex,
IN BOOLEAN StopFlag
)
{
UINT8 Value;
UINTN Index;
UINT8 Value;
UINTN Index;
AcquireMpSpinLock (&mDebugMpContext.MpContextSpinLock);
@ -185,6 +186,7 @@ SetCpuStopFlagByIndex (
} else {
Value = BitFieldWrite8 (Value, Index, Index, 0);
}
mDebugMpContext.CpuStopStatusMask[ProcessorIndex / 8] = Value;
ReleaseMpSpinLock (&mDebugMpContext.MpContextSpinLock);
@ -200,12 +202,12 @@ SetCpuStopFlagByIndex (
**/
VOID
SetCpuBreakFlagByIndex (
IN UINT32 ProcessorIndex,
IN BOOLEAN BreakFlag
IN UINT32 ProcessorIndex,
IN BOOLEAN BreakFlag
)
{
UINT8 Value;
UINTN Index;
UINT8 Value;
UINTN Index;
AcquireMpSpinLock (&mDebugMpContext.MpContextSpinLock);
@ -216,6 +218,7 @@ SetCpuBreakFlagByIndex (
} else {
Value = BitFieldWrite8 (Value, Index, Index, 0);
}
mDebugMpContext.CpuBreakMask[ProcessorIndex / 8] = Value;
ReleaseMpSpinLock (&mDebugMpContext.MpContextSpinLock);
@ -232,12 +235,12 @@ SetCpuBreakFlagByIndex (
**/
BOOLEAN
IsCpuStopped (
IN UINT32 ProcessorIndex
IN UINT32 ProcessorIndex
)
{
UINT8 CpuMask;
UINT8 CpuMask;
CpuMask = (UINT8) (1 << (ProcessorIndex % 8));
CpuMask = (UINT8)(1 << (ProcessorIndex % 8));
if ((mDebugMpContext.CpuStopStatusMask[ProcessorIndex / 8] & CpuMask) != 0) {
return TRUE;
@ -255,7 +258,7 @@ IsCpuStopped (
**/
VOID
SetCpuRunningFlag (
IN BOOLEAN RunningFlag
IN BOOLEAN RunningFlag
)
{
AcquireMpSpinLock (&mDebugMpContext.MpContextSpinLock);
@ -271,7 +274,7 @@ SetCpuRunningFlag (
**/
VOID
SetDebugViewPoint (
IN UINT32 ProcessorIndex
IN UINT32 ProcessorIndex
)
{
AcquireMpSpinLock (&mDebugMpContext.MpContextSpinLock);
@ -288,7 +291,7 @@ SetDebugViewPoint (
**/
VOID
SetIpiSentByApFlag (
IN BOOLEAN IpiSentByApFlag
IN BOOLEAN IpiSentByApFlag
)
{
AcquireMpSpinLock (&mDebugMpContext.MpContextSpinLock);
@ -309,13 +312,14 @@ FindNextPendingBreakCpu (
VOID
)
{
UINT32 Index;
UINT32 Index;
for (Index = 0; Index < DEBUG_CPU_MAX_COUNT / 8; Index ++) {
for (Index = 0; Index < DEBUG_CPU_MAX_COUNT / 8; Index++) {
if (mDebugMpContext.CpuBreakMask[Index] != 0) {
return (UINT32) LowBitSet32 (mDebugMpContext.CpuBreakMask[Index]) + Index * 8;
return (UINT32)LowBitSet32 (mDebugMpContext.CpuBreakMask[Index]) + Index * 8;
}
}
return (UINT32)-1;
}
@ -331,13 +335,14 @@ IsAllCpuRunning (
VOID
)
{
UINTN Index;
UINTN Index;
for (Index = 0; Index < DEBUG_CPU_MAX_COUNT / 8; Index ++) {
for (Index = 0; Index < DEBUG_CPU_MAX_COUNT / 8; Index++) {
if (mDebugMpContext.CpuStopStatusMask[Index] != 0) {
return FALSE;
}
}
return TRUE;
}
@ -354,11 +359,11 @@ IsAllCpuRunning (
**/
BOOLEAN
IsFirstBreakProcessor (
IN UINT32 ProcessorIndex
IN UINT32 ProcessorIndex
)
{
if (MultiProcessorDebugSupport()) {
if (mDebugMpContext.BreakAtCpuIndex != (UINT32) -1) {
if (MultiProcessorDebugSupport ()) {
if (mDebugMpContext.BreakAtCpuIndex != (UINT32)-1) {
//
// The current processor is not the first breaking one.
//
@ -372,6 +377,6 @@ IsFirstBreakProcessor (
return TRUE;
}
}
return TRUE;
}

View File

@ -9,7 +9,7 @@
#ifndef _DEBUG_MP_H_
#define _DEBUG_MP_H_
#define DEBUG_CPU_MAX_COUNT 256
#define DEBUG_CPU_MAX_COUNT 256
typedef struct {
UINT32 CpuCount; ///< Processor count
@ -17,21 +17,21 @@ typedef struct {
} DEBUG_CPU_DATA;
typedef struct {
SPIN_LOCK MpContextSpinLock; ///< Lock for writing MP context
SPIN_LOCK DebugPortSpinLock; ///< Lock for access debug port
SPIN_LOCK MailboxSpinLock; ///< Lock for accessing mail box
UINT8 CpuBreakMask[DEBUG_CPU_MAX_COUNT/8]; ///< Bitmask of all breaking CPUs
UINT8 CpuStopStatusMask[DEBUG_CPU_MAX_COUNT/8]; ///< Bitmask of CPU stop status
UINT32 ViewPointIndex; ///< Current view point to be debugged
UINT32 BspIndex; ///< Processor index value of BSP
UINT32 BreakAtCpuIndex; ///< Processor index value of the current breaking CPU
UINT32 DebugTimerInitCount; ///< Record BSP's init timer count
BOOLEAN IpiSentByAp; ///< TRUE: IPI is sent by AP. FALSE: IPI is sent by BSP
BOOLEAN RunCommandSet; ///< TRUE: RUN command is executing. FALSE: RUN command has been executed.
SPIN_LOCK MpContextSpinLock; ///< Lock for writing MP context
SPIN_LOCK DebugPortSpinLock; ///< Lock for access debug port
SPIN_LOCK MailboxSpinLock; ///< Lock for accessing mail box
UINT8 CpuBreakMask[DEBUG_CPU_MAX_COUNT/8]; ///< Bitmask of all breaking CPUs
UINT8 CpuStopStatusMask[DEBUG_CPU_MAX_COUNT/8]; ///< Bitmask of CPU stop status
UINT32 ViewPointIndex; ///< Current view point to be debugged
UINT32 BspIndex; ///< Processor index value of BSP
UINT32 BreakAtCpuIndex; ///< Processor index value of the current breaking CPU
UINT32 DebugTimerInitCount; ///< Record BSP's init timer count
BOOLEAN IpiSentByAp; ///< TRUE: IPI is sent by AP. FALSE: IPI is sent by BSP
BOOLEAN RunCommandSet; ///< TRUE: RUN command is executing. FALSE: RUN command has been executed.
} DEBUG_MP_CONTEXT;
extern DEBUG_MP_CONTEXT volatile mDebugMpContext;
extern DEBUG_CPU_DATA volatile mDebugCpuData;
extern DEBUG_MP_CONTEXT volatile mDebugMpContext;
extern DEBUG_CPU_DATA volatile mDebugCpuData;
/**
Break the other processor by send IPI.
@ -41,7 +41,7 @@ extern DEBUG_CPU_DATA volatile mDebugCpuData;
**/
VOID
HaltOtherProcessors (
IN UINT32 CurrentProcessorIndex
IN UINT32 CurrentProcessorIndex
);
/**
@ -66,7 +66,7 @@ GetProcessorIndex (
**/
VOID
AcquireMpSpinLock (
IN OUT SPIN_LOCK *MpSpinLock
IN OUT SPIN_LOCK *MpSpinLock
);
/**
@ -77,7 +77,7 @@ AcquireMpSpinLock (
**/
VOID
ReleaseMpSpinLock (
IN OUT SPIN_LOCK *MpSpinLock
IN OUT SPIN_LOCK *MpSpinLock
);
/**
@ -91,7 +91,7 @@ ReleaseMpSpinLock (
**/
BOOLEAN
DebugAgentIsBsp (
IN UINT32 ProcessorIndex
IN UINT32 ProcessorIndex
);
/**
@ -104,8 +104,8 @@ DebugAgentIsBsp (
**/
VOID
SetCpuStopFlagByIndex (
IN UINT32 ProcessorIndex,
IN BOOLEAN StopFlag
IN UINT32 ProcessorIndex,
IN BOOLEAN StopFlag
);
/**
@ -118,8 +118,8 @@ SetCpuStopFlagByIndex (
**/
VOID
SetCpuBreakFlagByIndex (
IN UINT32 ProcessorIndex,
IN BOOLEAN BreakFlag
IN UINT32 ProcessorIndex,
IN BOOLEAN BreakFlag
);
/**
@ -133,7 +133,7 @@ SetCpuBreakFlagByIndex (
**/
BOOLEAN
IsCpuStopped (
IN UINT32 ProcessorIndex
IN UINT32 ProcessorIndex
);
/**
@ -145,7 +145,7 @@ IsCpuStopped (
**/
VOID
SetCpuRunningFlag (
IN BOOLEAN RunningFlag
IN BOOLEAN RunningFlag
);
/**
@ -156,7 +156,7 @@ SetCpuRunningFlag (
**/
VOID
SetDebugViewPoint (
IN UINT32 ProcessorIndex
IN UINT32 ProcessorIndex
);
/**
@ -168,7 +168,7 @@ SetDebugViewPoint (
**/
VOID
SetIpiSentByApFlag (
IN BOOLEAN IpiSentByApFlag
IN BOOLEAN IpiSentByApFlag
);
/**
@ -209,8 +209,7 @@ IsAllCpuRunning (
**/
BOOLEAN
IsFirstBreakProcessor (
IN UINT32 ProcessorIndex
IN UINT32 ProcessorIndex
);
#endif

View File

@ -18,27 +18,27 @@
**/
UINT32
InitializeDebugTimer (
OUT UINT32 *TimerFrequency,
IN BOOLEAN DumpFlag
OUT UINT32 *TimerFrequency,
IN BOOLEAN DumpFlag
)
{
UINTN ApicTimerDivisor;
UINT32 InitialCount;
UINT32 ApicTimerFrequency;
UINTN ApicTimerDivisor;
UINT32 InitialCount;
UINT32 ApicTimerFrequency;
InitializeLocalApicSoftwareEnable (TRUE);
GetApicTimerState (&ApicTimerDivisor, NULL, NULL);
ApicTimerFrequency = PcdGet32(PcdFSBClock) / (UINT32)ApicTimerDivisor;
ApicTimerFrequency = PcdGet32 (PcdFSBClock) / (UINT32)ApicTimerDivisor;
//
// Cpu Local Apic timer interrupt frequency, it is set to 0.1s
//
InitialCount = (UINT32)DivU64x32 (
MultU64x64 (
ApicTimerFrequency,
DEBUG_TIMER_INTERVAL
),
1000000u
);
MultU64x64 (
ApicTimerFrequency,
DEBUG_TIMER_INTERVAL
),
1000000u
);
InitializeApicTimer (ApicTimerDivisor, InitialCount, TRUE, DEBUG_TIMER_VECTOR);
//
@ -48,14 +48,16 @@ InitializeDebugTimer (
DisableApicTimerInterrupt ();
if (DumpFlag) {
DEBUG ((DEBUG_INFO, "Debug Timer: FSB Clock = %d\n", PcdGet32(PcdFSBClock)));
DEBUG ((DEBUG_INFO, "Debug Timer: FSB Clock = %d\n", PcdGet32 (PcdFSBClock)));
DEBUG ((DEBUG_INFO, "Debug Timer: Divisor = %d\n", ApicTimerDivisor));
DEBUG ((DEBUG_INFO, "Debug Timer: Frequency = %d\n", ApicTimerFrequency));
DEBUG ((DEBUG_INFO, "Debug Timer: InitialCount = %d\n", InitialCount));
}
if (TimerFrequency != NULL) {
*TimerFrequency = ApicTimerFrequency;
}
return InitialCount;
}
@ -75,10 +77,10 @@ InitializeDebugTimer (
BOOLEAN
EFIAPI
SaveAndSetDebugTimerInterrupt (
IN BOOLEAN EnableStatus
IN BOOLEAN EnableStatus
)
{
BOOLEAN OldDebugTimerInterruptState;
BOOLEAN OldDebugTimerInterruptState;
OldDebugTimerInterruptState = GetApicTimerInterruptState ();
@ -88,6 +90,7 @@ SaveAndSetDebugTimerInterrupt (
} else {
DisableApicTimerInterrupt ();
}
//
// Validate the Debug Timer interrupt state
// This will make additional delay after Local Apic Timer interrupt state is changed.
@ -114,9 +117,9 @@ SaveAndSetDebugTimerInterrupt (
**/
BOOLEAN
IsDebugTimerTimeout (
IN UINT32 TimerCycle,
IN UINT32 Timer,
IN UINT32 TimeoutTicker
IN UINT32 TimerCycle,
IN UINT32 Timer,
IN UINT32 TimeoutTicker
)
{
UINT64 CurrentTimer;
@ -138,5 +141,5 @@ IsDebugTimerTimeout (
Delta = TimerCycle - (CurrentTimer - Timer) + 1;
}
return (BOOLEAN) (Delta >= TimeoutTicker);
return (BOOLEAN)(Delta >= TimeoutTicker);
}

View File

@ -19,8 +19,8 @@
**/
UINT32
InitializeDebugTimer (
OUT UINT32 *TimerFrequency,
IN BOOLEAN DumpFlag
OUT UINT32 *TimerFrequency,
IN BOOLEAN DumpFlag
);
/**
@ -36,10 +36,9 @@ InitializeDebugTimer (
**/
BOOLEAN
IsDebugTimerTimeout (
IN UINT32 TimerCycle,
IN UINT32 Timer,
IN UINT32 TimeoutTicker
IN UINT32 TimerCycle,
IN UINT32 Timer,
IN UINT32 TimeoutTicker
);
#endif

View File

@ -17,12 +17,12 @@ InitializeDebugIdt (
VOID
)
{
IA32_IDT_GATE_DESCRIPTOR *IdtEntry;
UINTN InterruptHandler;
IA32_DESCRIPTOR IdtDescriptor;
UINTN Index;
UINT16 CodeSegment;
UINT32 RegEdx;
IA32_IDT_GATE_DESCRIPTOR *IdtEntry;
UINTN InterruptHandler;
IA32_DESCRIPTOR IdtDescriptor;
UINTN Index;
UINT16 CodeSegment;
UINT32 RegEdx;
AsmReadIdtr (&IdtDescriptor);
@ -31,23 +31,24 @@ InitializeDebugIdt (
//
CodeSegment = AsmReadCs ();
IdtEntry = (IA32_IDT_GATE_DESCRIPTOR *) IdtDescriptor.Base;
IdtEntry = (IA32_IDT_GATE_DESCRIPTOR *)IdtDescriptor.Base;
for (Index = 0; Index < 20; Index ++) {
for (Index = 0; Index < 20; Index++) {
if (((PcdGet32 (PcdExceptionsIgnoredByDebugger) & ~(BIT1 | BIT3)) & (1 << Index)) != 0) {
//
// If the exception is masked to be reserved except for INT1 and INT3, skip it
//
continue;
}
InterruptHandler = (UINTN)&Exception0Handle + Index * ExceptionStubHeaderSize;
InterruptHandler = (UINTN)&Exception0Handle + Index * ExceptionStubHeaderSize;
IdtEntry[Index].Bits.OffsetLow = (UINT16)(UINTN)InterruptHandler;
IdtEntry[Index].Bits.OffsetHigh = (UINT16)((UINTN)InterruptHandler >> 16);
IdtEntry[Index].Bits.Selector = CodeSegment;
IdtEntry[Index].Bits.GateType = IA32_IDT_GATE_TYPE_INTERRUPT_32;
}
InterruptHandler = (UINTN) &TimerInterruptHandle;
InterruptHandler = (UINTN)&TimerInterruptHandle;
IdtEntry[DEBUG_TIMER_VECTOR].Bits.OffsetLow = (UINT16)(UINTN)InterruptHandler;
IdtEntry[DEBUG_TIMER_VECTOR].Bits.OffsetHigh = (UINT16)((UINTN)InterruptHandler >> 16);
IdtEntry[DEBUG_TIMER_VECTOR].Bits.Selector = CodeSegment;
@ -73,16 +74,16 @@ InitializeDebugIdt (
**/
VOID *
GetExceptionHandlerInIdtEntry (
IN UINTN ExceptionNum
IN UINTN ExceptionNum
)
{
IA32_IDT_GATE_DESCRIPTOR *IdtEntry;
IA32_DESCRIPTOR IdtDescriptor;
IA32_IDT_GATE_DESCRIPTOR *IdtEntry;
IA32_DESCRIPTOR IdtDescriptor;
AsmReadIdtr (&IdtDescriptor);
IdtEntry = (IA32_IDT_GATE_DESCRIPTOR *) IdtDescriptor.Base;
IdtEntry = (IA32_IDT_GATE_DESCRIPTOR *)IdtDescriptor.Base;
return (VOID *) (((UINTN)IdtEntry[ExceptionNum].Bits.OffsetLow) |
return (VOID *)(((UINTN)IdtEntry[ExceptionNum].Bits.OffsetLow) |
(((UINTN)IdtEntry[ExceptionNum].Bits.OffsetHigh) << 16));
}
@ -95,16 +96,16 @@ GetExceptionHandlerInIdtEntry (
**/
VOID
SetExceptionHandlerInIdtEntry (
IN UINTN ExceptionNum,
IN VOID *ExceptionHandler
IN UINTN ExceptionNum,
IN VOID *ExceptionHandler
)
{
IA32_IDT_GATE_DESCRIPTOR *IdtEntry;
IA32_DESCRIPTOR IdtDescriptor;
IA32_IDT_GATE_DESCRIPTOR *IdtEntry;
IA32_DESCRIPTOR IdtDescriptor;
AsmReadIdtr (&IdtDescriptor);
IdtEntry = (IA32_IDT_GATE_DESCRIPTOR *) IdtDescriptor.Base;
IdtEntry = (IA32_IDT_GATE_DESCRIPTOR *)IdtDescriptor.Base;
IdtEntry[ExceptionNum].Bits.OffsetLow = (UINT16)(UINTN)ExceptionHandler;
IdtEntry[ExceptionNum].Bits.OffsetHigh = (UINT16)((UINTN)ExceptionHandler >> 16);
IdtEntry[ExceptionNum].Bits.OffsetLow = (UINT16)(UINTN)ExceptionHandler;
IdtEntry[ExceptionNum].Bits.OffsetHigh = (UINT16)((UINTN)ExceptionHandler >> 16);
}

View File

@ -12,10 +12,10 @@
#include "ProcessorContext.h"
#include "TransferProtocol.h"
#define DEBUG_SW_BREAKPOINT_SYMBOL 0xcc
#define DEBUG_ARCH_SYMBOL DEBUG_DATA_BREAK_CPU_ARCH_IA32
#define DEBUG_SW_BREAKPOINT_SYMBOL 0xcc
#define DEBUG_ARCH_SYMBOL DEBUG_DATA_BREAK_CPU_ARCH_IA32
typedef DEBUG_DATA_IA32_FX_SAVE_STATE DEBUG_DATA_FX_SAVE_STATE;
typedef DEBUG_DATA_IA32_SYSTEM_CONTEXT DEBUG_CPU_CONTEXT;
typedef DEBUG_DATA_IA32_FX_SAVE_STATE DEBUG_DATA_FX_SAVE_STATE;
typedef DEBUG_DATA_IA32_SYSTEM_CONTEXT DEBUG_CPU_CONTEXT;
#endif

View File

@ -9,22 +9,22 @@
#ifndef _DEBUG_EXCEPTION_H_
#define _DEBUG_EXCEPTION_H_
#define DEBUG_EXCEPT_DIVIDE_ERROR 0
#define DEBUG_EXCEPT_DEBUG 1
#define DEBUG_EXCEPT_NMI 2
#define DEBUG_EXCEPT_BREAKPOINT 3
#define DEBUG_EXCEPT_OVERFLOW 4
#define DEBUG_EXCEPT_BOUND 5
#define DEBUG_EXCEPT_INVALID_OPCODE 6
#define DEBUG_EXCEPT_DOUBLE_FAULT 8
#define DEBUG_EXCEPT_INVALID_TSS 10
#define DEBUG_EXCEPT_SEG_NOT_PRESENT 11
#define DEBUG_EXCEPT_STACK_FAULT 12
#define DEBUG_EXCEPT_GP_FAULT 13
#define DEBUG_EXCEPT_PAGE_FAULT 14
#define DEBUG_EXCEPT_FP_ERROR 16
#define DEBUG_EXCEPT_ALIGNMENT_CHECK 17
#define DEBUG_EXCEPT_MACHINE_CHECK 18
#define DEBUG_EXCEPT_SIMD 19
#define DEBUG_EXCEPT_DIVIDE_ERROR 0
#define DEBUG_EXCEPT_DEBUG 1
#define DEBUG_EXCEPT_NMI 2
#define DEBUG_EXCEPT_BREAKPOINT 3
#define DEBUG_EXCEPT_OVERFLOW 4
#define DEBUG_EXCEPT_BOUND 5
#define DEBUG_EXCEPT_INVALID_OPCODE 6
#define DEBUG_EXCEPT_DOUBLE_FAULT 8
#define DEBUG_EXCEPT_INVALID_TSS 10
#define DEBUG_EXCEPT_SEG_NOT_PRESENT 11
#define DEBUG_EXCEPT_STACK_FAULT 12
#define DEBUG_EXCEPT_GP_FAULT 13
#define DEBUG_EXCEPT_PAGE_FAULT 14
#define DEBUG_EXCEPT_FP_ERROR 16
#define DEBUG_EXCEPT_ALIGNMENT_CHECK 17
#define DEBUG_EXCEPT_MACHINE_CHECK 18
#define DEBUG_EXCEPT_SIMD 19
#endif

View File

@ -17,12 +17,12 @@ InitializeDebugIdt (
VOID
)
{
IA32_IDT_GATE_DESCRIPTOR *IdtEntry;
UINTN InterruptHandler;
IA32_DESCRIPTOR IdtDescriptor;
UINTN Index;
UINT16 CodeSegment;
UINT32 RegEdx;
IA32_IDT_GATE_DESCRIPTOR *IdtEntry;
UINTN InterruptHandler;
IA32_DESCRIPTOR IdtDescriptor;
UINTN Index;
UINT16 CodeSegment;
UINT32 RegEdx;
AsmReadIdtr (&IdtDescriptor);
@ -31,29 +31,30 @@ InitializeDebugIdt (
//
CodeSegment = AsmReadCs ();
IdtEntry = (IA32_IDT_GATE_DESCRIPTOR *) IdtDescriptor.Base;
IdtEntry = (IA32_IDT_GATE_DESCRIPTOR *)IdtDescriptor.Base;
for (Index = 0; Index < 20; Index ++) {
for (Index = 0; Index < 20; Index++) {
if (((PcdGet32 (PcdExceptionsIgnoredByDebugger) & ~(BIT1 | BIT3)) & (1 << Index)) != 0) {
//
// If the exception is masked to be reserved except for INT1 and INT3, skip it
//
continue;
}
InterruptHandler = (UINTN)&Exception0Handle + Index * ExceptionStubHeaderSize;
IdtEntry[Index].Bits.OffsetLow = (UINT16)(UINTN)InterruptHandler;
IdtEntry[Index].Bits.OffsetHigh = (UINT16)((UINTN)InterruptHandler >> 16);
IdtEntry[Index].Bits.OffsetUpper = (UINT32)((UINTN)InterruptHandler >> 32);
IdtEntry[Index].Bits.Selector = CodeSegment;
IdtEntry[Index].Bits.GateType = IA32_IDT_GATE_TYPE_INTERRUPT_32;
InterruptHandler = (UINTN)&Exception0Handle + Index * ExceptionStubHeaderSize;
IdtEntry[Index].Bits.OffsetLow = (UINT16)(UINTN)InterruptHandler;
IdtEntry[Index].Bits.OffsetHigh = (UINT16)((UINTN)InterruptHandler >> 16);
IdtEntry[Index].Bits.OffsetUpper = (UINT32)((UINTN)InterruptHandler >> 32);
IdtEntry[Index].Bits.Selector = CodeSegment;
IdtEntry[Index].Bits.GateType = IA32_IDT_GATE_TYPE_INTERRUPT_32;
}
InterruptHandler = (UINTN) &TimerInterruptHandle;
IdtEntry[DEBUG_TIMER_VECTOR].Bits.OffsetLow = (UINT16)(UINTN)InterruptHandler;
IdtEntry[DEBUG_TIMER_VECTOR].Bits.OffsetHigh = (UINT16)((UINTN)InterruptHandler >> 16);
IdtEntry[DEBUG_TIMER_VECTOR].Bits.OffsetUpper = (UINT32)((UINTN)InterruptHandler >> 32);
IdtEntry[DEBUG_TIMER_VECTOR].Bits.Selector = CodeSegment;
IdtEntry[DEBUG_TIMER_VECTOR].Bits.GateType = IA32_IDT_GATE_TYPE_INTERRUPT_32;
InterruptHandler = (UINTN)&TimerInterruptHandle;
IdtEntry[DEBUG_TIMER_VECTOR].Bits.OffsetLow = (UINT16)(UINTN)InterruptHandler;
IdtEntry[DEBUG_TIMER_VECTOR].Bits.OffsetHigh = (UINT16)((UINTN)InterruptHandler >> 16);
IdtEntry[DEBUG_TIMER_VECTOR].Bits.OffsetUpper = (UINT32)((UINTN)InterruptHandler >> 32);
IdtEntry[DEBUG_TIMER_VECTOR].Bits.Selector = CodeSegment;
IdtEntry[DEBUG_TIMER_VECTOR].Bits.GateType = IA32_IDT_GATE_TYPE_INTERRUPT_32;
//
// If the CPU supports Debug Extensions(CPUID:01 EDX:BIT2), then
@ -75,16 +76,16 @@ InitializeDebugIdt (
**/
VOID *
GetExceptionHandlerInIdtEntry (
IN UINTN ExceptionNum
IN UINTN ExceptionNum
)
{
IA32_IDT_GATE_DESCRIPTOR *IdtEntry;
IA32_DESCRIPTOR IdtDescriptor;
IA32_IDT_GATE_DESCRIPTOR *IdtEntry;
IA32_DESCRIPTOR IdtDescriptor;
AsmReadIdtr (&IdtDescriptor);
IdtEntry = (IA32_IDT_GATE_DESCRIPTOR *) IdtDescriptor.Base;
IdtEntry = (IA32_IDT_GATE_DESCRIPTOR *)IdtDescriptor.Base;
return (VOID *) (IdtEntry[ExceptionNum].Bits.OffsetLow |
return (VOID *)(IdtEntry[ExceptionNum].Bits.OffsetLow |
(((UINTN)IdtEntry[ExceptionNum].Bits.OffsetHigh) << 16) |
(((UINTN)IdtEntry[ExceptionNum].Bits.OffsetUpper) << 32));
}
@ -98,15 +99,15 @@ GetExceptionHandlerInIdtEntry (
**/
VOID
SetExceptionHandlerInIdtEntry (
IN UINTN ExceptionNum,
IN VOID *ExceptionHandler
IN UINTN ExceptionNum,
IN VOID *ExceptionHandler
)
{
IA32_IDT_GATE_DESCRIPTOR *IdtEntry;
IA32_DESCRIPTOR IdtDescriptor;
IA32_IDT_GATE_DESCRIPTOR *IdtEntry;
IA32_DESCRIPTOR IdtDescriptor;
AsmReadIdtr (&IdtDescriptor);
IdtEntry = (IA32_IDT_GATE_DESCRIPTOR *) IdtDescriptor.Base;
IdtEntry = (IA32_IDT_GATE_DESCRIPTOR *)IdtDescriptor.Base;
IdtEntry[ExceptionNum].Bits.OffsetLow = (UINT16)(UINTN)ExceptionHandler;
IdtEntry[ExceptionNum].Bits.OffsetHigh = (UINT16)((UINTN)ExceptionHandler >> 16);

View File

@ -12,10 +12,10 @@
#include "ProcessorContext.h"
#include "TransferProtocol.h"
#define DEBUG_SW_BREAKPOINT_SYMBOL 0xcc
#define DEBUG_ARCH_SYMBOL DEBUG_DATA_BREAK_CPU_ARCH_X64
#define DEBUG_SW_BREAKPOINT_SYMBOL 0xcc
#define DEBUG_ARCH_SYMBOL DEBUG_DATA_BREAK_CPU_ARCH_X64
typedef DEBUG_DATA_X64_FX_SAVE_STATE DEBUG_DATA_FX_SAVE_STATE;
typedef DEBUG_DATA_X64_SYSTEM_CONTEXT DEBUG_CPU_CONTEXT;
typedef DEBUG_DATA_X64_FX_SAVE_STATE DEBUG_DATA_FX_SAVE_STATE;
typedef DEBUG_DATA_X64_SYSTEM_CONTEXT DEBUG_CPU_CONTEXT;
#endif

View File

@ -9,22 +9,22 @@
#ifndef _DEBUG_EXCEPTION_H_
#define _DEBUG_EXCEPTION_H_
#define DEBUG_EXCEPT_DIVIDE_ERROR 0
#define DEBUG_EXCEPT_DEBUG 1
#define DEBUG_EXCEPT_NMI 2
#define DEBUG_EXCEPT_BREAKPOINT 3
#define DEBUG_EXCEPT_OVERFLOW 4
#define DEBUG_EXCEPT_BOUND 5
#define DEBUG_EXCEPT_INVALID_OPCODE 6
#define DEBUG_EXCEPT_DOUBLE_FAULT 8
#define DEBUG_EXCEPT_INVALID_TSS 10
#define DEBUG_EXCEPT_SEG_NOT_PRESENT 11
#define DEBUG_EXCEPT_STACK_FAULT 12
#define DEBUG_EXCEPT_GP_FAULT 13
#define DEBUG_EXCEPT_PAGE_FAULT 14
#define DEBUG_EXCEPT_FP_ERROR 16
#define DEBUG_EXCEPT_ALIGNMENT_CHECK 17
#define DEBUG_EXCEPT_MACHINE_CHECK 18
#define DEBUG_EXCEPT_SIMD 19
#define DEBUG_EXCEPT_DIVIDE_ERROR 0
#define DEBUG_EXCEPT_DEBUG 1
#define DEBUG_EXCEPT_NMI 2
#define DEBUG_EXCEPT_BREAKPOINT 3
#define DEBUG_EXCEPT_OVERFLOW 4
#define DEBUG_EXCEPT_BOUND 5
#define DEBUG_EXCEPT_INVALID_OPCODE 6
#define DEBUG_EXCEPT_DOUBLE_FAULT 8
#define DEBUG_EXCEPT_INVALID_TSS 10
#define DEBUG_EXCEPT_SEG_NOT_PRESENT 11
#define DEBUG_EXCEPT_STACK_FAULT 12
#define DEBUG_EXCEPT_GP_FAULT 13
#define DEBUG_EXCEPT_PAGE_FAULT 14
#define DEBUG_EXCEPT_FP_ERROR 16
#define DEBUG_EXCEPT_ALIGNMENT_CHECK 17
#define DEBUG_EXCEPT_MACHINE_CHECK 18
#define DEBUG_EXCEPT_SIMD 19
#endif

View File

@ -8,15 +8,15 @@
#include "DxeDebugAgentLib.h"
DEBUG_AGENT_MAILBOX mMailbox;
DEBUG_AGENT_MAILBOX *mMailboxPointer = NULL;
IA32_IDT_GATE_DESCRIPTOR mIdtEntryTable[33];
BOOLEAN mDxeCoreFlag = FALSE;
BOOLEAN mMultiProcessorDebugSupport = FALSE;
VOID *mSavedIdtTable = NULL;
UINTN mSaveIdtTableSize = 0;
BOOLEAN mDebugAgentInitialized = FALSE;
BOOLEAN mSkipBreakpoint = FALSE;
DEBUG_AGENT_MAILBOX mMailbox;
DEBUG_AGENT_MAILBOX *mMailboxPointer = NULL;
IA32_IDT_GATE_DESCRIPTOR mIdtEntryTable[33];
BOOLEAN mDxeCoreFlag = FALSE;
BOOLEAN mMultiProcessorDebugSupport = FALSE;
VOID *mSavedIdtTable = NULL;
UINTN mSaveIdtTableSize = 0;
BOOLEAN mDebugAgentInitialized = FALSE;
BOOLEAN mSkipBreakpoint = FALSE;
/**
Check if debug agent support multi-processor.
@ -46,32 +46,33 @@ InternalConstructorWorker (
VOID
)
{
EFI_STATUS Status;
EFI_PHYSICAL_ADDRESS Address;
BOOLEAN DebugTimerInterruptState;
DEBUG_AGENT_MAILBOX *Mailbox;
DEBUG_AGENT_MAILBOX *NewMailbox;
EFI_HOB_GUID_TYPE *GuidHob;
EFI_VECTOR_HANDOFF_INFO *VectorHandoffInfo;
EFI_STATUS Status;
EFI_PHYSICAL_ADDRESS Address;
BOOLEAN DebugTimerInterruptState;
DEBUG_AGENT_MAILBOX *Mailbox;
DEBUG_AGENT_MAILBOX *NewMailbox;
EFI_HOB_GUID_TYPE *GuidHob;
EFI_VECTOR_HANDOFF_INFO *VectorHandoffInfo;
//
// Check persisted vector handoff info
//
Status = EFI_SUCCESS;
Status = EFI_SUCCESS;
GuidHob = GetFirstGuidHob (&gEfiVectorHandoffInfoPpiGuid);
if (GuidHob != NULL && !mDxeCoreFlag) {
if ((GuidHob != NULL) && !mDxeCoreFlag) {
//
// Check if configuration table is installed or not if GUIDed HOB existed,
// only when Debug Agent is not linked by DXE Core
//
Status = EfiGetSystemConfigurationTable (&gEfiVectorHandoffTableGuid, (VOID **) &VectorHandoffInfo);
Status = EfiGetSystemConfigurationTable (&gEfiVectorHandoffTableGuid, (VOID **)&VectorHandoffInfo);
}
if (GuidHob == NULL || Status != EFI_SUCCESS) {
if ((GuidHob == NULL) || (Status != EFI_SUCCESS)) {
//
// Install configuration table for persisted vector handoff info if GUIDed HOB cannot be found or
// configuration table does not exist
//
Status = gBS->InstallConfigurationTable (&gEfiVectorHandoffTableGuid, (VOID *) &mVectorHandoffInfoDebugAgent[0]);
Status = gBS->InstallConfigurationTable (&gEfiVectorHandoffTableGuid, (VOID *)&mVectorHandoffInfoDebugAgent[0]);
if (EFI_ERROR (Status)) {
DEBUG ((DEBUG_ERROR, "DebugAgent: Cannot install configuration table for persisted vector handoff info!\n"));
CpuDeadLoop ();
@ -84,12 +85,12 @@ InternalConstructorWorker (
InstallSerialIo ();
Address = 0;
Status = gBS->AllocatePages (
AllocateAnyPages,
EfiACPIMemoryNVS,
EFI_SIZE_TO_PAGES (sizeof(DEBUG_AGENT_MAILBOX) + PcdGet16(PcdDebugPortHandleBufferSize)),
&Address
);
Status = gBS->AllocatePages (
AllocateAnyPages,
EfiACPIMemoryNVS,
EFI_SIZE_TO_PAGES (sizeof (DEBUG_AGENT_MAILBOX) + PcdGet16 (PcdDebugPortHandleBufferSize)),
&Address
);
if (EFI_ERROR (Status)) {
DEBUG ((DEBUG_ERROR, "DebugAgent: Cannot install configuration table for mailbox!\n"));
CpuDeadLoop ();
@ -97,14 +98,14 @@ InternalConstructorWorker (
DebugTimerInterruptState = SaveAndSetDebugTimerInterrupt (FALSE);
NewMailbox = (DEBUG_AGENT_MAILBOX *) (UINTN) Address;
NewMailbox = (DEBUG_AGENT_MAILBOX *)(UINTN)Address;
//
// Copy Mailbox and Debug Port Handle buffer to new location in ACPI NVS memory, because original Mailbox
// and Debug Port Handle buffer may be free at runtime, SMM debug agent needs to access them
//
Mailbox = GetMailboxPointer ();
CopyMem (NewMailbox, Mailbox, sizeof (DEBUG_AGENT_MAILBOX));
CopyMem (NewMailbox + 1, (VOID *)(UINTN)Mailbox->DebugPortHandle, PcdGet16(PcdDebugPortHandleBufferSize));
CopyMem (NewMailbox + 1, (VOID *)(UINTN)Mailbox->DebugPortHandle, PcdGet16 (PcdDebugPortHandleBufferSize));
//
// Update Debug Port Handle in new Mailbox
//
@ -113,7 +114,7 @@ InternalConstructorWorker (
DebugTimerInterruptState = SaveAndSetDebugTimerInterrupt (DebugTimerInterruptState);
Status = gBS->InstallConfigurationTable (&gEfiDebugAgentGuid, (VOID *) mMailboxPointer);
Status = gBS->InstallConfigurationTable (&gEfiDebugAgentGuid, (VOID *)mMailboxPointer);
if (EFI_ERROR (Status)) {
DEBUG ((DEBUG_ERROR, "DebugAgent: Failed to install configuration for mailbox!\n"));
CpuDeadLoop ();
@ -157,11 +158,11 @@ GetMailboxFromConfigurationTable (
VOID
)
{
EFI_STATUS Status;
DEBUG_AGENT_MAILBOX *Mailbox;
EFI_STATUS Status;
DEBUG_AGENT_MAILBOX *Mailbox;
Status = EfiGetSystemConfigurationTable (&gEfiDebugAgentGuid, (VOID **) &Mailbox);
if (Status == EFI_SUCCESS && Mailbox != NULL) {
Status = EfiGetSystemConfigurationTable (&gEfiDebugAgentGuid, (VOID **)&Mailbox);
if ((Status == EFI_SUCCESS) && (Mailbox != NULL)) {
VerifyMailboxChecksum (Mailbox);
return Mailbox;
} else {
@ -179,19 +180,20 @@ GetMailboxFromConfigurationTable (
**/
DEBUG_AGENT_MAILBOX *
GetMailboxFromHob (
IN VOID *HobStart
IN VOID *HobStart
)
{
EFI_HOB_GUID_TYPE *GuidHob;
UINT64 *MailboxLocation;
DEBUG_AGENT_MAILBOX *Mailbox;
EFI_HOB_GUID_TYPE *GuidHob;
UINT64 *MailboxLocation;
DEBUG_AGENT_MAILBOX *Mailbox;
GuidHob = GetNextGuidHob (&gEfiDebugAgentGuid, HobStart);
if (GuidHob == NULL) {
return NULL;
}
MailboxLocation = (UINT64 *) (GET_GUID_HOB_DATA(GuidHob));
Mailbox = (DEBUG_AGENT_MAILBOX *)(UINTN)(*MailboxLocation);
MailboxLocation = (UINT64 *)(GET_GUID_HOB_DATA (GuidHob));
Mailbox = (DEBUG_AGENT_MAILBOX *)(UINTN)(*MailboxLocation);
VerifyMailboxChecksum (Mailbox);
return Mailbox;
@ -225,7 +227,7 @@ GetDebugPortHandle (
VOID
)
{
return (DEBUG_PORT_HANDLE) (UINTN)(GetMailboxPointer ()->DebugPortHandle);
return (DEBUG_PORT_HANDLE)(UINTN)(GetMailboxPointer ()->DebugPortHandle);
}
/**
@ -240,13 +242,13 @@ GetDebugPortHandle (
**/
VOID
SetupDebugAgentEnvironment (
IN DEBUG_AGENT_MAILBOX *Mailbox
IN DEBUG_AGENT_MAILBOX *Mailbox
)
{
IA32_DESCRIPTOR Idtr;
UINT16 IdtEntryCount;
UINT64 DebugPortHandle;
UINT32 DebugTimerFrequency;
IA32_DESCRIPTOR Idtr;
UINT16 IdtEntryCount;
UINT64 DebugPortHandle;
UINT32 DebugTimerFrequency;
if (mMultiProcessorDebugSupport) {
InitializeSpinLock (&mDebugMpContext.MpContextSpinLock);
@ -255,26 +257,26 @@ SetupDebugAgentEnvironment (
//
// Clear Break CPU index value
//
mDebugMpContext.BreakAtCpuIndex = (UINT32) -1;
mDebugMpContext.BreakAtCpuIndex = (UINT32)-1;
}
//
// Get original IDT address and size.
//
AsmReadIdtr ((IA32_DESCRIPTOR *) &Idtr);
IdtEntryCount = (UINT16) ((Idtr.Limit + 1) / sizeof (IA32_IDT_GATE_DESCRIPTOR));
AsmReadIdtr ((IA32_DESCRIPTOR *)&Idtr);
IdtEntryCount = (UINT16)((Idtr.Limit + 1) / sizeof (IA32_IDT_GATE_DESCRIPTOR));
if (IdtEntryCount < 33) {
ZeroMem (&mIdtEntryTable, sizeof (IA32_IDT_GATE_DESCRIPTOR) * 33);
//
// Copy original IDT table into new one
//
CopyMem (&mIdtEntryTable, (VOID *) Idtr.Base, Idtr.Limit + 1);
CopyMem (&mIdtEntryTable, (VOID *)Idtr.Base, Idtr.Limit + 1);
//
// Load new IDT table
//
Idtr.Limit = (UINT16) (sizeof (IA32_IDT_GATE_DESCRIPTOR) * 33 - 1);
Idtr.Base = (UINTN) &mIdtEntryTable;
AsmWriteIdtr ((IA32_DESCRIPTOR *) &Idtr);
Idtr.Limit = (UINT16)(sizeof (IA32_IDT_GATE_DESCRIPTOR) * 33 - 1);
Idtr.Base = (UINTN)&mIdtEntryTable;
AsmWriteIdtr ((IA32_DESCRIPTOR *)&Idtr);
}
//
@ -294,6 +296,7 @@ SetupDebugAgentEnvironment (
} else {
ZeroMem (&mMailbox, sizeof (DEBUG_AGENT_MAILBOX));
}
mMailboxPointer = &mMailbox;
}
@ -305,7 +308,7 @@ SetupDebugAgentEnvironment (
//
// Initialize debug communication port
//
DebugPortHandle = (UINT64) (UINTN)DebugPortInitialize ((VOID *)(UINTN)mMailboxPointer->DebugPortHandle, NULL);
DebugPortHandle = (UINT64)(UINTN)DebugPortInitialize ((VOID *)(UINTN)mMailboxPointer->DebugPortHandle, NULL);
UpdateMailboxContent (mMailboxPointer, DEBUG_MAILBOX_DEBUG_PORT_HANDLE_INDEX, DebugPortHandle);
if (Mailbox == NULL) {
@ -326,7 +329,6 @@ SetupDebugAgentEnvironment (
}
}
/**
Initialize debug agent.
@ -352,15 +354,15 @@ InitializeDebugAgent (
IN DEBUG_AGENT_CONTINUE Function OPTIONAL
)
{
UINT64 *MailboxLocation;
DEBUG_AGENT_MAILBOX *Mailbox;
BOOLEAN InterruptStatus;
VOID *HobList;
IA32_DESCRIPTOR IdtDescriptor;
IA32_DESCRIPTOR *Ia32Idtr;
IA32_IDT_ENTRY *Ia32IdtEntry;
BOOLEAN PeriodicMode;
UINTN TimerCycle;
UINT64 *MailboxLocation;
DEBUG_AGENT_MAILBOX *Mailbox;
BOOLEAN InterruptStatus;
VOID *HobList;
IA32_DESCRIPTOR IdtDescriptor;
IA32_DESCRIPTOR *Ia32Idtr;
IA32_IDT_ENTRY *Ia32IdtEntry;
BOOLEAN PeriodicMode;
UINTN TimerCycle;
if (InitFlag == DEBUG_AGENT_INIT_DXE_AP) {
//
@ -369,14 +371,15 @@ InitializeDebugAgent (
InitializeLocalApicSoftwareEnable (TRUE);
GetApicTimerState (NULL, &PeriodicMode, NULL);
TimerCycle = GetApicTimerInitCount ();
if (!PeriodicMode || TimerCycle == 0) {
if (!PeriodicMode || (TimerCycle == 0)) {
InitializeDebugTimer (NULL, FALSE);
}
//
// Invoked by AP, enable interrupt to let AP could receive IPI from other processors
//
EnableInterrupts ();
return ;
return;
}
//
@ -396,149 +399,151 @@ InitializeDebugAgent (
MailboxLocation = NULL;
switch (InitFlag) {
case DEBUG_AGENT_INIT_DXE_LOAD:
//
// Check if Debug Agent has been initialized before
//
if (IsDebugAgentInitialzed ()) {
DEBUG ((DEBUG_INFO, "Debug Agent: The former agent will be overwritten by the new one!\n"));
}
case DEBUG_AGENT_INIT_DXE_LOAD:
//
// Check if Debug Agent has been initialized before
//
if (IsDebugAgentInitialzed ()) {
DEBUG ((DEBUG_INFO, "Debug Agent: The former agent will be overwritten by the new one!\n"));
}
mMultiProcessorDebugSupport = TRUE;
//
// Save original IDT table
//
AsmReadIdtr (&IdtDescriptor);
mSaveIdtTableSize = IdtDescriptor.Limit + 1;
mSavedIdtTable = AllocateCopyPool (mSaveIdtTableSize, (VOID *)IdtDescriptor.Base);
//
// Check if Debug Agent initialized in DXE phase
//
Mailbox = GetMailboxFromConfigurationTable ();
if (Mailbox == NULL) {
//
// Try to get mailbox from GUIDed HOB build in PEI
//
HobList = GetHobList ();
Mailbox = GetMailboxFromHob (HobList);
}
mMultiProcessorDebugSupport = TRUE;
//
// Save original IDT table
//
AsmReadIdtr (&IdtDescriptor);
mSaveIdtTableSize = IdtDescriptor.Limit + 1;
mSavedIdtTable = AllocateCopyPool (mSaveIdtTableSize, (VOID *) IdtDescriptor.Base);
//
// Check if Debug Agent initialized in DXE phase
//
Mailbox = GetMailboxFromConfigurationTable ();
if (Mailbox == NULL) {
//
// Set up Debug Agent Environment and try to connect HOST if required
//
SetupDebugAgentEnvironment (Mailbox);
//
// For DEBUG_AGENT_INIT_S3, needn't to install configuration table and EFI Serial IO protocol
// For DEBUG_AGENT_INIT_DXE_CORE, InternalConstructorWorker() will invoked in Constructor()
//
InternalConstructorWorker ();
//
// Enable Debug Timer interrupt
//
SaveAndSetDebugTimerInterrupt (TRUE);
//
// Enable interrupt to receive Debug Timer interrupt
//
EnableInterrupts ();
mDebugAgentInitialized = TRUE;
FindAndReportModuleImageInfo (SIZE_4KB);
*(EFI_STATUS *)Context = EFI_SUCCESS;
break;
case DEBUG_AGENT_INIT_DXE_UNLOAD:
if (mDebugAgentInitialized) {
if (IsHostAttached ()) {
*(EFI_STATUS *)Context = EFI_ACCESS_DENIED;
//
// Enable Debug Timer interrupt again
//
SaveAndSetDebugTimerInterrupt (TRUE);
} else {
//
// Restore original IDT table
//
AsmReadIdtr (&IdtDescriptor);
IdtDescriptor.Limit = (UINT16)(mSaveIdtTableSize - 1);
CopyMem ((VOID *)IdtDescriptor.Base, mSavedIdtTable, mSaveIdtTableSize);
AsmWriteIdtr (&IdtDescriptor);
FreePool (mSavedIdtTable);
mDebugAgentInitialized = FALSE;
*(EFI_STATUS *)Context = EFI_SUCCESS;
}
} else {
*(EFI_STATUS *)Context = EFI_NOT_STARTED;
}
//
// Restore interrupt state.
//
SetInterruptState (InterruptStatus);
break;
case DEBUG_AGENT_INIT_DXE_CORE:
mDxeCoreFlag = TRUE;
mMultiProcessorDebugSupport = TRUE;
//
// Try to get mailbox from GUIDed HOB build in PEI
//
HobList = GetHobList ();
HobList = Context;
Mailbox = GetMailboxFromHob (HobList);
}
//
// Set up Debug Agent Environment and try to connect HOST if required
//
SetupDebugAgentEnvironment (Mailbox);
//
// For DEBUG_AGENT_INIT_S3, needn't to install configuration table and EFI Serial IO protocol
// For DEBUG_AGENT_INIT_DXE_CORE, InternalConstructorWorker() will invoked in Constructor()
//
InternalConstructorWorker ();
//
// Enable Debug Timer interrupt
//
SaveAndSetDebugTimerInterrupt (TRUE);
//
// Enable interrupt to receive Debug Timer interrupt
//
EnableInterrupts ();
//
// Set up Debug Agent Environment and try to connect HOST if required
//
SetupDebugAgentEnvironment (Mailbox);
//
// Enable Debug Timer interrupt
//
SaveAndSetDebugTimerInterrupt (TRUE);
//
// Enable interrupt to receive Debug Timer interrupt
//
EnableInterrupts ();
mDebugAgentInitialized = TRUE;
FindAndReportModuleImageInfo (SIZE_4KB);
break;
*(EFI_STATUS *)Context = EFI_SUCCESS;
case DEBUG_AGENT_INIT_S3:
break;
case DEBUG_AGENT_INIT_DXE_UNLOAD:
if (mDebugAgentInitialized) {
if (IsHostAttached ()) {
*(EFI_STATUS *)Context = EFI_ACCESS_DENIED;
//
// Enable Debug Timer interrupt again
//
SaveAndSetDebugTimerInterrupt (TRUE);
} else {
//
// Restore original IDT table
//
AsmReadIdtr (&IdtDescriptor);
IdtDescriptor.Limit = (UINT16) (mSaveIdtTableSize - 1);
CopyMem ((VOID *) IdtDescriptor.Base, mSavedIdtTable, mSaveIdtTableSize);
AsmWriteIdtr (&IdtDescriptor);
FreePool (mSavedIdtTable);
mDebugAgentInitialized = FALSE;
*(EFI_STATUS *)Context = EFI_SUCCESS;
if (Context != NULL) {
Ia32Idtr = (IA32_DESCRIPTOR *)Context;
Ia32IdtEntry = (IA32_IDT_ENTRY *)(Ia32Idtr->Base);
MailboxLocation = (UINT64 *)((UINTN)Ia32IdtEntry[DEBUG_MAILBOX_VECTOR].Bits.OffsetLow +
((UINTN)Ia32IdtEntry[DEBUG_MAILBOX_VECTOR].Bits.OffsetHigh << 16));
Mailbox = (DEBUG_AGENT_MAILBOX *)(UINTN)(*MailboxLocation);
VerifyMailboxChecksum (Mailbox);
}
} else {
*(EFI_STATUS *)Context = EFI_NOT_STARTED;
}
//
// Restore interrupt state.
//
SetInterruptState (InterruptStatus);
break;
case DEBUG_AGENT_INIT_DXE_CORE:
mDxeCoreFlag = TRUE;
mMultiProcessorDebugSupport = TRUE;
//
// Try to get mailbox from GUIDed HOB build in PEI
//
HobList = Context;
Mailbox = GetMailboxFromHob (HobList);
//
// Set up Debug Agent Environment and try to connect HOST if required
//
SetupDebugAgentEnvironment (Mailbox);
//
// Enable Debug Timer interrupt
//
SaveAndSetDebugTimerInterrupt (TRUE);
//
// Enable interrupt to receive Debug Timer interrupt
//
EnableInterrupts ();
break;
case DEBUG_AGENT_INIT_S3:
if (Context != NULL) {
Ia32Idtr = (IA32_DESCRIPTOR *) Context;
Ia32IdtEntry = (IA32_IDT_ENTRY *)(Ia32Idtr->Base);
MailboxLocation = (UINT64 *) ((UINTN) Ia32IdtEntry[DEBUG_MAILBOX_VECTOR].Bits.OffsetLow +
((UINTN) Ia32IdtEntry[DEBUG_MAILBOX_VECTOR].Bits.OffsetHigh << 16));
Mailbox = (DEBUG_AGENT_MAILBOX *)(UINTN)(*MailboxLocation);
VerifyMailboxChecksum (Mailbox);
}
//
// Save Mailbox pointer in global variable
//
mMailboxPointer = Mailbox;
//
// Set up Debug Agent Environment and try to connect HOST if required
//
SetupDebugAgentEnvironment (Mailbox);
//
// Disable interrupt
//
DisableInterrupts ();
FindAndReportModuleImageInfo (SIZE_4KB);
if (GetDebugFlag (DEBUG_AGENT_FLAG_BREAK_BOOT_SCRIPT) == 1) {
//
// If Boot Script entry break is set, code will be break at here.
// Save Mailbox pointer in global variable
//
CpuBreakpoint ();
}
break;
mMailboxPointer = Mailbox;
//
// Set up Debug Agent Environment and try to connect HOST if required
//
SetupDebugAgentEnvironment (Mailbox);
//
// Disable interrupt
//
DisableInterrupts ();
FindAndReportModuleImageInfo (SIZE_4KB);
if (GetDebugFlag (DEBUG_AGENT_FLAG_BREAK_BOOT_SCRIPT) == 1) {
//
// If Boot Script entry break is set, code will be break at here.
//
CpuBreakpoint ();
}
default:
//
// Only DEBUG_AGENT_INIT_PREMEM_SEC and DEBUG_AGENT_INIT_POSTMEM_SEC are allowed for this
// Debug Agent library instance.
//
DEBUG ((DEBUG_ERROR, "Debug Agent: The InitFlag value is not allowed!\n"));
CpuDeadLoop ();
break;
break;
default:
//
// Only DEBUG_AGENT_INIT_PREMEM_SEC and DEBUG_AGENT_INIT_POSTMEM_SEC are allowed for this
// Debug Agent library instance.
//
DEBUG ((DEBUG_ERROR, "Debug Agent: The InitFlag value is not allowed!\n"));
CpuDeadLoop ();
break;
}
}

View File

@ -153,7 +153,7 @@ EFI_SERIAL_IO_MODE mSerialIoMode = {
//
// EFI_SERIAL_IO_PROTOCOL instance
//
EFI_SERIAL_IO_PROTOCOL mSerialIo = {
EFI_SERIAL_IO_PROTOCOL mSerialIo = {
SERIAL_IO_INTERFACE_REVISION,
SerialReset,
SerialSetAttributes,
@ -168,22 +168,22 @@ EFI_SERIAL_IO_PROTOCOL mSerialIo = {
// Serial IO Device Path definition
//
typedef struct {
VENDOR_DEVICE_PATH VendorDevicePath;
UART_DEVICE_PATH UartDevicePath;
EFI_DEVICE_PATH_PROTOCOL EndDevicePath;
VENDOR_DEVICE_PATH VendorDevicePath;
UART_DEVICE_PATH UartDevicePath;
EFI_DEVICE_PATH_PROTOCOL EndDevicePath;
} SERIAL_IO_DEVICE_PATH;
//
// Serial IO Device Patch instance
//
SERIAL_IO_DEVICE_PATH mSerialIoDevicePath = {
SERIAL_IO_DEVICE_PATH mSerialIoDevicePath = {
{
{
HARDWARE_DEVICE_PATH,
HW_VENDOR_DP,
{
(UINT8) (sizeof (VENDOR_DEVICE_PATH)),
(UINT8) ((sizeof (VENDOR_DEVICE_PATH)) >> 8)
(UINT8)(sizeof (VENDOR_DEVICE_PATH)),
(UINT8)((sizeof (VENDOR_DEVICE_PATH)) >> 8)
}
},
EFI_DEBUG_AGENT_GUID,
@ -193,8 +193,8 @@ SERIAL_IO_DEVICE_PATH mSerialIoDevicePath = {
MESSAGING_DEVICE_PATH,
MSG_UART_DP,
{
(UINT8) (sizeof (UART_DEVICE_PATH)),
(UINT8) ((sizeof (UART_DEVICE_PATH)) >> 8)
(UINT8)(sizeof (UART_DEVICE_PATH)),
(UINT8)((sizeof (UART_DEVICE_PATH)) >> 8)
}
},
0,
@ -213,7 +213,7 @@ SERIAL_IO_DEVICE_PATH mSerialIoDevicePath = {
}
};
#define DEBGU_SERIAL_IO_FIFO_DEPTH 10
#define DEBGU_SERIAL_IO_FIFO_DEPTH 10
//
// Data buffer for Terminal input character and Debug Symbols.
// The depth is DEBGU_SERIAL_IO_FIFO_DEPTH.
@ -224,19 +224,23 @@ SERIAL_IO_DEVICE_PATH mSerialIoDevicePath = {
// Data[] UINT8: An array, which used to store data.
//
typedef struct {
UINT8 First;
UINT8 Last;
UINT8 Surplus;
UINT8 Data[DEBGU_SERIAL_IO_FIFO_DEPTH];
UINT8 First;
UINT8 Last;
UINT8 Surplus;
UINT8 Data[DEBGU_SERIAL_IO_FIFO_DEPTH];
} DEBUG_SERIAL_FIFO;
//
// Global Variables
//
EFI_HANDLE mSerialIoHandle = NULL;
UINTN mLoopbackBuffer = 0;
DEBUG_SERIAL_FIFO mSerialFifoForTerminal = {0, 0, DEBGU_SERIAL_IO_FIFO_DEPTH, { 0 }};
DEBUG_SERIAL_FIFO mSerialFifoForDebug = {0, 0, DEBGU_SERIAL_IO_FIFO_DEPTH, { 0 }};
EFI_HANDLE mSerialIoHandle = NULL;
UINTN mLoopbackBuffer = 0;
DEBUG_SERIAL_FIFO mSerialFifoForTerminal = {
0, 0, DEBGU_SERIAL_IO_FIFO_DEPTH, { 0 }
};
DEBUG_SERIAL_FIFO mSerialFifoForDebug = {
0, 0, DEBGU_SERIAL_IO_FIFO_DEPTH, { 0 }
};
/**
Detect whether specific FIFO is empty or not.
@ -248,7 +252,7 @@ DEBUG_SERIAL_FIFO mSerialFifoForDebug = {0, 0, DEBGU_SERIAL_IO_FIF
**/
BOOLEAN
IsDebugTermianlFifoEmpty (
IN DEBUG_SERIAL_FIFO *Fifo
IN DEBUG_SERIAL_FIFO *Fifo
)
{
if (Fifo->Surplus == DEBGU_SERIAL_IO_FIFO_DEPTH) {
@ -268,7 +272,7 @@ IsDebugTermianlFifoEmpty (
**/
BOOLEAN
IsDebugTerminalFifoFull (
IN DEBUG_SERIAL_FIFO *Fifo
IN DEBUG_SERIAL_FIFO *Fifo
)
{
@ -291,8 +295,8 @@ IsDebugTerminalFifoFull (
**/
EFI_STATUS
DebugTerminalFifoAdd (
IN DEBUG_SERIAL_FIFO *Fifo,
IN UINT8 Data
IN DEBUG_SERIAL_FIFO *Fifo,
IN UINT8 Data
)
{
@ -302,6 +306,7 @@ DebugTerminalFifoAdd (
if (IsDebugTerminalFifoFull (Fifo)) {
return EFI_OUT_OF_RESOURCES;
}
//
// FIFO is not full can add data
//
@ -327,8 +332,8 @@ DebugTerminalFifoAdd (
**/
EFI_STATUS
DebugTerminalFifoRemove (
IN DEBUG_SERIAL_FIFO *Fifo,
OUT UINT8 *Data
IN DEBUG_SERIAL_FIFO *Fifo,
OUT UINT8 *Data
)
{
//
@ -337,6 +342,7 @@ DebugTerminalFifoRemove (
if (IsDebugTermianlFifoEmpty (Fifo)) {
return EFI_OUT_OF_RESOURCES;
}
//
// FIFO is not empty, can remove data
//
@ -359,12 +365,14 @@ InstallSerialIo (
VOID
)
{
EFI_STATUS Status;
EFI_STATUS Status;
Status = gBS->InstallMultipleProtocolInterfaces (
&mSerialIoHandle,
&gEfiDevicePathProtocolGuid, &mSerialIoDevicePath,
&gEfiSerialIoProtocolGuid, &mSerialIo,
&gEfiDevicePathProtocolGuid,
&mSerialIoDevicePath,
&gEfiSerialIoProtocolGuid,
&mSerialIo,
NULL
);
if (EFI_ERROR (Status)) {
@ -387,7 +395,7 @@ SerialReset (
)
{
mSerialIoMode.ControlMask = SERIAL_PORT_DEFAULT_CONTROL_MASK;
mLoopbackBuffer = 0;
mLoopbackBuffer = 0;
//
// Not reset serial device hardware indeed.
//
@ -445,7 +453,7 @@ SerialSetAttributes (
// SERIAL_PORT_DEFAULT_RECEIVE_FIFO_DEPTH. The Debug Communication Library may actually be
// using a larger FIFO, but there is no way to tell.
//
if (ReceiveFifoDepth == 0 || ReceiveFifoDepth >= SERIAL_PORT_DEFAULT_RECEIVE_FIFO_DEPTH) {
if ((ReceiveFifoDepth == 0) || (ReceiveFifoDepth >= SERIAL_PORT_DEFAULT_RECEIVE_FIFO_DEPTH)) {
mSerialIoMode.ReceiveFifoDepth = SERIAL_PORT_DEFAULT_RECEIVE_FIFO_DEPTH;
} else {
return EFI_INVALID_PARAMETER;
@ -478,6 +486,7 @@ SerialSetControl (
if ((Control & (~EFI_SERIAL_SOFTWARE_LOOPBACK_ENABLE)) != 0) {
return EFI_UNSUPPORTED;
}
mSerialIoMode.ControlMask = Control;
return EFI_SUCCESS;
}
@ -498,9 +507,9 @@ SerialGetControl (
OUT UINT32 *Control
)
{
DEBUG_PORT_HANDLE Handle;
BOOLEAN DebugTimerInterruptState;
EFI_TPL Tpl;
DEBUG_PORT_HANDLE Handle;
BOOLEAN DebugTimerInterruptState;
EFI_TPL Tpl;
//
// Raise TPL to prevent recursion from EFI timer interrupts
@ -511,7 +520,7 @@ SerialGetControl (
// Save and disable Debug Timer interrupt to avoid it to access Debug Port
//
DebugTimerInterruptState = SaveAndSetDebugTimerInterrupt (FALSE);
Handle = GetDebugPortHandle ();
Handle = GetDebugPortHandle ();
//
// Always assume the output buffer is empty and the Debug Communication Library can process
@ -561,9 +570,9 @@ SerialWrite (
IN VOID *Buffer
)
{
DEBUG_PORT_HANDLE Handle;
BOOLEAN DebugTimerInterruptState;
EFI_TPL Tpl;
DEBUG_PORT_HANDLE Handle;
BOOLEAN DebugTimerInterruptState;
EFI_TPL Tpl;
//
// Raise TPL to prevent recursion from EFI timer interrupts
@ -574,18 +583,20 @@ SerialWrite (
// Save and disable Debug Timer interrupt to avoid it to access Debug Port
//
DebugTimerInterruptState = SaveAndSetDebugTimerInterrupt (FALSE);
Handle = GetDebugPortHandle ();
Handle = GetDebugPortHandle ();
if ((mSerialIoMode.ControlMask & EFI_SERIAL_SOFTWARE_LOOPBACK_ENABLE) != 0) {
if ((mSerialIoMode.ControlMask & EFI_SERIAL_SOFTWARE_LOOPBACK_ENABLE) != 0) {
if (*BufferSize == 0) {
return EFI_SUCCESS;
}
if ((mLoopbackBuffer & SERIAL_PORT_LOOPBACK_BUFFER_FULL) != 0) {
*BufferSize = 0;
return EFI_TIMEOUT;
}
mLoopbackBuffer = SERIAL_PORT_LOOPBACK_BUFFER_FULL | *(UINT8 *)Buffer;
*BufferSize = 1;
*BufferSize = 1;
} else {
*BufferSize = DebugPortWriteBuffer (Handle, Buffer, *BufferSize);
}
@ -624,14 +635,14 @@ SerialRead (
OUT VOID *Buffer
)
{
EFI_STATUS Status;
UINTN Index;
UINT8 *Uint8Buffer;
BOOLEAN DebugTimerInterruptState;
EFI_TPL Tpl;
DEBUG_PORT_HANDLE Handle;
DEBUG_PACKET_HEADER DebugHeader;
UINT8 *Data8;
EFI_STATUS Status;
UINTN Index;
UINT8 *Uint8Buffer;
BOOLEAN DebugTimerInterruptState;
EFI_TPL Tpl;
DEBUG_PORT_HANDLE Handle;
DEBUG_PACKET_HEADER DebugHeader;
UINT8 *Data8;
//
// Raise TPL to prevent recursion from EFI timer interrupts
@ -642,17 +653,18 @@ SerialRead (
// Save and disable Debug Timer interrupt to avoid it to access Debug Port
//
DebugTimerInterruptState = SaveAndSetDebugTimerInterrupt (FALSE);
Handle = GetDebugPortHandle ();
Handle = GetDebugPortHandle ();
Data8 = (UINT8 *) &DebugHeader;
Data8 = (UINT8 *)&DebugHeader;
Uint8Buffer = (UINT8 *)Buffer;
if ((mSerialIoMode.ControlMask & EFI_SERIAL_SOFTWARE_LOOPBACK_ENABLE) != 0) {
if ((mSerialIoMode.ControlMask & EFI_SERIAL_SOFTWARE_LOOPBACK_ENABLE) != 0) {
if ((mLoopbackBuffer & SERIAL_PORT_LOOPBACK_BUFFER_FULL) == 0) {
return EFI_TIMEOUT;
}
*Uint8Buffer = (UINT8)(mLoopbackBuffer & 0xff);
*Uint8Buffer = (UINT8)(mLoopbackBuffer & 0xff);
mLoopbackBuffer = 0;
*BufferSize = 1;
*BufferSize = 1;
} else {
for (Index = 0; Index < *BufferSize; Index++) {
//
@ -661,15 +673,17 @@ SerialRead (
Status = DebugTerminalFifoRemove (&mSerialFifoForTerminal, Data8);
if (Status == EFI_SUCCESS) {
*Uint8Buffer = *Data8;
Uint8Buffer ++;
Uint8Buffer++;
continue;
}
//
// Read the input character from Debug Port
//
if (!DebugPortPollBuffer (Handle)) {
break;
}
DebugAgentReadBuffer (Handle, Data8, 1, 0);
if (*Data8 == DEBUG_STARTING_SYMBOL_ATTACH) {
@ -684,14 +698,16 @@ SerialRead (
DebugAgentMsgPrint (DEBUG_AGENT_INFO, "Terminal Timer break symbol received %x", DebugHeader.Command);
DebugTerminalFifoAdd (&mSerialFifoForDebug, DebugHeader.Command);
}
if (Status == EFI_TIMEOUT) {
continue;
}
} else {
*Uint8Buffer = *Data8;
Uint8Buffer ++;
Uint8Buffer++;
}
}
*BufferSize = (UINTN)Uint8Buffer - (UINTN)Buffer;
}
@ -720,19 +736,19 @@ SerialRead (
**/
EFI_STATUS
DebugReadBreakFromDebugPort (
IN DEBUG_PORT_HANDLE Handle,
OUT UINT8 *BreakSymbol
IN DEBUG_PORT_HANDLE Handle,
OUT UINT8 *BreakSymbol
)
{
EFI_STATUS Status;
DEBUG_PACKET_HEADER DebugHeader;
UINT8 *Data8;
EFI_STATUS Status;
DEBUG_PACKET_HEADER DebugHeader;
UINT8 *Data8;
*BreakSymbol = 0;
//
// If Debug Port buffer has data, read it till it was break symbol or Debug Port buffer empty.
//
Data8 = (UINT8 *) &DebugHeader;
Data8 = (UINT8 *)&DebugHeader;
while (TRUE) {
//
// If start symbol is not received
@ -743,6 +759,7 @@ DebugReadBreakFromDebugPort (
//
break;
}
//
// Try to read the start symbol
//
@ -752,6 +769,7 @@ DebugReadBreakFromDebugPort (
*BreakSymbol = *Data8;
return EFI_SUCCESS;
}
if (*Data8 == DEBUG_STARTING_SYMBOL_NORMAL) {
Status = ReadRemainingBreakPacket (Handle, &DebugHeader);
if (Status == EFI_SUCCESS) {
@ -759,6 +777,7 @@ DebugReadBreakFromDebugPort (
*BreakSymbol = DebugHeader.Command;
return EFI_SUCCESS;
}
if (Status == EFI_TIMEOUT) {
break;
}
@ -785,12 +804,12 @@ DebugReadBreakFromDebugPort (
**/
EFI_STATUS
DebugReadBreakSymbol (
IN DEBUG_PORT_HANDLE Handle,
OUT UINT8 *BreakSymbol
IN DEBUG_PORT_HANDLE Handle,
OUT UINT8 *BreakSymbol
)
{
EFI_STATUS Status;
UINT8 Data8;
EFI_STATUS Status;
UINT8 Data8;
//
// Read break symbol from debug FIFO firstly

View File

@ -10,15 +10,14 @@
GLOBAL_REMOVE_IF_UNREFERENCED BOOLEAN mSkipBreakpoint = FALSE;
GLOBAL_REMOVE_IF_UNREFERENCED EFI_PEI_VECTOR_HANDOFF_INFO_PPI mVectorHandoffInfoPpi = {
GLOBAL_REMOVE_IF_UNREFERENCED EFI_PEI_VECTOR_HANDOFF_INFO_PPI mVectorHandoffInfoPpi = {
&mVectorHandoffInfoDebugAgent[0]
};
//
// Ppis to be installed
//
GLOBAL_REMOVE_IF_UNREFERENCED EFI_PEI_PPI_DESCRIPTOR mVectorHandoffInfoPpiList[] = {
GLOBAL_REMOVE_IF_UNREFERENCED EFI_PEI_PPI_DESCRIPTOR mVectorHandoffInfoPpiList[] = {
{
(EFI_PEI_PPI_DESCRIPTOR_PPI | EFI_PEI_PPI_DESCRIPTOR_TERMINATE_LIST),
&gEfiVectorHandoffInfoPpiGuid,
@ -26,7 +25,7 @@ GLOBAL_REMOVE_IF_UNREFERENCED EFI_PEI_PPI_DESCRIPTOR mVectorHandoffInf
}
};
GLOBAL_REMOVE_IF_UNREFERENCED EFI_PEI_NOTIFY_DESCRIPTOR mDebugAgentMemoryDiscoveredNotifyList[1] = {
GLOBAL_REMOVE_IF_UNREFERENCED EFI_PEI_NOTIFY_DESCRIPTOR mDebugAgentMemoryDiscoveredNotifyList[1] = {
{
(EFI_PEI_PPI_DESCRIPTOR_NOTIFY_CALLBACK | EFI_PEI_PPI_DESCRIPTOR_TERMINATE_LIST),
&gEfiPeiMemoryDiscoveredPpiGuid,
@ -61,19 +60,19 @@ MultiProcessorDebugSupport (
**/
EFI_STATUS
DebugReadBreakSymbol (
IN DEBUG_PORT_HANDLE Handle,
OUT UINT8 *BreakSymbol
IN DEBUG_PORT_HANDLE Handle,
OUT UINT8 *BreakSymbol
)
{
EFI_STATUS Status;
DEBUG_PACKET_HEADER DebugHeader;
UINT8 *Data8;
EFI_STATUS Status;
DEBUG_PACKET_HEADER DebugHeader;
UINT8 *Data8;
*BreakSymbol = 0;
//
// If Debug Port buffer has data, read it till it was break symbol or Debug Port buffer empty.
//
Data8 = (UINT8 *) &DebugHeader;
Data8 = (UINT8 *)&DebugHeader;
while (TRUE) {
//
// If start symbol is not received
@ -84,6 +83,7 @@ DebugReadBreakSymbol (
//
break;
}
//
// Try to read the start symbol
//
@ -93,6 +93,7 @@ DebugReadBreakSymbol (
DebugAgentMsgPrint (DEBUG_AGENT_INFO, "Debug Timer attach symbol received %x", *BreakSymbol);
return EFI_SUCCESS;
}
if (*Data8 == DEBUG_STARTING_SYMBOL_NORMAL) {
Status = ReadRemainingBreakPacket (Handle, &DebugHeader);
if (Status == EFI_SUCCESS) {
@ -100,6 +101,7 @@ DebugReadBreakSymbol (
DebugAgentMsgPrint (DEBUG_AGENT_INFO, "Debug Timer break symbol received %x", *BreakSymbol);
return EFI_SUCCESS;
}
if (Status == EFI_TIMEOUT) {
break;
}
@ -118,13 +120,13 @@ GetLocationSavedMailboxPointerInIdtEntry (
VOID
)
{
UINTN *MailboxLocation;
UINTN *MailboxLocation;
MailboxLocation = (UINTN *) GetExceptionHandlerInIdtEntry (DEBUG_MAILBOX_VECTOR);
MailboxLocation = (UINTN *)GetExceptionHandlerInIdtEntry (DEBUG_MAILBOX_VECTOR);
//
// *MailboxLocation is the pointer to Mailbox
//
VerifyMailboxChecksum ((DEBUG_AGENT_MAILBOX *) (*MailboxLocation));
VerifyMailboxChecksum ((DEBUG_AGENT_MAILBOX *)(*MailboxLocation));
return MailboxLocation;
}
@ -136,7 +138,7 @@ GetLocationSavedMailboxPointerInIdtEntry (
**/
VOID
SetLocationSavedMailboxPointerInIdtEntry (
IN VOID *MailboxLocation
IN VOID *MailboxLocation
)
{
SetExceptionHandlerInIdtEntry (DEBUG_MAILBOX_VECTOR, MailboxLocation);
@ -153,13 +155,14 @@ GetMailboxLocationFromHob (
VOID
)
{
EFI_HOB_GUID_TYPE *GuidHob;
EFI_HOB_GUID_TYPE *GuidHob;
GuidHob = GetFirstGuidHob (&gEfiDebugAgentGuid);
if (GuidHob == NULL) {
return NULL;
}
return (UINT64 *) (GET_GUID_HOB_DATA(GuidHob));
return (UINT64 *)(GET_GUID_HOB_DATA (GuidHob));
}
/**
@ -182,12 +185,13 @@ GetMailboxPointer (
// Get mailbox from IDT entry firstly
//
MailboxLocationInIdt = GetLocationSavedMailboxPointerInIdtEntry ();
Mailbox = (DEBUG_AGENT_MAILBOX *)(UINTN)(*MailboxLocationInIdt);
Mailbox = (DEBUG_AGENT_MAILBOX *)(UINTN)(*MailboxLocationInIdt);
//
// Cannot used GetDebugFlag() to get Debug Flag to avoid GetMailboxPointer() nested
//
if (Mailbox->DebugFlag.Bits.CheckMailboxInHob != 1 ||
Mailbox->DebugFlag.Bits.InitArch != DEBUG_ARCH_SYMBOL) {
if ((Mailbox->DebugFlag.Bits.CheckMailboxInHob != 1) ||
(Mailbox->DebugFlag.Bits.InitArch != DEBUG_ARCH_SYMBOL))
{
//
// If mailbox was setup in SEC or the current CPU arch is different from the init arch
// Debug Agent initialized, return the mailbox from IDT entry directly.
@ -201,12 +205,12 @@ GetMailboxPointer (
// Compare mailbox in IDT entry with mailbox in HOB,
// need to fix mailbox location if HOB moved by PEI CORE
//
if (MailboxLocationInHob != MailboxLocationInIdt && MailboxLocationInHob != NULL) {
if ((MailboxLocationInHob != MailboxLocationInIdt) && (MailboxLocationInHob != NULL)) {
Mailbox = (DEBUG_AGENT_MAILBOX *)(UINTN)(*MailboxLocationInHob);
//
// Fix up Debug Port handler and save new mailbox in IDT entry
//
Mailbox = (DEBUG_AGENT_MAILBOX *)((UINTN)Mailbox + ((UINTN)(MailboxLocationInHob) - (UINTN)MailboxLocationInIdt));
Mailbox = (DEBUG_AGENT_MAILBOX *)((UINTN)Mailbox + ((UINTN)(MailboxLocationInHob) - (UINTN)MailboxLocationInIdt));
DebugPortHandle = (UINTN)Mailbox->DebugPortHandle + ((UINTN)(MailboxLocationInHob) - (UINTN)MailboxLocationInIdt);
UpdateMailboxContent (Mailbox, DEBUG_MAILBOX_DEBUG_PORT_HANDLE_INDEX, DebugPortHandle);
*MailboxLocationInHob = (UINT64)(UINTN)Mailbox;
@ -232,11 +236,11 @@ GetDebugPortHandle (
VOID
)
{
DEBUG_AGENT_MAILBOX *DebugAgentMailbox;
DEBUG_AGENT_MAILBOX *DebugAgentMailbox;
DebugAgentMailbox = GetMailboxPointer ();
return (DEBUG_PORT_HANDLE) (UINTN)(DebugAgentMailbox->DebugPortHandle);
return (DEBUG_PORT_HANDLE)(UINTN)(DebugAgentMailbox->DebugPortHandle);
}
/**
@ -252,17 +256,17 @@ GetDebugPortHandle (
EFI_STATUS
EFIAPI
DebugAgentCallbackMemoryDiscoveredPpi (
IN EFI_PEI_SERVICES **PeiServices,
IN EFI_PEI_NOTIFY_DESCRIPTOR *NotifyDescriptor,
IN VOID *Ppi
IN EFI_PEI_SERVICES **PeiServices,
IN EFI_PEI_NOTIFY_DESCRIPTOR *NotifyDescriptor,
IN VOID *Ppi
)
{
EFI_STATUS Status;
DEBUG_AGENT_MAILBOX *Mailbox;
BOOLEAN InterruptStatus;
EFI_PHYSICAL_ADDRESS Address;
DEBUG_AGENT_MAILBOX *NewMailbox;
UINT64 *MailboxLocationInHob;
EFI_STATUS Status;
DEBUG_AGENT_MAILBOX *Mailbox;
BOOLEAN InterruptStatus;
EFI_PHYSICAL_ADDRESS Address;
DEBUG_AGENT_MAILBOX *NewMailbox;
UINT64 *MailboxLocationInHob;
//
// Save and disable original interrupt status
@ -274,11 +278,11 @@ DebugAgentCallbackMemoryDiscoveredPpi (
//
Status = PeiServicesAllocatePages (
EfiACPIMemoryNVS,
EFI_SIZE_TO_PAGES (sizeof(DEBUG_AGENT_MAILBOX) + PcdGet16(PcdDebugPortHandleBufferSize)),
EFI_SIZE_TO_PAGES (sizeof (DEBUG_AGENT_MAILBOX) + PcdGet16 (PcdDebugPortHandleBufferSize)),
&Address
);
ASSERT_EFI_ERROR (Status);
NewMailbox = (DEBUG_AGENT_MAILBOX *) (UINTN) Address;
NewMailbox = (DEBUG_AGENT_MAILBOX *)(UINTN)Address;
//
// Copy Mailbox and Debug Port Handle buffer to new location in ACPI NVS memory, because original Mailbox
// and Debug Port Handle buffer in the allocated pool that may be marked as free by DXE Core after DXE Core
@ -286,7 +290,7 @@ DebugAgentCallbackMemoryDiscoveredPpi (
//
Mailbox = GetMailboxPointer ();
CopyMem (NewMailbox, Mailbox, sizeof (DEBUG_AGENT_MAILBOX));
CopyMem (NewMailbox + 1, (VOID *)(UINTN)Mailbox->DebugPortHandle, PcdGet16(PcdDebugPortHandleBufferSize));
CopyMem (NewMailbox + 1, (VOID *)(UINTN)Mailbox->DebugPortHandle, PcdGet16 (PcdDebugPortHandleBufferSize));
//
// Update Mailbox Location pointer in GUIDed HOB and IDT entry with new one
//
@ -375,238 +379,247 @@ InitializeDebugAgent (
//
// Disable interrupts and save current interrupt state
//
CpuInterruptState = SaveAndDisableInterrupts();
CpuInterruptState = SaveAndDisableInterrupts ();
switch (InitFlag) {
case DEBUG_AGENT_INIT_PREMEM_SEC:
case DEBUG_AGENT_INIT_PREMEM_SEC:
InitializeDebugIdt ();
InitializeDebugIdt ();
MailboxLocation = (UINT64)(UINTN)&MailboxInStack;
Mailbox = &MailboxInStack;
ZeroMem ((VOID *) Mailbox, sizeof (DEBUG_AGENT_MAILBOX));
//
// Get and save debug port handle and set the length of memory block.
//
SetLocationSavedMailboxPointerInIdtEntry (&MailboxLocation);
//
// Force error message could be printed during the first shakehand between Target/HOST.
//
SetDebugFlag (DEBUG_AGENT_FLAG_PRINT_ERROR_LEVEL, DEBUG_AGENT_ERROR);
//
// Save init arch type when debug agent initialized
//
SetDebugFlag (DEBUG_AGENT_FLAG_INIT_ARCH, DEBUG_ARCH_SYMBOL);
//
// Initialize Debug Timer hardware and save its frequency
//
InitializeDebugTimer (&DebugTimerFrequency, TRUE);
UpdateMailboxContent (Mailbox, DEBUG_MAILBOX_DEBUG_TIMER_FREQUENCY, DebugTimerFrequency);
Phase2Context.InitFlag = InitFlag;
Phase2Context.Context = Context;
Phase2Context.Function = Function;
DebugPortInitialize ((VOID *) &Phase2Context, InitializeDebugAgentPhase2);
//
// If reaches here, it means Debug Port initialization failed.
//
DEBUG ((DEBUG_ERROR, "Debug Agent: Debug port initialization failed.\n"));
break;
case DEBUG_AGENT_INIT_POSTMEM_SEC:
Mailbox = GetMailboxPointer ();
//
// Memory has been ready
//
SetDebugFlag (DEBUG_AGENT_FLAG_MEMORY_READY, 1);
if (IsHostAttached ()) {
MailboxLocation = (UINT64)(UINTN)&MailboxInStack;
Mailbox = &MailboxInStack;
ZeroMem ((VOID *)Mailbox, sizeof (DEBUG_AGENT_MAILBOX));
//
// Trigger one software interrupt to inform HOST
// Get and save debug port handle and set the length of memory block.
//
TriggerSoftInterrupt (MEMORY_READY_SIGNATURE);
}
//
// Install Vector Handoff Info PPI to persist vectors used by Debug Agent
//
Status = PeiServicesInstallPpi (&mVectorHandoffInfoPpiList[0]);
if (EFI_ERROR (Status)) {
DEBUG ((DEBUG_ERROR, "DebugAgent: Failed to install Vector Handoff Info PPI!\n"));
CpuDeadLoop ();
}
//
// Fix up Debug Port handle address and mailbox address
//
DebugAgentContext = (DEBUG_AGENT_CONTEXT_POSTMEM_SEC *) Context;
if (DebugAgentContext != NULL) {
DebugPortHandle = (UINT64)(UINT32)(Mailbox->DebugPortHandle + DebugAgentContext->StackMigrateOffset);
UpdateMailboxContent (Mailbox, DEBUG_MAILBOX_DEBUG_PORT_HANDLE_INDEX, DebugPortHandle);
Mailbox = (DEBUG_AGENT_MAILBOX *) ((UINTN) Mailbox + DebugAgentContext->StackMigrateOffset);
MailboxLocation = (UINT64)(UINTN)Mailbox;
SetLocationSavedMailboxPointerInIdtEntry (&MailboxLocation);
//
// Build mailbox location in HOB and fix-up its address
// Force error message could be printed during the first shakehand between Target/HOST.
//
MailboxLocationPointer = BuildGuidDataHob (
&gEfiDebugAgentGuid,
&MailboxLocation,
sizeof (UINT64)
);
MailboxLocationPointer = (UINT64 *) ((UINTN) MailboxLocationPointer + DebugAgentContext->HeapMigrateOffset);
} else {
SetDebugFlag (DEBUG_AGENT_FLAG_PRINT_ERROR_LEVEL, DEBUG_AGENT_ERROR);
//
// DebugAgentContext is NULL. Then, Mailbox can directly be copied into memory.
// Allocate ACPI NVS memory for new Mailbox and Debug Port Handle buffer
// Save init arch type when debug agent initialized
//
Status = PeiServicesAllocatePages (
EfiACPIMemoryNVS,
EFI_SIZE_TO_PAGES (sizeof(DEBUG_AGENT_MAILBOX) + PcdGet16(PcdDebugPortHandleBufferSize)),
&Address
);
if (EFI_ERROR (Status)) {
DEBUG ((DEBUG_ERROR, "DebugAgent: Failed to allocate pages!\n"));
CpuDeadLoop ();
}
NewMailbox = (DEBUG_AGENT_MAILBOX *) (UINTN) Address;
//
// Copy Mailbox and Debug Port Handle buffer to new location in ACPI NVS memory, because original Mailbox
// and Debug Port Handle buffer in the allocated pool that may be marked as free by DXE Core after DXE Core
// reallocates the HOB.
//
CopyMem (NewMailbox, Mailbox, sizeof (DEBUG_AGENT_MAILBOX));
CopyMem (NewMailbox + 1, (VOID *)(UINTN)Mailbox->DebugPortHandle, PcdGet16(PcdDebugPortHandleBufferSize));
UpdateMailboxContent (NewMailbox, DEBUG_MAILBOX_DEBUG_PORT_HANDLE_INDEX, (UINT64)(UINTN)(NewMailbox + 1));
MailboxLocation = (UINT64)(UINTN)NewMailbox;
//
// Build mailbox location in HOB
//
MailboxLocationPointer = BuildGuidDataHob (
&gEfiDebugAgentGuid,
&MailboxLocation,
sizeof (UINT64)
);
}
//
// Update IDT entry to save the location saved mailbox pointer
//
SetLocationSavedMailboxPointerInIdtEntry (MailboxLocationPointer);
break;
case DEBUG_AGENT_INIT_PEI:
if (Context == NULL) {
DEBUG ((DEBUG_ERROR, "DebugAgent: Input parameter Context cannot be NULL!\n"));
CpuDeadLoop ();
}
//
// Check if Debug Agent has initialized before
//
if (IsDebugAgentInitialzed()) {
DEBUG ((DEBUG_WARN, "Debug Agent: It has already initialized in SEC Core!\n"));
break;
}
//
// Install Vector Handoff Info PPI to persist vectors used by Debug Agent
//
Status = PeiServicesInstallPpi (&mVectorHandoffInfoPpiList[0]);
if (EFI_ERROR (Status)) {
DEBUG ((DEBUG_ERROR, "DebugAgent: Failed to install Vector Handoff Info PPI!\n"));
CpuDeadLoop ();
}
//
// Set up IDT entries
//
InitializeDebugIdt ();
//
// Build mailbox in HOB and setup Mailbox Set In Pei flag
//
Mailbox = AllocateZeroPool (sizeof (DEBUG_AGENT_MAILBOX));
if (Mailbox == NULL) {
DEBUG ((DEBUG_ERROR, "DebugAgent: Failed to allocate memory!\n"));
CpuDeadLoop ();
} else {
MailboxLocation = (UINT64)(UINTN)Mailbox;
MailboxLocationPointer = BuildGuidDataHob (
&gEfiDebugAgentGuid,
&MailboxLocation,
sizeof (UINT64)
);
SetDebugFlag (DEBUG_AGENT_FLAG_INIT_ARCH, DEBUG_ARCH_SYMBOL);
//
// Initialize Debug Timer hardware and save its frequency
//
InitializeDebugTimer (&DebugTimerFrequency, TRUE);
UpdateMailboxContent (Mailbox, DEBUG_MAILBOX_DEBUG_TIMER_FREQUENCY, DebugTimerFrequency);
Phase2Context.InitFlag = InitFlag;
Phase2Context.Context = Context;
Phase2Context.Function = Function;
DebugPortInitialize ((VOID *)&Phase2Context, InitializeDebugAgentPhase2);
//
// Update IDT entry to save the location pointer saved mailbox pointer
// If reaches here, it means Debug Port initialization failed.
//
DEBUG ((DEBUG_ERROR, "Debug Agent: Debug port initialization failed.\n"));
break;
case DEBUG_AGENT_INIT_POSTMEM_SEC:
Mailbox = GetMailboxPointer ();
//
// Memory has been ready
//
SetDebugFlag (DEBUG_AGENT_FLAG_MEMORY_READY, 1);
if (IsHostAttached ()) {
//
// Trigger one software interrupt to inform HOST
//
TriggerSoftInterrupt (MEMORY_READY_SIGNATURE);
}
//
// Install Vector Handoff Info PPI to persist vectors used by Debug Agent
//
Status = PeiServicesInstallPpi (&mVectorHandoffInfoPpiList[0]);
if (EFI_ERROR (Status)) {
DEBUG ((DEBUG_ERROR, "DebugAgent: Failed to install Vector Handoff Info PPI!\n"));
CpuDeadLoop ();
}
//
// Fix up Debug Port handle address and mailbox address
//
DebugAgentContext = (DEBUG_AGENT_CONTEXT_POSTMEM_SEC *)Context;
if (DebugAgentContext != NULL) {
DebugPortHandle = (UINT64)(UINT32)(Mailbox->DebugPortHandle + DebugAgentContext->StackMigrateOffset);
UpdateMailboxContent (Mailbox, DEBUG_MAILBOX_DEBUG_PORT_HANDLE_INDEX, DebugPortHandle);
Mailbox = (DEBUG_AGENT_MAILBOX *)((UINTN)Mailbox + DebugAgentContext->StackMigrateOffset);
MailboxLocation = (UINT64)(UINTN)Mailbox;
//
// Build mailbox location in HOB and fix-up its address
//
MailboxLocationPointer = BuildGuidDataHob (
&gEfiDebugAgentGuid,
&MailboxLocation,
sizeof (UINT64)
);
MailboxLocationPointer = (UINT64 *)((UINTN)MailboxLocationPointer + DebugAgentContext->HeapMigrateOffset);
} else {
//
// DebugAgentContext is NULL. Then, Mailbox can directly be copied into memory.
// Allocate ACPI NVS memory for new Mailbox and Debug Port Handle buffer
//
Status = PeiServicesAllocatePages (
EfiACPIMemoryNVS,
EFI_SIZE_TO_PAGES (sizeof (DEBUG_AGENT_MAILBOX) + PcdGet16 (PcdDebugPortHandleBufferSize)),
&Address
);
if (EFI_ERROR (Status)) {
DEBUG ((DEBUG_ERROR, "DebugAgent: Failed to allocate pages!\n"));
CpuDeadLoop ();
}
NewMailbox = (DEBUG_AGENT_MAILBOX *)(UINTN)Address;
//
// Copy Mailbox and Debug Port Handle buffer to new location in ACPI NVS memory, because original Mailbox
// and Debug Port Handle buffer in the allocated pool that may be marked as free by DXE Core after DXE Core
// reallocates the HOB.
//
CopyMem (NewMailbox, Mailbox, sizeof (DEBUG_AGENT_MAILBOX));
CopyMem (NewMailbox + 1, (VOID *)(UINTN)Mailbox->DebugPortHandle, PcdGet16 (PcdDebugPortHandleBufferSize));
UpdateMailboxContent (NewMailbox, DEBUG_MAILBOX_DEBUG_PORT_HANDLE_INDEX, (UINT64)(UINTN)(NewMailbox + 1));
MailboxLocation = (UINT64)(UINTN)NewMailbox;
//
// Build mailbox location in HOB
//
MailboxLocationPointer = BuildGuidDataHob (
&gEfiDebugAgentGuid,
&MailboxLocation,
sizeof (UINT64)
);
}
//
// Update IDT entry to save the location saved mailbox pointer
//
SetLocationSavedMailboxPointerInIdtEntry (MailboxLocationPointer);
}
//
// Save init arch type when debug agent initialized
//
SetDebugFlag (DEBUG_AGENT_FLAG_INIT_ARCH, DEBUG_ARCH_SYMBOL);
//
// Register for a callback once memory has been initialized.
// If memory has been ready, the callback function will be invoked immediately
//
Status = PeiServicesNotifyPpi (&mDebugAgentMemoryDiscoveredNotifyList[0]);
if (EFI_ERROR (Status)) {
DEBUG ((DEBUG_ERROR, "DebugAgent: Failed to register memory discovered callback function!\n"));
CpuDeadLoop ();
}
//
// Set HOB check flag if memory has not been ready yet
//
if (GetDebugFlag (DEBUG_AGENT_FLAG_MEMORY_READY) == 0) {
SetDebugFlag (DEBUG_AGENT_FLAG_CHECK_MAILBOX_IN_HOB, 1);
}
break;
Phase2Context.InitFlag = InitFlag;
Phase2Context.Context = Context;
Phase2Context.Function = Function;
DebugPortInitialize ((VOID *) &Phase2Context, InitializeDebugAgentPhase2);
case DEBUG_AGENT_INIT_PEI:
if (Context == NULL) {
DEBUG ((DEBUG_ERROR, "DebugAgent: Input parameter Context cannot be NULL!\n"));
CpuDeadLoop ();
}
FindAndReportModuleImageInfo (4);
break;
case DEBUG_AGENT_INIT_THUNK_PEI_IA32TOX64:
if (Context == NULL) {
DEBUG ((DEBUG_ERROR, "DebugAgent: Input parameter Context cannot be NULL!\n"));
CpuDeadLoop ();
} else {
Ia32Idtr = (IA32_DESCRIPTOR *) Context;
Ia32IdtEntry = (IA32_IDT_ENTRY *)(Ia32Idtr->Base);
MailboxLocationPointer = (UINT64 *) ((UINTN) Ia32IdtEntry[DEBUG_MAILBOX_VECTOR].Bits.OffsetLow +
((UINTN) Ia32IdtEntry[DEBUG_MAILBOX_VECTOR].Bits.OffsetHigh << 16));
Mailbox = (DEBUG_AGENT_MAILBOX *) (UINTN)(*MailboxLocationPointer);
//
// Mailbox should valid and setup before executing thunk code
// Check if Debug Agent has initialized before
//
VerifyMailboxChecksum (Mailbox);
if (IsDebugAgentInitialzed ()) {
DEBUG ((DEBUG_WARN, "Debug Agent: It has already initialized in SEC Core!\n"));
break;
}
//
// Install Vector Handoff Info PPI to persist vectors used by Debug Agent
//
Status = PeiServicesInstallPpi (&mVectorHandoffInfoPpiList[0]);
if (EFI_ERROR (Status)) {
DEBUG ((DEBUG_ERROR, "DebugAgent: Failed to install Vector Handoff Info PPI!\n"));
CpuDeadLoop ();
}
DebugPortHandle = (UINT64) (UINTN)DebugPortInitialize ((VOID *)(UINTN)Mailbox->DebugPortHandle, NULL);
UpdateMailboxContent (Mailbox, DEBUG_MAILBOX_DEBUG_PORT_HANDLE_INDEX, DebugPortHandle);
//
// Set up IDT entries
//
InitializeDebugIdt ();
//
// Update IDT entry to save location pointer saved the mailbox pointer
// Build mailbox in HOB and setup Mailbox Set In Pei flag
//
SetLocationSavedMailboxPointerInIdtEntry (MailboxLocationPointer);
Mailbox = AllocateZeroPool (sizeof (DEBUG_AGENT_MAILBOX));
if (Mailbox == NULL) {
DEBUG ((DEBUG_ERROR, "DebugAgent: Failed to allocate memory!\n"));
CpuDeadLoop ();
} else {
MailboxLocation = (UINT64)(UINTN)Mailbox;
MailboxLocationPointer = BuildGuidDataHob (
&gEfiDebugAgentGuid,
&MailboxLocation,
sizeof (UINT64)
);
//
// Initialize Debug Timer hardware and save its frequency
//
InitializeDebugTimer (&DebugTimerFrequency, TRUE);
UpdateMailboxContent (Mailbox, DEBUG_MAILBOX_DEBUG_TIMER_FREQUENCY, DebugTimerFrequency);
//
// Update IDT entry to save the location pointer saved mailbox pointer
//
SetLocationSavedMailboxPointerInIdtEntry (MailboxLocationPointer);
}
//
// Save init arch type when debug agent initialized
//
SetDebugFlag (DEBUG_AGENT_FLAG_INIT_ARCH, DEBUG_ARCH_SYMBOL);
//
// Register for a callback once memory has been initialized.
// If memory has been ready, the callback function will be invoked immediately
//
Status = PeiServicesNotifyPpi (&mDebugAgentMemoryDiscoveredNotifyList[0]);
if (EFI_ERROR (Status)) {
DEBUG ((DEBUG_ERROR, "DebugAgent: Failed to register memory discovered callback function!\n"));
CpuDeadLoop ();
}
//
// Set HOB check flag if memory has not been ready yet
//
if (GetDebugFlag (DEBUG_AGENT_FLAG_MEMORY_READY) == 0) {
SetDebugFlag (DEBUG_AGENT_FLAG_CHECK_MAILBOX_IN_HOB, 1);
}
Phase2Context.InitFlag = InitFlag;
Phase2Context.Context = Context;
Phase2Context.Function = Function;
DebugPortInitialize ((VOID *)&Phase2Context, InitializeDebugAgentPhase2);
FindAndReportModuleImageInfo (4);
}
break;
default:
//
// Only DEBUG_AGENT_INIT_PREMEM_SEC and DEBUG_AGENT_INIT_POSTMEM_SEC are allowed for this
// Debug Agent library instance.
//
DEBUG ((DEBUG_ERROR, "Debug Agent: The InitFlag value is not allowed!\n"));
CpuDeadLoop ();
break;
break;
case DEBUG_AGENT_INIT_THUNK_PEI_IA32TOX64:
if (Context == NULL) {
DEBUG ((DEBUG_ERROR, "DebugAgent: Input parameter Context cannot be NULL!\n"));
CpuDeadLoop ();
} else {
Ia32Idtr = (IA32_DESCRIPTOR *)Context;
Ia32IdtEntry = (IA32_IDT_ENTRY *)(Ia32Idtr->Base);
MailboxLocationPointer = (UINT64 *)((UINTN)Ia32IdtEntry[DEBUG_MAILBOX_VECTOR].Bits.OffsetLow +
((UINTN)Ia32IdtEntry[DEBUG_MAILBOX_VECTOR].Bits.OffsetHigh << 16));
Mailbox = (DEBUG_AGENT_MAILBOX *)(UINTN)(*MailboxLocationPointer);
//
// Mailbox should valid and setup before executing thunk code
//
VerifyMailboxChecksum (Mailbox);
DebugPortHandle = (UINT64)(UINTN)DebugPortInitialize ((VOID *)(UINTN)Mailbox->DebugPortHandle, NULL);
UpdateMailboxContent (Mailbox, DEBUG_MAILBOX_DEBUG_PORT_HANDLE_INDEX, DebugPortHandle);
//
// Set up IDT entries
//
InitializeDebugIdt ();
//
// Update IDT entry to save location pointer saved the mailbox pointer
//
SetLocationSavedMailboxPointerInIdtEntry (MailboxLocationPointer);
FindAndReportModuleImageInfo (4);
}
break;
default:
//
// Only DEBUG_AGENT_INIT_PREMEM_SEC and DEBUG_AGENT_INIT_POSTMEM_SEC are allowed for this
// Debug Agent library instance.
//
DEBUG ((DEBUG_ERROR, "Debug Agent: The InitFlag value is not allowed!\n"));
CpuDeadLoop ();
break;
}
if (InitFlag == DEBUG_AGENT_INIT_POSTMEM_SEC) {
@ -625,16 +638,18 @@ InitializeDebugAgent (
//
EnableInterrupts ();
}
//
// If Function is not NULL, invoke it always whatever debug agent was initialized successfully or not.
//
if (Function != NULL) {
Function (Context);
}
//
// Set return status for DEBUG_AGENT_INIT_PEI
//
if (InitFlag == DEBUG_AGENT_INIT_PEI && Context != NULL) {
if ((InitFlag == DEBUG_AGENT_INIT_PEI) && (Context != NULL)) {
*(EFI_STATUS *)Context = EFI_SUCCESS;
}
}
@ -651,26 +666,27 @@ InitializeDebugAgent (
VOID
EFIAPI
InitializeDebugAgentPhase2 (
IN VOID *Context,
IN DEBUG_PORT_HANDLE DebugPortHandle
IN VOID *Context,
IN DEBUG_PORT_HANDLE DebugPortHandle
)
{
DEBUG_AGENT_PHASE2_CONTEXT *Phase2Context;
UINT64 *MailboxLocation;
DEBUG_AGENT_MAILBOX *Mailbox;
EFI_SEC_PEI_HAND_OFF *SecCoreData;
UINT16 BufferSize;
UINT64 NewDebugPortHandle;
DEBUG_AGENT_PHASE2_CONTEXT *Phase2Context;
UINT64 *MailboxLocation;
DEBUG_AGENT_MAILBOX *Mailbox;
EFI_SEC_PEI_HAND_OFF *SecCoreData;
UINT16 BufferSize;
UINT64 NewDebugPortHandle;
Phase2Context = (DEBUG_AGENT_PHASE2_CONTEXT *) Context;
Phase2Context = (DEBUG_AGENT_PHASE2_CONTEXT *)Context;
MailboxLocation = GetLocationSavedMailboxPointerInIdtEntry ();
Mailbox = (DEBUG_AGENT_MAILBOX *)(UINTN)(*MailboxLocation);
BufferSize = PcdGet16(PcdDebugPortHandleBufferSize);
if (Phase2Context->InitFlag == DEBUG_AGENT_INIT_PEI && BufferSize != 0) {
Mailbox = (DEBUG_AGENT_MAILBOX *)(UINTN)(*MailboxLocation);
BufferSize = PcdGet16 (PcdDebugPortHandleBufferSize);
if ((Phase2Context->InitFlag == DEBUG_AGENT_INIT_PEI) && (BufferSize != 0)) {
NewDebugPortHandle = (UINT64)(UINTN)AllocateCopyPool (BufferSize, DebugPortHandle);
} else {
NewDebugPortHandle = (UINT64)(UINTN)DebugPortHandle;
}
UpdateMailboxContent (Mailbox, DEBUG_MAILBOX_DEBUG_PORT_HANDLE_INDEX, NewDebugPortHandle);
//
@ -684,10 +700,11 @@ InitializeDebugAgentPhase2 (
// host to disable low memory filtering.
//
SecCoreData = (EFI_SEC_PEI_HAND_OFF *)Phase2Context->Context;
if ((UINTN)SecCoreData->TemporaryRamBase < BASE_128MB && IsHostAttached ()) {
if (((UINTN)SecCoreData->TemporaryRamBase < BASE_128MB) && IsHostAttached ()) {
SetDebugFlag (DEBUG_AGENT_FLAG_MEMORY_READY, 1);
TriggerSoftInterrupt (MEMORY_READY_SIGNATURE);
}
//
// Enable Debug Timer interrupt
//

View File

@ -33,8 +33,8 @@ typedef struct {
VOID
EFIAPI
InitializeDebugAgentPhase2 (
IN VOID *Context,
IN DEBUG_PORT_HANDLE DebugPortHandle
IN VOID *Context,
IN DEBUG_PORT_HANDLE DebugPortHandle
);
/**
@ -50,10 +50,9 @@ InitializeDebugAgentPhase2 (
EFI_STATUS
EFIAPI
DebugAgentCallbackMemoryDiscoveredPpi (
IN EFI_PEI_SERVICES **PeiServices,
IN EFI_PEI_NOTIFY_DESCRIPTOR *NotifyDescriptor,
IN VOID *Ppi
IN EFI_PEI_SERVICES **PeiServices,
IN EFI_PEI_NOTIFY_DESCRIPTOR *NotifyDescriptor,
IN VOID *Ppi
);
#endif

View File

@ -8,19 +8,19 @@
#include "SmmDebugAgentLib.h"
DEBUG_AGENT_MAILBOX *mMailboxPointer = NULL;
DEBUG_AGENT_MAILBOX mLocalMailbox;
UINTN mSavedDebugRegisters[6];
IA32_IDT_GATE_DESCRIPTOR mIdtEntryTable[33];
BOOLEAN mSkipBreakpoint = FALSE;
BOOLEAN mSmmDebugIdtInitFlag = FALSE;
BOOLEAN mApicTimerRestore = FALSE;
BOOLEAN mPeriodicMode;
UINT32 mTimerCycle;
UINTN mApicTimerDivisor;
UINT8 mVector;
DEBUG_AGENT_MAILBOX *mMailboxPointer = NULL;
DEBUG_AGENT_MAILBOX mLocalMailbox;
UINTN mSavedDebugRegisters[6];
IA32_IDT_GATE_DESCRIPTOR mIdtEntryTable[33];
BOOLEAN mSkipBreakpoint = FALSE;
BOOLEAN mSmmDebugIdtInitFlag = FALSE;
BOOLEAN mApicTimerRestore = FALSE;
BOOLEAN mPeriodicMode;
UINT32 mTimerCycle;
UINTN mApicTimerDivisor;
UINT8 mVector;
CHAR8 mWarningMsgIgnoreSmmEntryBreak[] = "Ignore smmentrybreak setting for SMI issued during DXE debugging!\r\n";
CHAR8 mWarningMsgIgnoreSmmEntryBreak[] = "Ignore smmentrybreak setting for SMI issued during DXE debugging!\r\n";
/**
Check if debug agent support multi-processor.
@ -49,8 +49,8 @@ MultiProcessorDebugSupport (
**/
EFI_STATUS
DebugReadBreakSymbol (
IN DEBUG_PORT_HANDLE Handle,
OUT UINT8 *BreakSymbol
IN DEBUG_PORT_HANDLE Handle,
OUT UINT8 *BreakSymbol
)
{
//
@ -70,16 +70,17 @@ GetMailboxFromHob (
VOID
)
{
EFI_HOB_GUID_TYPE *GuidHob;
UINT64 *MailboxLocation;
DEBUG_AGENT_MAILBOX *Mailbox;
EFI_HOB_GUID_TYPE *GuidHob;
UINT64 *MailboxLocation;
DEBUG_AGENT_MAILBOX *Mailbox;
GuidHob = GetFirstGuidHob (&gEfiDebugAgentGuid);
if (GuidHob == NULL) {
return NULL;
}
MailboxLocation = (UINT64 *) (GET_GUID_HOB_DATA(GuidHob));
Mailbox = (DEBUG_AGENT_MAILBOX *)(UINTN)(*MailboxLocation);
MailboxLocation = (UINT64 *)(GET_GUID_HOB_DATA (GuidHob));
Mailbox = (DEBUG_AGENT_MAILBOX *)(UINTN)(*MailboxLocation);
VerifyMailboxChecksum (Mailbox);
return Mailbox;
@ -111,7 +112,7 @@ GetDebugPortHandle (
VOID
)
{
return (DEBUG_PORT_HANDLE) (UINTN)(GetMailboxPointer()->DebugPortHandle);
return (DEBUG_PORT_HANDLE)(UINTN)(GetMailboxPointer ()->DebugPortHandle);
}
/**
@ -179,207 +180,218 @@ InitializeDebugAgent (
IN DEBUG_AGENT_CONTINUE Function OPTIONAL
)
{
EFI_STATUS Status;
UINT64 DebugPortHandle;
IA32_IDT_GATE_DESCRIPTOR IdtEntry[33];
IA32_DESCRIPTOR IdtDescriptor;
IA32_DESCRIPTOR *Ia32Idtr;
IA32_IDT_ENTRY *Ia32IdtEntry;
IA32_DESCRIPTOR Idtr;
UINT16 IdtEntryCount;
DEBUG_AGENT_MAILBOX *Mailbox;
UINT64 *MailboxLocation;
UINT32 DebugTimerFrequency;
EFI_STATUS Status;
UINT64 DebugPortHandle;
IA32_IDT_GATE_DESCRIPTOR IdtEntry[33];
IA32_DESCRIPTOR IdtDescriptor;
IA32_DESCRIPTOR *Ia32Idtr;
IA32_IDT_ENTRY *Ia32IdtEntry;
IA32_DESCRIPTOR Idtr;
UINT16 IdtEntryCount;
DEBUG_AGENT_MAILBOX *Mailbox;
UINT64 *MailboxLocation;
UINT32 DebugTimerFrequency;
switch (InitFlag) {
case DEBUG_AGENT_INIT_SMM:
//
// Install configuration table for persisted vector handoff info
//
Status = gSmst->SmmInstallConfigurationTable (
gSmst,
&gEfiVectorHandoffTableGuid,
(VOID *) &mVectorHandoffInfoDebugAgent[0],
sizeof (EFI_VECTOR_HANDOFF_INFO) * mVectorHandoffInfoCount
);
if (EFI_ERROR (Status)) {
DEBUG ((DEBUG_ERROR, "DebugAgent: Cannot install configuration table for persisted vector handoff info!\n"));
CpuDeadLoop ();
}
//
// Check if Debug Agent initialized in DXE phase
//
Status = EfiGetSystemConfigurationTable (&gEfiDebugAgentGuid, (VOID **) &Mailbox);
if (Status == EFI_SUCCESS && Mailbox != NULL) {
VerifyMailboxChecksum (Mailbox);
mMailboxPointer = Mailbox;
break;
}
//
// Check if Debug Agent initialized in SEC/PEI phase
//
Mailbox = GetMailboxFromHob ();
if (Mailbox != NULL) {
mMailboxPointer = Mailbox;
break;
}
//
// Debug Agent was not initialized before, use the local mailbox.
//
ZeroMem (&mLocalMailbox, sizeof (DEBUG_AGENT_MAILBOX));
Mailbox = &mLocalMailbox;
//
// Save original IDT entries
//
AsmReadIdtr (&IdtDescriptor);
CopyMem (&IdtEntry, (VOID *)IdtDescriptor.Base, 33 * sizeof(IA32_IDT_GATE_DESCRIPTOR));
//
// Initialized Debug Agent
//
InitializeDebugIdt ();
//
// Initialize Debug Timer hardware and save its frequency
//
InitializeDebugTimer (&DebugTimerFrequency, TRUE);
UpdateMailboxContent (Mailbox, DEBUG_MAILBOX_DEBUG_TIMER_FREQUENCY, DebugTimerFrequency);
DebugPortHandle = (UINT64) (UINTN)DebugPortInitialize ((DEBUG_PORT_HANDLE) (UINTN)Mailbox->DebugPortHandle, NULL);
UpdateMailboxContent (Mailbox, DEBUG_MAILBOX_DEBUG_PORT_HANDLE_INDEX, DebugPortHandle);
mMailboxPointer = Mailbox;
//
// Trigger one software interrupt to inform HOST
//
TriggerSoftInterrupt (SYSTEM_RESET_SIGNATURE);
SetDebugFlag (DEBUG_AGENT_FLAG_MEMORY_READY, 1);
//
// Memory has been ready
//
if (IsHostAttached ()) {
case DEBUG_AGENT_INIT_SMM:
//
// Trigger one software interrupt to inform HOST
// Install configuration table for persisted vector handoff info
//
TriggerSoftInterrupt (MEMORY_READY_SIGNATURE);
}
//
// Find and report PE/COFF image info to HOST
//
FindAndReportModuleImageInfo (SIZE_4KB);
//
// Restore saved IDT entries
//
CopyMem ((VOID *)IdtDescriptor.Base, &IdtEntry, 33 * sizeof(IA32_IDT_GATE_DESCRIPTOR));
break;
case DEBUG_AGENT_INIT_ENTER_SMI:
SaveDebugRegister ();
if (!mSmmDebugIdtInitFlag) {
//
// We only need to initialize Debug IDT table at first SMI entry
// after SMM relocation.
//
InitializeDebugIdt ();
mSmmDebugIdtInitFlag = TRUE;
}
//
// Check if CPU APIC Timer is working, otherwise initialize it.
//
InitializeLocalApicSoftwareEnable (TRUE);
GetApicTimerState (&mApicTimerDivisor, &mPeriodicMode, &mVector);
mTimerCycle = GetApicTimerInitCount ();
if (!mPeriodicMode || mTimerCycle == 0) {
mApicTimerRestore = TRUE;
InitializeDebugTimer (NULL, FALSE);
}
Mailbox = GetMailboxPointer ();
if (GetDebugFlag (DEBUG_AGENT_FLAG_AGENT_IN_PROGRESS) == 1) {
//
// If Debug Agent has been communication state with HOST, we need skip
// any break points set in SMM, set Skip Breakpoint flag
//
mSkipBreakpoint = TRUE;
}
if (GetDebugFlag (DEBUG_AGENT_FLAG_BREAK_ON_NEXT_SMI) == 1) {
if (mSkipBreakpoint) {
//
// Print warning message if ignore smm entry break
//
DebugPortWriteBuffer ((DEBUG_PORT_HANDLE) (UINTN)Mailbox->DebugPortHandle,
(UINT8 *)mWarningMsgIgnoreSmmEntryBreak,
AsciiStrLen (mWarningMsgIgnoreSmmEntryBreak)
);
} else {
//
// If SMM entry break is set, SMM code will be break at here.
//
CpuBreakpoint ();
}
}
break;
case DEBUG_AGENT_INIT_EXIT_SMI:
Mailbox = GetMailboxPointer ();
//
// Clear Skip Breakpoint flag
//
mSkipBreakpoint = FALSE;
RestoreDebugRegister ();
//
// Restore APIC Timer
//
if (mApicTimerRestore) {
InitializeApicTimer (mApicTimerDivisor, mTimerCycle, mPeriodicMode, mVector);
mApicTimerRestore = FALSE;
}
break;
case DEBUG_AGENT_INIT_THUNK_PEI_IA32TOX64:
if (Context == NULL) {
DEBUG ((DEBUG_ERROR, "DebugAgent: Input parameter Context cannot be NULL!\n"));
CpuDeadLoop ();
} else {
Ia32Idtr = (IA32_DESCRIPTOR *) Context;
Ia32IdtEntry = (IA32_IDT_ENTRY *)(Ia32Idtr->Base);
MailboxLocation = (UINT64 *) ((UINTN) Ia32IdtEntry[DEBUG_MAILBOX_VECTOR].Bits.OffsetLow +
((UINTN) Ia32IdtEntry[DEBUG_MAILBOX_VECTOR].Bits.OffsetHigh << 16));
mMailboxPointer = (DEBUG_AGENT_MAILBOX *)(UINTN)(*MailboxLocation);
VerifyMailboxChecksum (mMailboxPointer);
//
// Get original IDT address and size.
//
AsmReadIdtr ((IA32_DESCRIPTOR *) &Idtr);
IdtEntryCount = (UINT16) ((Idtr.Limit + 1) / sizeof (IA32_IDT_GATE_DESCRIPTOR));
if (IdtEntryCount < 33) {
Idtr.Limit = (UINT16) (sizeof (IA32_IDT_GATE_DESCRIPTOR) * 33 - 1);
Idtr.Base = (UINTN) &mIdtEntryTable;
ZeroMem (&mIdtEntryTable, Idtr.Limit + 1);
AsmWriteIdtr ((IA32_DESCRIPTOR *) &Idtr);
Status = gSmst->SmmInstallConfigurationTable (
gSmst,
&gEfiVectorHandoffTableGuid,
(VOID *)&mVectorHandoffInfoDebugAgent[0],
sizeof (EFI_VECTOR_HANDOFF_INFO) * mVectorHandoffInfoCount
);
if (EFI_ERROR (Status)) {
DEBUG ((DEBUG_ERROR, "DebugAgent: Cannot install configuration table for persisted vector handoff info!\n"));
CpuDeadLoop ();
}
//
// Check if Debug Agent initialized in DXE phase
//
Status = EfiGetSystemConfigurationTable (&gEfiDebugAgentGuid, (VOID **)&Mailbox);
if ((Status == EFI_SUCCESS) && (Mailbox != NULL)) {
VerifyMailboxChecksum (Mailbox);
mMailboxPointer = Mailbox;
break;
}
//
// Check if Debug Agent initialized in SEC/PEI phase
//
Mailbox = GetMailboxFromHob ();
if (Mailbox != NULL) {
mMailboxPointer = Mailbox;
break;
}
//
// Debug Agent was not initialized before, use the local mailbox.
//
ZeroMem (&mLocalMailbox, sizeof (DEBUG_AGENT_MAILBOX));
Mailbox = &mLocalMailbox;
//
// Save original IDT entries
//
AsmReadIdtr (&IdtDescriptor);
CopyMem (&IdtEntry, (VOID *)IdtDescriptor.Base, 33 * sizeof (IA32_IDT_GATE_DESCRIPTOR));
//
// Initialized Debug Agent
//
InitializeDebugIdt ();
//
// Initialize Debug Timer hardware and save its frequency
//
InitializeDebugTimer (&DebugTimerFrequency, TRUE);
UpdateMailboxContent (mMailboxPointer, DEBUG_MAILBOX_DEBUG_TIMER_FREQUENCY, DebugTimerFrequency);
//
// Enable Debug Timer interrupt and CPU interrupt
//
SaveAndSetDebugTimerInterrupt (TRUE);
EnableInterrupts ();
UpdateMailboxContent (Mailbox, DEBUG_MAILBOX_DEBUG_TIMER_FREQUENCY, DebugTimerFrequency);
DebugPortHandle = (UINT64)(UINTN)DebugPortInitialize ((DEBUG_PORT_HANDLE)(UINTN)Mailbox->DebugPortHandle, NULL);
UpdateMailboxContent (Mailbox, DEBUG_MAILBOX_DEBUG_PORT_HANDLE_INDEX, DebugPortHandle);
mMailboxPointer = Mailbox;
//
// Trigger one software interrupt to inform HOST
//
TriggerSoftInterrupt (SYSTEM_RESET_SIGNATURE);
SetDebugFlag (DEBUG_AGENT_FLAG_MEMORY_READY, 1);
//
// Memory has been ready
//
if (IsHostAttached ()) {
//
// Trigger one software interrupt to inform HOST
//
TriggerSoftInterrupt (MEMORY_READY_SIGNATURE);
}
//
// Find and report PE/COFF image info to HOST
//
FindAndReportModuleImageInfo (SIZE_4KB);
}
break;
//
// Restore saved IDT entries
//
CopyMem ((VOID *)IdtDescriptor.Base, &IdtEntry, 33 * sizeof (IA32_IDT_GATE_DESCRIPTOR));
default:
//
// Only DEBUG_AGENT_INIT_PREMEM_SEC and DEBUG_AGENT_INIT_POSTMEM_SEC are allowed for this
// Debug Agent library instance.
//
DEBUG ((DEBUG_ERROR, "Debug Agent: The InitFlag value is not allowed!\n"));
CpuDeadLoop ();
break;
break;
case DEBUG_AGENT_INIT_ENTER_SMI:
SaveDebugRegister ();
if (!mSmmDebugIdtInitFlag) {
//
// We only need to initialize Debug IDT table at first SMI entry
// after SMM relocation.
//
InitializeDebugIdt ();
mSmmDebugIdtInitFlag = TRUE;
}
//
// Check if CPU APIC Timer is working, otherwise initialize it.
//
InitializeLocalApicSoftwareEnable (TRUE);
GetApicTimerState (&mApicTimerDivisor, &mPeriodicMode, &mVector);
mTimerCycle = GetApicTimerInitCount ();
if (!mPeriodicMode || (mTimerCycle == 0)) {
mApicTimerRestore = TRUE;
InitializeDebugTimer (NULL, FALSE);
}
Mailbox = GetMailboxPointer ();
if (GetDebugFlag (DEBUG_AGENT_FLAG_AGENT_IN_PROGRESS) == 1) {
//
// If Debug Agent has been communication state with HOST, we need skip
// any break points set in SMM, set Skip Breakpoint flag
//
mSkipBreakpoint = TRUE;
}
if (GetDebugFlag (DEBUG_AGENT_FLAG_BREAK_ON_NEXT_SMI) == 1) {
if (mSkipBreakpoint) {
//
// Print warning message if ignore smm entry break
//
DebugPortWriteBuffer (
(DEBUG_PORT_HANDLE)(UINTN)Mailbox->DebugPortHandle,
(UINT8 *)mWarningMsgIgnoreSmmEntryBreak,
AsciiStrLen (mWarningMsgIgnoreSmmEntryBreak)
);
} else {
//
// If SMM entry break is set, SMM code will be break at here.
//
CpuBreakpoint ();
}
}
break;
case DEBUG_AGENT_INIT_EXIT_SMI:
Mailbox = GetMailboxPointer ();
//
// Clear Skip Breakpoint flag
//
mSkipBreakpoint = FALSE;
RestoreDebugRegister ();
//
// Restore APIC Timer
//
if (mApicTimerRestore) {
InitializeApicTimer (mApicTimerDivisor, mTimerCycle, mPeriodicMode, mVector);
mApicTimerRestore = FALSE;
}
break;
case DEBUG_AGENT_INIT_THUNK_PEI_IA32TOX64:
if (Context == NULL) {
DEBUG ((DEBUG_ERROR, "DebugAgent: Input parameter Context cannot be NULL!\n"));
CpuDeadLoop ();
} else {
Ia32Idtr = (IA32_DESCRIPTOR *)Context;
Ia32IdtEntry = (IA32_IDT_ENTRY *)(Ia32Idtr->Base);
MailboxLocation = (UINT64 *)((UINTN)Ia32IdtEntry[DEBUG_MAILBOX_VECTOR].Bits.OffsetLow +
((UINTN)Ia32IdtEntry[DEBUG_MAILBOX_VECTOR].Bits.OffsetHigh << 16));
mMailboxPointer = (DEBUG_AGENT_MAILBOX *)(UINTN)(*MailboxLocation);
VerifyMailboxChecksum (mMailboxPointer);
//
// Get original IDT address and size.
//
AsmReadIdtr ((IA32_DESCRIPTOR *)&Idtr);
IdtEntryCount = (UINT16)((Idtr.Limit + 1) / sizeof (IA32_IDT_GATE_DESCRIPTOR));
if (IdtEntryCount < 33) {
Idtr.Limit = (UINT16)(sizeof (IA32_IDT_GATE_DESCRIPTOR) * 33 - 1);
Idtr.Base = (UINTN)&mIdtEntryTable;
ZeroMem (&mIdtEntryTable, Idtr.Limit + 1);
AsmWriteIdtr ((IA32_DESCRIPTOR *)&Idtr);
}
InitializeDebugIdt ();
//
// Initialize Debug Timer hardware and save its frequency
//
InitializeDebugTimer (&DebugTimerFrequency, TRUE);
UpdateMailboxContent (mMailboxPointer, DEBUG_MAILBOX_DEBUG_TIMER_FREQUENCY, DebugTimerFrequency);
//
// Enable Debug Timer interrupt and CPU interrupt
//
SaveAndSetDebugTimerInterrupt (TRUE);
EnableInterrupts ();
FindAndReportModuleImageInfo (SIZE_4KB);
}
break;
default:
//
// Only DEBUG_AGENT_INIT_PREMEM_SEC and DEBUG_AGENT_INIT_POSTMEM_SEC are allowed for this
// Debug Agent library instance.
//
DEBUG ((DEBUG_ERROR, "Debug Agent: The InitFlag value is not allowed!\n"));
CpuDeadLoop ();
break;
}
}

View File

@ -55,10 +55,10 @@ DebugPortInitialize (
IN DEBUG_PORT_CONTINUE Function
)
{
RETURN_STATUS Status;
RETURN_STATUS Status;
Status = SerialPortInitialize ();
if (RETURN_ERROR(Status)) {
if (RETURN_ERROR (Status)) {
DEBUG ((DEBUG_ERROR, "Debug Serial Port: Initialization failed!\n"));
}
@ -89,13 +89,13 @@ DebugPortInitialize (
UINTN
EFIAPI
DebugPortReadBuffer (
IN DEBUG_PORT_HANDLE Handle,
IN UINT8 *Buffer,
IN UINTN NumberOfBytes,
IN UINTN Timeout
IN DEBUG_PORT_HANDLE Handle,
IN UINT8 *Buffer,
IN UINTN NumberOfBytes,
IN UINTN Timeout
)
{
if (NumberOfBytes != 1 || Buffer == NULL || Timeout != 0) {
if ((NumberOfBytes != 1) || (Buffer == NULL) || (Timeout != 0)) {
return 0;
}
@ -122,9 +122,9 @@ DebugPortReadBuffer (
UINTN
EFIAPI
DebugPortWriteBuffer (
IN DEBUG_PORT_HANDLE Handle,
IN UINT8 *Buffer,
IN UINTN NumberOfBytes
IN DEBUG_PORT_HANDLE Handle,
IN UINT8 *Buffer,
IN UINTN NumberOfBytes
)
{
return SerialPortWrite (Buffer, NumberOfBytes);
@ -146,7 +146,7 @@ DebugPortWriteBuffer (
BOOLEAN
EFIAPI
DebugPortPollBuffer (
IN DEBUG_PORT_HANDLE Handle
IN DEBUG_PORT_HANDLE Handle
)
{
return SerialPortPoll ();

View File

@ -8,27 +8,27 @@
#include "DebugCommunicationLibUsb3Internal.h"
UINT16 mString0Desc[] = {
UINT16 mString0Desc[] = {
// String Descriptor Type + Length
( USB_DESC_TYPE_STRING << 8 ) + STRING0_DESC_LEN,
(USB_DESC_TYPE_STRING << 8) + STRING0_DESC_LEN,
0x0409
};
UINT16 mManufacturerStrDesc[] = {
UINT16 mManufacturerStrDesc[] = {
// String Descriptor Type + Length
( USB_DESC_TYPE_STRING << 8 ) + MANU_DESC_LEN,
'I', 'n', 't', 'e', 'l'
(USB_DESC_TYPE_STRING << 8) + MANU_DESC_LEN,
'I', 'n','t', 'e', 'l'
};
UINT16 mProductStrDesc[] = {
UINT16 mProductStrDesc[] = {
// String Descriptor Type + Length
( USB_DESC_TYPE_STRING << 8 ) + PRODUCT_DESC_LEN,
'U', 'S', 'B', ' ', '3', '.', '0', ' ', 'D', 'e', 'b', 'u', 'g', ' ', 'C', 'a', 'b', 'l', 'e'
(USB_DESC_TYPE_STRING << 8) + PRODUCT_DESC_LEN,
'U', 'S','B', ' ', '3', '.', '0', ' ', 'D', 'e', 'b', 'u', 'g', ' ', 'C', 'a', 'b', 'l', 'e'
};
UINT16 mSerialNumberStrDesc[] = {
UINT16 mSerialNumberStrDesc[] = {
// String Descriptor Type + Length
( USB_DESC_TYPE_STRING << 8 ) + SERIAL_DESC_LEN,
(USB_DESC_TYPE_STRING << 8) + SERIAL_DESC_LEN,
'1'
};
@ -39,14 +39,14 @@ UINT16 mSerialNumberStrDesc[] = {
@param[in] BitMask 32-bit mask
**/
VOID
XhcSetR32Bit(
IN OUT UINTN Register,
IN UINT32 BitMask
XhcSetR32Bit (
IN OUT UINTN Register,
IN UINT32 BitMask
)
{
UINT32 RegisterValue;
UINT32 RegisterValue;
RegisterValue = MmioRead32 (Register);
RegisterValue = MmioRead32 (Register);
RegisterValue |= (UINT32)(BitMask);
MmioWrite32 (Register, RegisterValue);
}
@ -58,14 +58,14 @@ XhcSetR32Bit(
@param[in] BitMask 32-bit mask
**/
VOID
XhcClearR32Bit(
IN OUT UINTN Register,
IN UINT32 BitMask
XhcClearR32Bit (
IN OUT UINTN Register,
IN UINT32 BitMask
)
{
UINT32 RegisterValue;
UINT32 RegisterValue;
RegisterValue = MmioRead32 (Register);
RegisterValue = MmioRead32 (Register);
RegisterValue &= ~BitMask;
MmioWrite32 (Register, RegisterValue);
}
@ -104,15 +104,15 @@ XhcWriteDebugReg (
**/
UINT32
XhcReadDebugReg (
IN USB3_DEBUG_PORT_HANDLE *Handle,
IN UINT32 Offset
IN USB3_DEBUG_PORT_HANDLE *Handle,
IN UINT32 Offset
)
{
UINT32 Data;
EFI_PHYSICAL_ADDRESS DebugCapabilityBase;
UINT32 Data;
EFI_PHYSICAL_ADDRESS DebugCapabilityBase;
DebugCapabilityBase = Handle->DebugCapabilityBase;
Data = MmioRead32 ((UINTN)(DebugCapabilityBase + Offset));
Data = MmioRead32 ((UINTN)(DebugCapabilityBase + Offset));
return Data;
}
@ -127,12 +127,12 @@ XhcReadDebugReg (
**/
VOID
XhcSetDebugRegBit (
IN USB3_DEBUG_PORT_HANDLE *Handle,
IN UINT32 Offset,
IN UINT32 Bit
IN USB3_DEBUG_PORT_HANDLE *Handle,
IN UINT32 Offset,
IN UINT32 Bit
)
{
UINT32 Data;
UINT32 Data;
Data = XhcReadDebugReg (Handle, Offset);
Data |= Bit;
@ -149,15 +149,15 @@ XhcSetDebugRegBit (
**/
VOID
XhcClearDebugRegBit (
IN USB3_DEBUG_PORT_HANDLE *Handle,
IN UINT32 Offset,
IN UINT32 Bit
IN USB3_DEBUG_PORT_HANDLE *Handle,
IN UINT32 Offset,
IN UINT32 Bit
)
{
UINT32 Data;
UINT32 Data;
Data = XhcReadDebugReg (Handle, Offset);
Data &= ~Bit;
Data &= ~Bit;
XhcWriteDebugReg (Handle, Offset, Data);
}
@ -172,26 +172,26 @@ ProgramXhciBaseAddress (
VOID
)
{
UINT16 PciCmd;
UINT32 Low;
UINT32 High;
EFI_PHYSICAL_ADDRESS XhciMmioBase;
UINT16 PciCmd;
UINT32 Low;
UINT32 High;
EFI_PHYSICAL_ADDRESS XhciMmioBase;
Low = PciRead32 (PcdGet32(PcdUsbXhciPciAddress) + PCI_BASE_ADDRESSREG_OFFSET);
High = PciRead32 (PcdGet32(PcdUsbXhciPciAddress) + PCI_BASE_ADDRESSREG_OFFSET + 4);
XhciMmioBase = (EFI_PHYSICAL_ADDRESS) (LShiftU64 ((UINT64) High, 32) | Low);
Low = PciRead32 (PcdGet32 (PcdUsbXhciPciAddress) + PCI_BASE_ADDRESSREG_OFFSET);
High = PciRead32 (PcdGet32 (PcdUsbXhciPciAddress) + PCI_BASE_ADDRESSREG_OFFSET + 4);
XhciMmioBase = (EFI_PHYSICAL_ADDRESS)(LShiftU64 ((UINT64)High, 32) | Low);
XhciMmioBase &= XHCI_BASE_ADDRESS_64_BIT_MASK;
if ((XhciMmioBase == 0) || (XhciMmioBase == XHCI_BASE_ADDRESS_64_BIT_MASK)) {
XhciMmioBase = PcdGet64(PcdUsbXhciMemorySpaceBase);
PciWrite32(PcdGet32(PcdUsbXhciPciAddress) + PCI_BASE_ADDRESSREG_OFFSET, XhciMmioBase & 0xFFFFFFFF);
PciWrite32(PcdGet32(PcdUsbXhciPciAddress) + PCI_BASE_ADDRESSREG_OFFSET + 4, (RShiftU64 (XhciMmioBase, 32) & 0xFFFFFFFF));
XhciMmioBase = PcdGet64 (PcdUsbXhciMemorySpaceBase);
PciWrite32 (PcdGet32 (PcdUsbXhciPciAddress) + PCI_BASE_ADDRESSREG_OFFSET, XhciMmioBase & 0xFFFFFFFF);
PciWrite32 (PcdGet32 (PcdUsbXhciPciAddress) + PCI_BASE_ADDRESSREG_OFFSET + 4, (RShiftU64 (XhciMmioBase, 32) & 0xFFFFFFFF));
}
PciCmd = PciRead16 (PcdGet32(PcdUsbXhciPciAddress) + PCI_COMMAND_OFFSET);
PciCmd = PciRead16 (PcdGet32 (PcdUsbXhciPciAddress) + PCI_COMMAND_OFFSET);
if (((PciCmd & EFI_PCI_COMMAND_MEMORY_SPACE) == 0) || ((PciCmd & EFI_PCI_COMMAND_BUS_MASTER) == 0)) {
PciCmd |= EFI_PCI_COMMAND_MEMORY_SPACE | EFI_PCI_COMMAND_BUS_MASTER;
PciWrite16(PcdGet32(PcdUsbXhciPciAddress) + PCI_COMMAND_OFFSET, PciCmd);
PciWrite16 (PcdGet32 (PcdUsbXhciPciAddress) + PCI_COMMAND_OFFSET, PciCmd);
}
return XhciMmioBase;
@ -206,8 +206,8 @@ ProgramXhciBaseAddress (
**/
VOID
UpdateXhcResource (
IN OUT USB3_DEBUG_PORT_HANDLE *Handle,
IN EFI_PHYSICAL_ADDRESS XhciMmioBase
IN OUT USB3_DEBUG_PORT_HANDLE *Handle,
IN EFI_PHYSICAL_ADDRESS XhciMmioBase
)
{
if (Handle == NULL) {
@ -234,18 +234,18 @@ UpdateXhcResource (
RETURN_STATUS
EFIAPI
CalculateUsbDebugPortMmioBase (
USB3_DEBUG_PORT_HANDLE *Handle
)
USB3_DEBUG_PORT_HANDLE *Handle
)
{
UINT16 VendorId;
UINT16 DeviceId;
UINT8 ProgInterface;
UINT8 SubClassCode;
UINT8 BaseCode;
BOOLEAN Flag;
UINT32 Capability;
EFI_PHYSICAL_ADDRESS CapabilityPointer;
UINT8 CapLength;
UINT16 VendorId;
UINT16 DeviceId;
UINT8 ProgInterface;
UINT8 SubClassCode;
UINT8 BaseCode;
BOOLEAN Flag;
UINT32 Capability;
EFI_PHYSICAL_ADDRESS CapabilityPointer;
UINT8 CapLength;
if (Handle->Initialized != USB3DBG_UNINITIALIZED) {
if (Handle->Initialized == USB3DBG_NO_DBG_CAB) {
@ -255,22 +255,22 @@ CalculateUsbDebugPortMmioBase (
}
}
VendorId = PciRead16 (PcdGet32(PcdUsbXhciPciAddress) + PCI_VENDOR_ID_OFFSET);
DeviceId = PciRead16 (PcdGet32(PcdUsbXhciPciAddress) + PCI_DEVICE_ID_OFFSET);
VendorId = PciRead16 (PcdGet32 (PcdUsbXhciPciAddress) + PCI_VENDOR_ID_OFFSET);
DeviceId = PciRead16 (PcdGet32 (PcdUsbXhciPciAddress) + PCI_DEVICE_ID_OFFSET);
if ((VendorId == 0xFFFF) || (DeviceId == 0xFFFF)) {
goto Done;
}
ProgInterface = PciRead8 (PcdGet32(PcdUsbXhciPciAddress) + PCI_CLASSCODE_OFFSET);
SubClassCode = PciRead8 (PcdGet32(PcdUsbXhciPciAddress) + PCI_CLASSCODE_OFFSET + 1);
BaseCode = PciRead8 (PcdGet32(PcdUsbXhciPciAddress) + PCI_CLASSCODE_OFFSET + 2);
ProgInterface = PciRead8 (PcdGet32 (PcdUsbXhciPciAddress) + PCI_CLASSCODE_OFFSET);
SubClassCode = PciRead8 (PcdGet32 (PcdUsbXhciPciAddress) + PCI_CLASSCODE_OFFSET + 1);
BaseCode = PciRead8 (PcdGet32 (PcdUsbXhciPciAddress) + PCI_CLASSCODE_OFFSET + 2);
if ((ProgInterface != PCI_IF_XHCI) || (SubClassCode != PCI_CLASS_SERIAL_USB) || (BaseCode != PCI_CLASS_SERIAL)) {
goto Done;
}
CapLength = MmioRead8 ((UINTN) Handle->XhciMmioBase);
CapLength = MmioRead8 ((UINTN)Handle->XhciMmioBase);
//
// Get capability pointer from HCCPARAMS at offset 0x10
@ -280,21 +280,23 @@ CalculateUsbDebugPortMmioBase (
//
// Search XHCI debug capability
//
Flag = FALSE;
Flag = FALSE;
Capability = MmioRead32 ((UINTN)CapabilityPointer);
while (TRUE) {
if ((Capability & XHC_CAPABILITY_ID_MASK) == PCI_CAPABILITY_ID_DEBUG_PORT) {
Flag = TRUE;
break;
}
if ((((Capability & XHC_NEXT_CAPABILITY_MASK) >> 8) & XHC_CAPABILITY_ID_MASK) == 0) {
//
// Reach the end of capability list, quit
//
break;
}
CapabilityPointer += ((Capability & XHC_NEXT_CAPABILITY_MASK) >> 8) * 4;
Capability = MmioRead32 ((UINTN)CapabilityPointer);
Capability = MmioRead32 ((UINTN)CapabilityPointer);
}
if (!Flag) {
@ -307,8 +309,8 @@ CalculateUsbDebugPortMmioBase (
Handle->DebugCapabilityBase = CapabilityPointer;
Handle->DebugCapabilityOffset = CapabilityPointer - Handle->XhciMmioBase;
Handle->XhciOpRegister = Handle->XhciMmioBase + CapLength;
Handle->DebugSupport = TRUE;
Handle->Initialized = USB3DBG_DBG_CAB;
Handle->DebugSupport = TRUE;
Handle->Initialized = USB3DBG_DBG_CAB;
return RETURN_SUCCESS;
Done:
@ -331,12 +333,12 @@ Done:
**/
BOOLEAN
EFIAPI
NeedReinitializeHardware(
IN USB3_DEBUG_PORT_HANDLE *Handle
NeedReinitializeHardware (
IN USB3_DEBUG_PORT_HANDLE *Handle
)
{
BOOLEAN Result;
volatile UINT32 Dcctrl;
BOOLEAN Result;
volatile UINT32 Dcctrl;
Result = FALSE;
@ -347,7 +349,7 @@ NeedReinitializeHardware(
if ((Dcctrl & BIT0) == 0) {
Result = TRUE;
} else if (!Handle->Ready) {
Handle->Ready = TRUE;
Handle->Ready = TRUE;
Handle->Initialized = USB3DBG_ENABLED;
}
@ -363,8 +365,8 @@ NeedReinitializeHardware(
**/
EFI_STATUS
CreateEventRing (
IN USB3_DEBUG_PORT_HANDLE *Handle,
OUT EVENT_RING *EventRing
IN USB3_DEBUG_PORT_HANDLE *Handle,
OUT EVENT_RING *EventRing
)
{
VOID *Buf;
@ -377,13 +379,13 @@ CreateEventRing (
//
Buf = AllocateAlignBuffer (sizeof (TRB_TEMPLATE) * EVENT_RING_TRB_NUMBER);
ASSERT (Buf != NULL);
ASSERT (((UINTN) Buf & 0x3F) == 0);
ASSERT (((UINTN)Buf & 0x3F) == 0);
ZeroMem (Buf, sizeof (TRB_TEMPLATE) * EVENT_RING_TRB_NUMBER);
EventRing->EventRingSeg0 = (EFI_PHYSICAL_ADDRESS)(UINTN) Buf;
EventRing->EventRingSeg0 = (EFI_PHYSICAL_ADDRESS)(UINTN)Buf;
EventRing->TrbNumber = EVENT_RING_TRB_NUMBER;
EventRing->EventRingDequeue = (EFI_PHYSICAL_ADDRESS)(UINTN) EventRing->EventRingSeg0;
EventRing->EventRingEnqueue = (EFI_PHYSICAL_ADDRESS)(UINTN) EventRing->EventRingSeg0;
EventRing->EventRingDequeue = (EFI_PHYSICAL_ADDRESS)(UINTN)EventRing->EventRingSeg0;
EventRing->EventRingEnqueue = (EFI_PHYSICAL_ADDRESS)(UINTN)EventRing->EventRingSeg0;
//
// Software maintains an Event Ring Consumer Cycle State (CCS) bit, initializing it to '1'
@ -396,11 +398,11 @@ CreateEventRing (
//
Buf = AllocateAlignBuffer (sizeof (EVENT_RING_SEG_TABLE_ENTRY) * ERST_NUMBER);
ASSERT (Buf != NULL);
ASSERT (((UINTN) Buf & 0x3F) == 0);
ASSERT (((UINTN)Buf & 0x3F) == 0);
ZeroMem (Buf, sizeof (EVENT_RING_SEG_TABLE_ENTRY) * ERST_NUMBER);
ERSTBase = (EVENT_RING_SEG_TABLE_ENTRY *) Buf;
EventRing->ERSTBase = (EFI_PHYSICAL_ADDRESS)(UINTN) ERSTBase;
ERSTBase = (EVENT_RING_SEG_TABLE_ENTRY *)Buf;
EventRing->ERSTBase = (EFI_PHYSICAL_ADDRESS)(UINTN)ERSTBase;
//
// Fill Event Segment address
@ -415,13 +417,13 @@ CreateEventRing (
XhcWriteDebugReg (
Handle,
XHC_DC_DCERDP,
XHC_LOW_32BIT((UINT64)(UINTN)EventRing->EventRingDequeue)
XHC_LOW_32BIT ((UINT64)(UINTN)EventRing->EventRingDequeue)
);
XhcWriteDebugReg (
Handle,
XHC_DC_DCERDP + 4,
XHC_HIGH_32BIT((UINT64)(UINTN)EventRing->EventRingDequeue)
XHC_HIGH_32BIT ((UINT64)(UINTN)EventRing->EventRingDequeue)
);
//
@ -430,13 +432,13 @@ CreateEventRing (
XhcWriteDebugReg (
Handle,
XHC_DC_DCERSTBA,
XHC_LOW_32BIT((UINT64)(UINTN)ERSTBase)
XHC_LOW_32BIT ((UINT64)(UINTN)ERSTBase)
);
XhcWriteDebugReg (
Handle,
XHC_DC_DCERSTBA + 4,
XHC_HIGH_32BIT((UINT64)(UINTN)ERSTBase)
XHC_HIGH_32BIT ((UINT64)(UINTN)ERSTBase)
);
//
@ -460,37 +462,37 @@ CreateEventRing (
**/
VOID
CreateTransferRing (
IN USB3_DEBUG_PORT_HANDLE *Handle,
IN UINT32 TrbNum,
OUT TRANSFER_RING *TransferRing
IN USB3_DEBUG_PORT_HANDLE *Handle,
IN UINT32 TrbNum,
OUT TRANSFER_RING *TransferRing
)
{
VOID *Buf;
LINK_TRB *EndTrb;
VOID *Buf;
LINK_TRB *EndTrb;
Buf = AllocateAlignBuffer (sizeof (TRB_TEMPLATE) * TrbNum);
ASSERT (Buf != NULL);
ASSERT (((UINTN) Buf & 0xF) == 0);
ASSERT (((UINTN)Buf & 0xF) == 0);
ZeroMem (Buf, sizeof (TRB_TEMPLATE) * TrbNum);
TransferRing->RingSeg0 = (EFI_PHYSICAL_ADDRESS)(UINTN) Buf;
TransferRing->TrbNumber = TrbNum;
TransferRing->RingEnqueue = TransferRing->RingSeg0;
TransferRing->RingDequeue = TransferRing->RingSeg0;
TransferRing->RingPCS = 1;
TransferRing->RingSeg0 = (EFI_PHYSICAL_ADDRESS)(UINTN)Buf;
TransferRing->TrbNumber = TrbNum;
TransferRing->RingEnqueue = TransferRing->RingSeg0;
TransferRing->RingDequeue = TransferRing->RingSeg0;
TransferRing->RingPCS = 1;
//
// 4.9.2 Transfer Ring Management
// To form a ring (or circular queue) a Link TRB may be inserted at the end of a ring to
// point to the first TRB in the ring.
//
EndTrb = (LINK_TRB *) ((UINTN)Buf + sizeof (TRB_TEMPLATE) * (TrbNum - 1));
EndTrb = (LINK_TRB *)((UINTN)Buf + sizeof (TRB_TEMPLATE) * (TrbNum - 1));
EndTrb->Type = TRB_TYPE_LINK;
EndTrb->PtrLo = XHC_LOW_32BIT (Buf);
EndTrb->PtrHi = XHC_HIGH_32BIT (Buf);
//
// Toggle Cycle (TC). When set to '1', the xHC shall toggle its interpretation of the Cycle bit.
//
EndTrb->TC = 1;
EndTrb->TC = 1;
//
// Set Cycle bit as other TRB PCS init value
//
@ -508,26 +510,26 @@ CreateTransferRing (
**/
EFI_STATUS
CreateDebugCapabilityContext (
IN USB3_DEBUG_PORT_HANDLE *Handle
IN USB3_DEBUG_PORT_HANDLE *Handle
)
{
VOID *Buf;
XHC_DC_CONTEXT *DebugCapabilityContext;
UINT8 *String0Desc;
UINT8 *ManufacturerStrDesc;
UINT8 *ProductStrDesc;
UINT8 *SerialNumberStrDesc;
VOID *Buf;
XHC_DC_CONTEXT *DebugCapabilityContext;
UINT8 *String0Desc;
UINT8 *ManufacturerStrDesc;
UINT8 *ProductStrDesc;
UINT8 *SerialNumberStrDesc;
//
// Allocate debug device context
//
Buf = AllocateAlignBuffer (sizeof (XHC_DC_CONTEXT));
ASSERT (Buf != NULL);
ASSERT (((UINTN) Buf & 0xF) == 0);
ASSERT (((UINTN)Buf & 0xF) == 0);
ZeroMem (Buf, sizeof (XHC_DC_CONTEXT));
DebugCapabilityContext = (XHC_DC_CONTEXT *)(UINTN) Buf;
Handle->DebugCapabilityContext = (EFI_PHYSICAL_ADDRESS)(UINTN) DebugCapabilityContext;
DebugCapabilityContext = (XHC_DC_CONTEXT *)(UINTN)Buf;
Handle->DebugCapabilityContext = (EFI_PHYSICAL_ADDRESS)(UINTN)DebugCapabilityContext;
//
// Initialize DbcInfoContext.
@ -556,7 +558,7 @@ CreateDebugCapabilityContext (
//
// Update string descriptor address
//
String0Desc = (UINT8 *) AllocateAlignBuffer (STRING0_DESC_LEN + MANU_DESC_LEN + PRODUCT_DESC_LEN + SERIAL_DESC_LEN);
String0Desc = (UINT8 *)AllocateAlignBuffer (STRING0_DESC_LEN + MANU_DESC_LEN + PRODUCT_DESC_LEN + SERIAL_DESC_LEN);
ASSERT (String0Desc != NULL);
ZeroMem (String0Desc, STRING0_DESC_LEN + MANU_DESC_LEN + PRODUCT_DESC_LEN + SERIAL_DESC_LEN);
CopyMem (String0Desc, mString0Desc, STRING0_DESC_LEN);
@ -596,12 +598,12 @@ CreateDebugCapabilityContext (
XhcWriteDebugReg (
Handle,
XHC_DC_DCCP,
XHC_LOW_32BIT((UINT64)(UINTN)DebugCapabilityContext)
XHC_LOW_32BIT ((UINT64)(UINTN)DebugCapabilityContext)
);
XhcWriteDebugReg (
Handle,
XHC_DC_DCCP + 4,
XHC_HIGH_32BIT((UINT64)(UINTN)DebugCapabilityContext)
XHC_HIGH_32BIT ((UINT64)(UINTN)DebugCapabilityContext)
);
return EFI_SUCCESS;
}
@ -614,11 +616,11 @@ CreateDebugCapabilityContext (
**/
VOID
XhcDetectDebugCapabilityReady (
IN USB3_DEBUG_PORT_HANDLE *Handle
IN USB3_DEBUG_PORT_HANDLE *Handle
)
{
UINT64 TimeOut;
volatile UINT32 Dcctrl;
UINT64 TimeOut;
volatile UINT32 Dcctrl;
TimeOut = 1;
if (Handle->Initialized == USB3DBG_DBG_CAB) {
@ -642,6 +644,7 @@ XhcDetectDebugCapabilityReady (
Handle->Ready = TRUE;
break;
}
MicroSecondDelay (XHC_POLL_DELAY);
TimeOut--;
} while (TimeOut != 0);
@ -659,27 +662,28 @@ XhcDetectDebugCapabilityReady (
RETURN_STATUS
EFIAPI
InitializeUsbDebugHardware (
IN USB3_DEBUG_PORT_HANDLE *Handle
IN USB3_DEBUG_PORT_HANDLE *Handle
)
{
RETURN_STATUS Status;
UINT8 *Buffer;
UINTN Index;
UINT8 TotalUsb3Port;
EFI_PHYSICAL_ADDRESS XhciOpRegister;
UINT32 Dcddi1;
RETURN_STATUS Status;
UINT8 *Buffer;
UINTN Index;
UINT8 TotalUsb3Port;
EFI_PHYSICAL_ADDRESS XhciOpRegister;
UINT32 Dcddi1;
XhciOpRegister = Handle->XhciOpRegister;
TotalUsb3Port = MmioRead32 (((UINTN) Handle->XhciMmioBase + XHC_HCSPARAMS1_OFFSET)) >> 24;
TotalUsb3Port = MmioRead32 (((UINTN)Handle->XhciMmioBase + XHC_HCSPARAMS1_OFFSET)) >> 24;
if (Handle->Initialized == USB3DBG_NOT_ENABLED) {
Dcddi1 = XhcReadDebugReg (Handle,XHC_DC_DCDDI1);
Dcddi1 = XhcReadDebugReg (Handle, XHC_DC_DCDDI1);
if (Dcddi1 != (UINT32)((XHCI_DEBUG_DEVICE_VENDOR_ID << 16) | XHCI_DEBUG_DEVICE_PROTOCOL)) {
//
// The debug capability has been reset by other code, return device error.
//
return EFI_DEVICE_ERROR;
}
//
// If XHCI supports debug capability, hardware resource has been allocated,
// but it has not been enabled, try to enable again.
@ -718,8 +722,8 @@ InitializeUsbDebugHardware (
//
// Construct the buffer for read, poll and write.
//
Handle->UrbIn.Data = (EFI_PHYSICAL_ADDRESS)(UINTN) Buffer;
Handle->Data = (EFI_PHYSICAL_ADDRESS)(UINTN) Buffer + XHCI_DEBUG_DEVICE_MAX_PACKET_SIZE;
Handle->UrbIn.Data = (EFI_PHYSICAL_ADDRESS)(UINTN)Buffer;
Handle->Data = (EFI_PHYSICAL_ADDRESS)(UINTN)Buffer + XHCI_DEBUG_DEVICE_MAX_PACKET_SIZE;
Handle->UrbOut.Data = Handle->UrbIn.Data + XHCI_DEBUG_DEVICE_MAX_PACKET_SIZE * 2;
//
@ -739,16 +743,16 @@ InitializeUsbDebugHardware (
// Init DCDDI1 and DCDDI2
//
XhcWriteDebugReg (
Handle,
XHC_DC_DCDDI1,
(UINT32)((XHCI_DEBUG_DEVICE_VENDOR_ID << 16) | XHCI_DEBUG_DEVICE_PROTOCOL)
);
Handle,
XHC_DC_DCDDI1,
(UINT32)((XHCI_DEBUG_DEVICE_VENDOR_ID << 16) | XHCI_DEBUG_DEVICE_PROTOCOL)
);
XhcWriteDebugReg (
Handle,
XHC_DC_DCDDI2,
(UINT32)((XHCI_DEBUG_DEVICE_REVISION << 16) | XHCI_DEBUG_DEVICE_PRODUCT_ID)
);
Handle,
XHC_DC_DCDDI2,
(UINT32)((XHCI_DEBUG_DEVICE_REVISION << 16) | XHCI_DEBUG_DEVICE_PRODUCT_ID)
);
Enable:
if ((Handle->Initialized == USB3DBG_NOT_ENABLED) && (!Handle->ChangePortPower)) {
@ -775,7 +779,7 @@ Enable:
Status = RETURN_SUCCESS;
if (!Handle->Ready) {
Handle->Initialized = USB3DBG_NOT_ENABLED;
Status = RETURN_NOT_READY;
Status = RETURN_NOT_READY;
} else {
Handle->Initialized = USB3DBG_ENABLED;
}
@ -791,16 +795,16 @@ Enable:
**/
VOID
DiscoverInitializeUsbDebugPort (
IN USB3_DEBUG_PORT_HANDLE *Handle
IN USB3_DEBUG_PORT_HANDLE *Handle
)
{
EFI_STATUS Status;
EFI_PHYSICAL_ADDRESS XhciMmioBase;
EFI_STATUS Status;
EFI_PHYSICAL_ADDRESS XhciMmioBase;
//
// Read 64-bit MMIO base address
//
XhciMmioBase = ProgramXhciBaseAddress ();
XhciMmioBase = ProgramXhciBaseAddress ();
Handle->XhciMmioBase = XhciMmioBase;
Status = CalculateUsbDebugPortMmioBase (Handle);
@ -820,14 +824,14 @@ DiscoverInitializeUsbDebugPort (
**/
VOID
SetUsb3DebugPortInstance (
IN USB3_DEBUG_PORT_HANDLE *Instance
IN USB3_DEBUG_PORT_HANDLE *Instance
)
{
EFI_PHYSICAL_ADDRESS *AddrPtr;
EFI_PHYSICAL_ADDRESS *AddrPtr;
AddrPtr = GetUsb3DebugPortInstanceAddrPtr ();
ASSERT (AddrPtr != NULL);
*AddrPtr = (EFI_PHYSICAL_ADDRESS) (UINTN) Instance;
*AddrPtr = (EFI_PHYSICAL_ADDRESS)(UINTN)Instance;
}
/**
@ -839,13 +843,13 @@ GetUsb3DebugPortInstance (
VOID
)
{
EFI_PHYSICAL_ADDRESS *AddrPtr;
USB3_DEBUG_PORT_HANDLE *Instance;
EFI_PHYSICAL_ADDRESS *AddrPtr;
USB3_DEBUG_PORT_HANDLE *Instance;
AddrPtr = GetUsb3DebugPortInstanceAddrPtr ();
ASSERT (AddrPtr != NULL);
Instance = (USB3_DEBUG_PORT_HANDLE *) (UINTN) *AddrPtr;
Instance = (USB3_DEBUG_PORT_HANDLE *)(UINTN)*AddrPtr;
return Instance;
}
@ -870,17 +874,17 @@ GetUsb3DebugPortInstance (
UINTN
EFIAPI
DebugPortReadBuffer (
IN DEBUG_PORT_HANDLE Handle,
IN UINT8 *Buffer,
IN UINTN NumberOfBytes,
IN UINTN Timeout
IN DEBUG_PORT_HANDLE Handle,
IN UINT8 *Buffer,
IN UINTN NumberOfBytes,
IN UINTN Timeout
)
{
USB3_DEBUG_PORT_HANDLE *UsbDebugPortHandle;
UINT8 Index;
UINT8 *Data;
USB3_DEBUG_PORT_HANDLE *UsbDebugPortHandle;
UINT8 Index;
UINT8 *Data;
if (NumberOfBytes != 1 || Buffer == NULL || Timeout != 0) {
if ((NumberOfBytes != 1) || (Buffer == NULL) || (Timeout != 0)) {
return 0;
}
@ -889,11 +893,12 @@ DebugPortReadBuffer (
// If Handle is not NULL, use it and set the instance.
//
if (Handle != NULL) {
UsbDebugPortHandle = (USB3_DEBUG_PORT_HANDLE *) Handle;
UsbDebugPortHandle = (USB3_DEBUG_PORT_HANDLE *)Handle;
SetUsb3DebugPortInstance (UsbDebugPortHandle);
} else {
UsbDebugPortHandle = GetUsb3DebugPortInstance ();
}
if (UsbDebugPortHandle == NULL) {
return 0;
}
@ -922,8 +927,10 @@ DebugPortReadBuffer (
if ((Index + 1) >= XHCI_DEBUG_DEVICE_MAX_PACKET_SIZE) {
return 0;
}
Data[Index] = Data[Index + 1];
}
UsbDebugPortHandle->DataCount = (UINT8)(UsbDebugPortHandle->DataCount - 1);
return 1;
}
@ -949,16 +956,16 @@ DebugPortReadBuffer (
UINTN
EFIAPI
DebugPortWriteBuffer (
IN DEBUG_PORT_HANDLE Handle,
IN UINT8 *Buffer,
IN UINTN NumberOfBytes
IN DEBUG_PORT_HANDLE Handle,
IN UINT8 *Buffer,
IN UINTN NumberOfBytes
)
{
USB3_DEBUG_PORT_HANDLE *UsbDebugPortHandle;
UINTN Sent;
UINTN Total;
USB3_DEBUG_PORT_HANDLE *UsbDebugPortHandle;
UINTN Sent;
UINTN Total;
if (NumberOfBytes == 0 || Buffer == NULL) {
if ((NumberOfBytes == 0) || (Buffer == NULL)) {
return 0;
}
@ -970,11 +977,12 @@ DebugPortWriteBuffer (
// If Handle is not NULL, use it and set the instance.
//
if (Handle != NULL) {
UsbDebugPortHandle = (USB3_DEBUG_PORT_HANDLE *) Handle;
UsbDebugPortHandle = (USB3_DEBUG_PORT_HANDLE *)Handle;
SetUsb3DebugPortInstance (UsbDebugPortHandle);
} else {
UsbDebugPortHandle = GetUsb3DebugPortInstance ();
}
if (UsbDebugPortHandle == NULL) {
return 0;
}
@ -1001,6 +1009,7 @@ DebugPortWriteBuffer (
} else {
Sent = (UINT8)(NumberOfBytes - Total);
}
XhcDataTransfer (UsbDebugPortHandle, EfiUsbDataOut, Buffer + Total, &Sent, DATA_TRANSFER_WRITE_TIMEOUT);
Total += Sent;
}
@ -1024,22 +1033,23 @@ DebugPortWriteBuffer (
BOOLEAN
EFIAPI
DebugPortPollBuffer (
IN DEBUG_PORT_HANDLE Handle
IN DEBUG_PORT_HANDLE Handle
)
{
USB3_DEBUG_PORT_HANDLE *UsbDebugPortHandle;
UINTN Length;
USB3_DEBUG_PORT_HANDLE *UsbDebugPortHandle;
UINTN Length;
//
// If Handle is NULL, get own instance.
// If Handle is not NULL, use it and set the instance.
//
if (Handle != NULL) {
UsbDebugPortHandle = (USB3_DEBUG_PORT_HANDLE *) Handle;
UsbDebugPortHandle = (USB3_DEBUG_PORT_HANDLE *)Handle;
SetUsb3DebugPortInstance (UsbDebugPortHandle);
} else {
UsbDebugPortHandle = GetUsb3DebugPortInstance ();
}
if (UsbDebugPortHandle == NULL) {
return FALSE;
}
@ -1079,7 +1089,7 @@ DebugPortPollBuffer (
//
// Store data into internal buffer for use later
//
UsbDebugPortHandle->DataCount = (UINT8) Length;
UsbDebugPortHandle->DataCount = (UINT8)Length;
return TRUE;
}
@ -1114,17 +1124,18 @@ DebugPortInitialize (
IN DEBUG_PORT_CONTINUE Function
)
{
USB3_DEBUG_PORT_HANDLE *UsbDebugPortHandle;
USB3_DEBUG_PORT_HANDLE *UsbDebugPortHandle;
//
// Validate the PCD PcdDebugPortHandleBufferSize value
//
ASSERT (PcdGet16 (PcdDebugPortHandleBufferSize) == sizeof (USB3_DEBUG_PORT_HANDLE));
if (Function == NULL && Context != NULL) {
SetUsb3DebugPortInstance ((USB3_DEBUG_PORT_HANDLE *) Context);
return (DEBUG_PORT_HANDLE) Context;
if ((Function == NULL) && (Context != NULL)) {
SetUsb3DebugPortInstance ((USB3_DEBUG_PORT_HANDLE *)Context);
return (DEBUG_PORT_HANDLE)Context;
}
UsbDebugPortHandle = GetUsb3DebugPortInstance ();
if (UsbDebugPortHandle == NULL) {
return NULL;
@ -1133,8 +1144,8 @@ DebugPortInitialize (
DiscoverInitializeUsbDebugPort (UsbDebugPortHandle);
if (Function != NULL) {
Function (Context, (DEBUG_PORT_HANDLE) UsbDebugPortHandle);
Function (Context, (DEBUG_PORT_HANDLE)UsbDebugPortHandle);
}
return (DEBUG_PORT_HANDLE) UsbDebugPortHandle;
return (DEBUG_PORT_HANDLE)UsbDebugPortHandle;
}

View File

@ -15,12 +15,12 @@
#include <Protocol/DxeSmmReadyToLock.h>
#include "DebugCommunicationLibUsb3Internal.h"
GUID gUsb3DbgGuid = USB3_DBG_GUID;
GUID gUsb3DbgGuid = USB3_DBG_GUID;
USB3_DEBUG_PORT_HANDLE mUsb3Instance = {USB3DBG_UNINITIALIZED};
EFI_PHYSICAL_ADDRESS mUsb3InstanceAddr = 0;
EFI_PHYSICAL_ADDRESS *mUsb3InstanceAddrPtr = NULL;
EFI_PCI_IO_PROTOCOL *mUsb3PciIo = NULL;
USB3_DEBUG_PORT_HANDLE mUsb3Instance = { USB3DBG_UNINITIALIZED };
EFI_PHYSICAL_ADDRESS mUsb3InstanceAddr = 0;
EFI_PHYSICAL_ADDRESS *mUsb3InstanceAddrPtr = NULL;
EFI_PCI_IO_PROTOCOL *mUsb3PciIo = NULL;
/**
Creates a named event that can be signaled.
@ -71,7 +71,7 @@ Usb3NamedEventListen (
// Register for an installation of protocol interface
//
Status = gBS->RegisterProtocolNotify (
(EFI_GUID *) Name,
(EFI_GUID *)Name,
*Event,
&RegistrationLocal
);
@ -90,27 +90,27 @@ Usb3NamedEventListen (
**/
VOID
Usb3MapOneDmaBuffer (
IN EFI_PCI_IO_PROTOCOL *PciIo,
IN EFI_PHYSICAL_ADDRESS Address,
IN UINTN NumberOfBytes
IN EFI_PCI_IO_PROTOCOL *PciIo,
IN EFI_PHYSICAL_ADDRESS Address,
IN UINTN NumberOfBytes
)
{
EFI_STATUS Status;
VOID *HostAddress;
EFI_PHYSICAL_ADDRESS DeviceAddress;
VOID *Mapping;
EFI_STATUS Status;
VOID *HostAddress;
EFI_PHYSICAL_ADDRESS DeviceAddress;
VOID *Mapping;
HostAddress = (VOID *) (UINTN) Address;
Status = PciIo->Map (
PciIo,
EfiPciIoOperationBusMasterCommonBuffer,
HostAddress,
&NumberOfBytes,
&DeviceAddress,
&Mapping
);
HostAddress = (VOID *)(UINTN)Address;
Status = PciIo->Map (
PciIo,
EfiPciIoOperationBusMasterCommonBuffer,
HostAddress,
&NumberOfBytes,
&DeviceAddress,
&Mapping
);
ASSERT_EFI_ERROR (Status);
ASSERT (DeviceAddress == ((EFI_PHYSICAL_ADDRESS) (UINTN) HostAddress));
ASSERT (DeviceAddress == ((EFI_PHYSICAL_ADDRESS)(UINTN)HostAddress));
}
/**
@ -122,8 +122,8 @@ Usb3MapOneDmaBuffer (
**/
VOID
Usb3MapDmaBuffers (
IN USB3_DEBUG_PORT_HANDLE *Instance,
IN EFI_PCI_IO_PROTOCOL *PciIo
IN USB3_DEBUG_PORT_HANDLE *Instance,
IN EFI_PCI_IO_PROTOCOL *PciIo
)
{
Usb3MapOneDmaBuffer (
@ -164,7 +164,7 @@ Usb3MapDmaBuffers (
Usb3MapOneDmaBuffer (
PciIo,
((XHC_DC_CONTEXT *) (UINTN) Instance->DebugCapabilityContext)->DbcInfoContext.String0DescAddress,
((XHC_DC_CONTEXT *)(UINTN)Instance->DebugCapabilityContext)->DbcInfoContext.String0DescAddress,
STRING0_DESC_LEN + MANU_DESC_LEN + PRODUCT_DESC_LEN + SERIAL_DESC_LEN
);
}
@ -180,11 +180,11 @@ Usb3MapDmaBuffers (
VOID
EFIAPI
Usb3DxeSmmReadyToLockNotify (
IN EFI_EVENT Event,
IN VOID *Context
IN EFI_EVENT Event,
IN VOID *Context
)
{
USB3_DEBUG_PORT_HANDLE *Instance;
USB3_DEBUG_PORT_HANDLE *Instance;
DEBUG ((DEBUG_INFO, "%a()\n", __FUNCTION__));
@ -221,15 +221,15 @@ Usb3GetIoMmu (
VOID
)
{
EFI_STATUS Status;
EDKII_IOMMU_PROTOCOL *IoMmu;
EFI_STATUS Status;
EDKII_IOMMU_PROTOCOL *IoMmu;
IoMmu = NULL;
IoMmu = NULL;
Status = gBS->LocateProtocol (
&gEdkiiIoMmuProtocolGuid,
NULL,
(VOID **) &IoMmu
);
&gEdkiiIoMmuProtocolGuid,
NULL,
(VOID **)&IoMmu
);
if (!EFI_ERROR (Status) && (IoMmu != NULL)) {
return IoMmu;
}
@ -248,22 +248,22 @@ Usb3GetIoMmu (
VOID
EFIAPI
Usb3PciIoNotify (
IN EFI_EVENT Event,
IN VOID *Context
IN EFI_EVENT Event,
IN VOID *Context
)
{
EFI_STATUS Status;
UINTN PciIoHandleCount;
EFI_HANDLE *PciIoHandleBuffer;
UINTN Index;
EFI_PCI_IO_PROTOCOL *PciIo;
UINTN PciSegment;
UINTN PciBusNumber;
UINTN PciDeviceNumber;
UINTN PciFunctionNumber;
UINT32 PciAddress;
USB3_DEBUG_PORT_HANDLE *Instance;
EFI_EVENT SmmReadyToLockEvent;
EFI_STATUS Status;
UINTN PciIoHandleCount;
EFI_HANDLE *PciIoHandleBuffer;
UINTN Index;
EFI_PCI_IO_PROTOCOL *PciIo;
UINTN PciSegment;
UINTN PciBusNumber;
UINTN PciDeviceNumber;
UINTN PciFunctionNumber;
UINT32 PciAddress;
USB3_DEBUG_PORT_HANDLE *Instance;
EFI_EVENT SmmReadyToLockEvent;
Status = gBS->LocateHandleBuffer (
ByProtocol,
@ -274,18 +274,19 @@ Usb3PciIoNotify (
);
if (!EFI_ERROR (Status) &&
(PciIoHandleBuffer != NULL) &&
(PciIoHandleCount != 0)) {
(PciIoHandleCount != 0))
{
for (Index = 0; Index < PciIoHandleCount; Index++) {
Status = gBS->HandleProtocol (
PciIoHandleBuffer[Index],
&gEfiPciIoProtocolGuid,
(VOID **) &PciIo
(VOID **)&PciIo
);
ASSERT_EFI_ERROR (Status);
Status = PciIo->GetLocation (PciIo, &PciSegment, &PciBusNumber, &PciDeviceNumber, &PciFunctionNumber);
ASSERT_EFI_ERROR (Status);
PciAddress = (UINT32) ((PciBusNumber << 20) | (PciDeviceNumber << 15) | (PciFunctionNumber << 12));
if (PciAddress == PcdGet32(PcdUsbXhciPciAddress)) {
PciAddress = (UINT32)((PciBusNumber << 20) | (PciDeviceNumber << 15) | (PciFunctionNumber << 12));
if (PciAddress == PcdGet32 (PcdUsbXhciPciAddress)) {
//
// Found the PciIo for USB3 debug port.
//
@ -309,6 +310,7 @@ Usb3PciIoNotify (
}
}
}
gBS->CloseEvent (Event);
break;
}
@ -331,9 +333,10 @@ GetUsb3DebugPortInstanceAddrPtr (
//
// Use the local variables temporarily.
//
mUsb3InstanceAddr = (EFI_PHYSICAL_ADDRESS) (UINTN) &mUsb3Instance;
mUsb3InstanceAddr = (EFI_PHYSICAL_ADDRESS)(UINTN)&mUsb3Instance;
mUsb3InstanceAddrPtr = &mUsb3InstanceAddr;
}
return mUsb3InstanceAddrPtr;
}
@ -355,29 +358,30 @@ GetUsb3DebugPortInstanceAddrPtr (
**/
EFI_STATUS
Usb3AllocateDmaBuffer (
IN EFI_PCI_IO_PROTOCOL *PciIo,
IN UINTN Pages,
OUT VOID **Address
IN EFI_PCI_IO_PROTOCOL *PciIo,
IN UINTN Pages,
OUT VOID **Address
)
{
EFI_STATUS Status;
EFI_STATUS Status;
*Address = NULL;
Status = PciIo->AllocateBuffer (
PciIo,
AllocateAnyPages,
EfiRuntimeServicesData,
Pages,
Address,
0
);
Status = PciIo->AllocateBuffer (
PciIo,
AllocateAnyPages,
EfiRuntimeServicesData,
Pages,
Address,
0
);
if (!EFI_ERROR (Status)) {
Usb3MapOneDmaBuffer (
PciIo,
(EFI_PHYSICAL_ADDRESS) (UINTN) *Address,
(EFI_PHYSICAL_ADDRESS)(UINTN)*Address,
EFI_PAGES_TO_SIZE (Pages)
);
}
return Status;
}
@ -389,14 +393,14 @@ Usb3AllocateDmaBuffer (
@return A pointer to the allocated buffer or NULL if allocation fails.
**/
VOID*
VOID *
AllocateAlignBuffer (
IN UINTN BufferSize
IN UINTN BufferSize
)
{
EFI_PHYSICAL_ADDRESS TmpAddr;
EFI_STATUS Status;
VOID *Buf;
EFI_PHYSICAL_ADDRESS TmpAddr;
EFI_STATUS Status;
VOID *Buf;
Buf = NULL;
@ -409,14 +413,14 @@ AllocateAlignBuffer (
);
} else {
TmpAddr = 0xFFFFFFFF;
Status = gBS->AllocatePages (
AllocateMaxAddress,
EfiACPIMemoryNVS,
EFI_SIZE_TO_PAGES (BufferSize),
&TmpAddr
);
Status = gBS->AllocatePages (
AllocateMaxAddress,
EfiACPIMemoryNVS,
EFI_SIZE_TO_PAGES (BufferSize),
&TmpAddr
);
if (!EFI_ERROR (Status)) {
Buf = (VOID *) (UINTN) TmpAddr;
Buf = (VOID *)(UINTN)TmpAddr;
}
}
}
@ -440,34 +444,34 @@ DebugCommunicationUsb3DxeConstructor (
IN EFI_SYSTEM_TABLE *SystemTable
)
{
EFI_PHYSICAL_ADDRESS *AddrPtr;
USB3_DEBUG_PORT_HANDLE *Instance;
EFI_PHYSICAL_ADDRESS Address;
EFI_STATUS Status;
EFI_EVENT Event;
EFI_PHYSICAL_ADDRESS *AddrPtr;
USB3_DEBUG_PORT_HANDLE *Instance;
EFI_PHYSICAL_ADDRESS Address;
EFI_STATUS Status;
EFI_EVENT Event;
Status = EfiGetSystemConfigurationTable (&gUsb3DbgGuid, (VOID **) &AddrPtr);
Status = EfiGetSystemConfigurationTable (&gUsb3DbgGuid, (VOID **)&AddrPtr);
if (EFI_ERROR (Status) || (AddrPtr == NULL)) {
//
// Instead of using local variables, install system configuration table for
// the local instance and the buffer to save instance address pointer.
//
Address = SIZE_4GB;
Status = gBS->AllocatePages (
AllocateMaxAddress,
EfiACPIMemoryNVS,
EFI_SIZE_TO_PAGES (sizeof (EFI_PHYSICAL_ADDRESS) + sizeof (USB3_DEBUG_PORT_HANDLE)),
&Address
);
Status = gBS->AllocatePages (
AllocateMaxAddress,
EfiACPIMemoryNVS,
EFI_SIZE_TO_PAGES (sizeof (EFI_PHYSICAL_ADDRESS) + sizeof (USB3_DEBUG_PORT_HANDLE)),
&Address
);
if (EFI_ERROR (Status)) {
return Status;
}
AddrPtr = (EFI_PHYSICAL_ADDRESS *) (UINTN) Address;
AddrPtr = (EFI_PHYSICAL_ADDRESS *)(UINTN)Address;
ZeroMem (AddrPtr, sizeof (EFI_PHYSICAL_ADDRESS) + sizeof (USB3_DEBUG_PORT_HANDLE));
Instance = (USB3_DEBUG_PORT_HANDLE *) (AddrPtr + 1);
Instance = (USB3_DEBUG_PORT_HANDLE *)(AddrPtr + 1);
CopyMem (Instance, &mUsb3Instance, sizeof (USB3_DEBUG_PORT_HANDLE));
*AddrPtr = (EFI_PHYSICAL_ADDRESS) (UINTN) Instance;
*AddrPtr = (EFI_PHYSICAL_ADDRESS)(UINTN)Instance;
Status = gBS->InstallConfigurationTable (&gUsb3DbgGuid, AddrPtr);
if (EFI_ERROR (Status)) {
@ -478,6 +482,7 @@ DebugCommunicationUsb3DxeConstructor (
if (mUsb3InstanceAddrPtr != NULL) {
*AddrPtr = *mUsb3InstanceAddrPtr;
}
mUsb3InstanceAddrPtr = AddrPtr;
Instance = GetUsb3DebugPortInstance ();
@ -491,7 +496,7 @@ DebugCommunicationUsb3DxeConstructor (
&Event
);
if (!EFI_ERROR (Status)) {
Instance->PciIoEvent = (EFI_PHYSICAL_ADDRESS) (UINTN) Event;
Instance->PciIoEvent = (EFI_PHYSICAL_ADDRESS)(UINTN)Event;
}
}
@ -514,7 +519,7 @@ DebugCommunicationUsb3DxeDestructor (
IN EFI_SYSTEM_TABLE *SystemTable
)
{
USB3_DEBUG_PORT_HANDLE *Instance;
USB3_DEBUG_PORT_HANDLE *Instance;
Instance = GetUsb3DebugPortInstance ();
ASSERT (Instance != NULL);
@ -523,9 +528,9 @@ DebugCommunicationUsb3DxeDestructor (
//
// Close the event created.
//
gBS->CloseEvent ((EFI_EVENT) (UINTN) Instance->PciIoEvent);
gBS->CloseEvent ((EFI_EVENT)(UINTN)Instance->PciIoEvent);
Instance->PciIoEvent = 0;
}
return EFI_SUCCESS;
}

View File

@ -36,101 +36,101 @@
//
// The state machine of usb debug port
//
#define USB3DBG_NO_DBG_CAB 0 // The XHCI host controller does not support debug capability
#define USB3DBG_DBG_CAB 1 // The XHCI host controller supports debug capability
#define USB3DBG_ENABLED 2 // The XHCI debug device is enabled
#define USB3DBG_NOT_ENABLED 4 // The XHCI debug device is not enabled
#define USB3DBG_UNINITIALIZED 255 // The XHCI debug device is uninitialized
#define USB3DBG_NO_DBG_CAB 0 // The XHCI host controller does not support debug capability
#define USB3DBG_DBG_CAB 1 // The XHCI host controller supports debug capability
#define USB3DBG_ENABLED 2 // The XHCI debug device is enabled
#define USB3DBG_NOT_ENABLED 4 // The XHCI debug device is not enabled
#define USB3DBG_UNINITIALIZED 255 // The XHCI debug device is uninitialized
#define USB3_DEBUG_PORT_WRITE_MAX_PACKET_SIZE 0x08
#define USB3_DEBUG_PORT_WRITE_MAX_PACKET_SIZE 0x08
//
// MaxPacketSize for DbC Endpoint Descriptor IN and OUT
//
#define XHCI_DEBUG_DEVICE_MAX_PACKET_SIZE 0x400
#define XHCI_DEBUG_DEVICE_MAX_PACKET_SIZE 0x400
#define XHCI_DEBUG_DEVICE_VENDOR_ID 0x0525
#define XHCI_DEBUG_DEVICE_PRODUCT_ID 0x127A
#define XHCI_DEBUG_DEVICE_PROTOCOL 0xFF
#define XHCI_DEBUG_DEVICE_REVISION 0x00
#define XHCI_BASE_ADDRESS_64_BIT_MASK 0xFFFFFFFFFFFF0000ULL
#define XHCI_BASE_ADDRESS_32_BIT_MASK 0xFFFF0000
#define XHCI_BASE_ADDRESS_64_BIT_MASK 0xFFFFFFFFFFFF0000ULL
#define XHCI_BASE_ADDRESS_32_BIT_MASK 0xFFFF0000
#define PCI_CAPABILITY_ID_DEBUG_PORT 0x0A
#define XHC_HCCPARAMS_OFFSET 0x10
#define XHC_CAPABILITY_ID_MASK 0xFF
#define XHC_NEXT_CAPABILITY_MASK 0xFF00
#define XHC_HCSPARAMS1_OFFSET 0x4 // Structural Parameters 1
#define XHC_USBCMD_OFFSET 0x0 // USB Command Register Offset
#define XHC_USBSTS_OFFSET 0x4 // USB Status Register Offset
#define XHC_PORTSC_OFFSET 0x400 // Port Status and Control Register Offset
#define XHC_HCSPARAMS1_OFFSET 0x4 // Structural Parameters 1
#define XHC_USBCMD_OFFSET 0x0 // USB Command Register Offset
#define XHC_USBSTS_OFFSET 0x4 // USB Status Register Offset
#define XHC_PORTSC_OFFSET 0x400 // Port Status and Control Register Offset
#define XHC_USBCMD_RUN BIT0 // Run/Stop
#define XHC_USBCMD_RESET BIT1 // Host Controller Reset
#define XHC_USBCMD_RUN BIT0 // Run/Stop
#define XHC_USBCMD_RESET BIT1 // Host Controller Reset
#define XHC_USBSTS_HALT BIT0
#define XHC_USBSTS_HALT BIT0
//
// Indicate the timeout when data is transferred in microsecond. 0 means infinite timeout.
//
#define DATA_TRANSFER_WRITE_TIMEOUT 0
#define DATA_TRANSFER_READ_TIMEOUT 50000
#define DATA_TRANSFER_POLL_TIMEOUT 1000
#define XHC_DEBUG_PORT_1_MILLISECOND 1000
#define DATA_TRANSFER_WRITE_TIMEOUT 0
#define DATA_TRANSFER_READ_TIMEOUT 50000
#define DATA_TRANSFER_POLL_TIMEOUT 1000
#define XHC_DEBUG_PORT_1_MILLISECOND 1000
//
// XHCI port power off/on delay
//
#define XHC_DEBUG_PORT_ON_OFF_DELAY 100000
#define XHC_DEBUG_PORT_ON_OFF_DELAY 100000
//
// USB debug device string descriptor (header size + unicode string length)
//
#define STRING0_DESC_LEN 4
#define MANU_DESC_LEN 12
#define PRODUCT_DESC_LEN 40
#define SERIAL_DESC_LEN 4
#define STRING0_DESC_LEN 4
#define MANU_DESC_LEN 12
#define PRODUCT_DESC_LEN 40
#define SERIAL_DESC_LEN 4
//
// Debug Capability Register Offset
//
#define XHC_DC_DCID 0x0
#define XHC_DC_DCDB 0x4
#define XHC_DC_DCERSTSZ 0x8
#define XHC_DC_DCERSTBA 0x10
#define XHC_DC_DCERDP 0x18
#define XHC_DC_DCCTRL 0x20
#define XHC_DC_DCST 0x24
#define XHC_DC_DCPORTSC 0x28
#define XHC_DC_DCCP 0x30
#define XHC_DC_DCDDI1 0x38
#define XHC_DC_DCDDI2 0x3C
#define XHC_DC_DCID 0x0
#define XHC_DC_DCDB 0x4
#define XHC_DC_DCERSTSZ 0x8
#define XHC_DC_DCERSTBA 0x10
#define XHC_DC_DCERDP 0x18
#define XHC_DC_DCCTRL 0x20
#define XHC_DC_DCST 0x24
#define XHC_DC_DCPORTSC 0x28
#define XHC_DC_DCCP 0x30
#define XHC_DC_DCDDI1 0x38
#define XHC_DC_DCDDI2 0x3C
#define TRB_TYPE_LINK 6
#define TRB_TYPE_LINK 6
#define ERST_NUMBER 0x01
#define TR_RING_TRB_NUMBER 0x100
#define EVENT_RING_TRB_NUMBER 0x200
#define ERST_NUMBER 0x01
#define TR_RING_TRB_NUMBER 0x100
#define EVENT_RING_TRB_NUMBER 0x200
#define ED_BULK_OUT 2
#define ED_BULK_IN 6
#define ED_BULK_OUT 2
#define ED_BULK_IN 6
#define XHC_LOW_32BIT(Addr64) ((UINT32)(((UINTN)(Addr64)) & 0xFFFFFFFF))
#define XHC_HIGH_32BIT(Addr64) ((UINT32)(RShiftU64((UINT64)(UINTN)(Addr64), 32) & 0xFFFFFFFF))
#define XHC_BIT_IS_SET(Data, Bit) ((BOOLEAN)(((Data) & (Bit)) == (Bit)))
#define XHC_LOW_32BIT(Addr64) ((UINT32)(((UINTN)(Addr64)) & 0xFFFFFFFF))
#define XHC_HIGH_32BIT(Addr64) ((UINT32)(RShiftU64((UINT64)(UINTN)(Addr64), 32) & 0xFFFFFFFF))
#define XHC_BIT_IS_SET(Data, Bit) ((BOOLEAN)(((Data) & (Bit)) == (Bit)))
//
// Endpoint Type (EP Type).
//
#define ED_NOT_VALID 0
#define ED_ISOCH_OUT 1
#define ED_BULK_OUT 2
#define ED_INTERRUPT_OUT 3
#define ED_CONTROL_BIDIR 4
#define ED_ISOCH_IN 5
#define ED_BULK_IN 6
#define ED_INTERRUPT_IN 7
#define ED_NOT_VALID 0
#define ED_ISOCH_OUT 1
#define ED_BULK_OUT 2
#define ED_INTERRUPT_OUT 3
#define ED_CONTROL_BIDIR 4
#define ED_ISOCH_IN 5
#define ED_BULK_IN 6
#define ED_INTERRUPT_IN 7
//
// 6.4.5 TRB Completion Codes
@ -147,67 +147,67 @@
//
// 6.4.6 TRB Types
//
#define TRB_TYPE_NORMAL 1
#define TRB_TYPE_SETUP_STAGE 2
#define TRB_TYPE_DATA_STAGE 3
#define TRB_TYPE_STATUS_STAGE 4
#define TRB_TYPE_ISOCH 5
#define TRB_TYPE_LINK 6
#define TRB_TYPE_EVENT_DATA 7
#define TRB_TYPE_NO_OP 8
#define TRB_TYPE_EN_SLOT 9
#define TRB_TYPE_DIS_SLOT 10
#define TRB_TYPE_ADDRESS_DEV 11
#define TRB_TYPE_CON_ENDPOINT 12
#define TRB_TYPE_EVALU_CONTXT 13
#define TRB_TYPE_RESET_ENDPOINT 14
#define TRB_TYPE_STOP_ENDPOINT 15
#define TRB_TYPE_SET_TR_DEQUE 16
#define TRB_TYPE_RESET_DEV 17
#define TRB_TYPE_GET_PORT_BANW 21
#define TRB_TYPE_FORCE_HEADER 22
#define TRB_TYPE_NO_OP_COMMAND 23
#define TRB_TYPE_TRANS_EVENT 32
#define TRB_TYPE_COMMAND_COMPLT_EVENT 33
#define TRB_TYPE_PORT_STATUS_CHANGE_EVENT 34
#define TRB_TYPE_HOST_CONTROLLER_EVENT 37
#define TRB_TYPE_DEVICE_NOTIFI_EVENT 38
#define TRB_TYPE_MFINDEX_WRAP_EVENT 39
#define TRB_TYPE_NORMAL 1
#define TRB_TYPE_SETUP_STAGE 2
#define TRB_TYPE_DATA_STAGE 3
#define TRB_TYPE_STATUS_STAGE 4
#define TRB_TYPE_ISOCH 5
#define TRB_TYPE_LINK 6
#define TRB_TYPE_EVENT_DATA 7
#define TRB_TYPE_NO_OP 8
#define TRB_TYPE_EN_SLOT 9
#define TRB_TYPE_DIS_SLOT 10
#define TRB_TYPE_ADDRESS_DEV 11
#define TRB_TYPE_CON_ENDPOINT 12
#define TRB_TYPE_EVALU_CONTXT 13
#define TRB_TYPE_RESET_ENDPOINT 14
#define TRB_TYPE_STOP_ENDPOINT 15
#define TRB_TYPE_SET_TR_DEQUE 16
#define TRB_TYPE_RESET_DEV 17
#define TRB_TYPE_GET_PORT_BANW 21
#define TRB_TYPE_FORCE_HEADER 22
#define TRB_TYPE_NO_OP_COMMAND 23
#define TRB_TYPE_TRANS_EVENT 32
#define TRB_TYPE_COMMAND_COMPLT_EVENT 33
#define TRB_TYPE_PORT_STATUS_CHANGE_EVENT 34
#define TRB_TYPE_HOST_CONTROLLER_EVENT 37
#define TRB_TYPE_DEVICE_NOTIFI_EVENT 38
#define TRB_TYPE_MFINDEX_WRAP_EVENT 39
//
// Convert millisecond to microsecond.
//
#define XHC_1_MILLISECOND (1000)
#define XHC_POLL_DELAY (1000)
#define XHC_GENERIC_TIMEOUT (10 * 1000)
#define XHC_1_MILLISECOND (1000)
#define XHC_POLL_DELAY (1000)
#define XHC_GENERIC_TIMEOUT (10 * 1000)
#define EFI_USB_SPEED_FULL 0x0000 ///< 12 Mb/s, USB 1.1 OHCI and UHCI HC.
#define EFI_USB_SPEED_LOW 0x0001 ///< 1 Mb/s, USB 1.1 OHCI and UHCI HC.
#define EFI_USB_SPEED_HIGH 0x0002 ///< 480 Mb/s, USB 2.0 EHCI HC.
#define EFI_USB_SPEED_SUPER 0x0003 ///< 4.8 Gb/s, USB 3.0 XHCI HC.
#define EFI_USB_SPEED_FULL 0x0000 ///< 12 Mb/s, USB 1.1 OHCI and UHCI HC.
#define EFI_USB_SPEED_LOW 0x0001 ///< 1 Mb/s, USB 1.1 OHCI and UHCI HC.
#define EFI_USB_SPEED_HIGH 0x0002 ///< 480 Mb/s, USB 2.0 EHCI HC.
#define EFI_USB_SPEED_SUPER 0x0003 ///< 4.8 Gb/s, USB 3.0 XHCI HC.
//
// Transfer types, used in URB to identify the transfer type
//
#define XHC_CTRL_TRANSFER 0x01
#define XHC_BULK_TRANSFER 0x02
#define XHC_INT_TRANSFER_SYNC 0x04
#define XHC_INT_TRANSFER_ASYNC 0x08
#define XHC_INT_ONLY_TRANSFER_ASYNC 0x10
#define XHC_CTRL_TRANSFER 0x01
#define XHC_BULK_TRANSFER 0x02
#define XHC_INT_TRANSFER_SYNC 0x04
#define XHC_INT_TRANSFER_ASYNC 0x08
#define XHC_INT_ONLY_TRANSFER_ASYNC 0x10
//
// USB Transfer Results
//
#define EFI_USB_NOERROR 0x00
#define EFI_USB_ERR_NOTEXECUTE 0x01
#define EFI_USB_ERR_STALL 0x02
#define EFI_USB_ERR_BUFFER 0x04
#define EFI_USB_ERR_BABBLE 0x08
#define EFI_USB_ERR_NAK 0x10
#define EFI_USB_ERR_CRC 0x20
#define EFI_USB_ERR_TIMEOUT 0x40
#define EFI_USB_ERR_BITSTUFF 0x80
#define EFI_USB_ERR_SYSTEM 0x100
#define EFI_USB_NOERROR 0x00
#define EFI_USB_ERR_NOTEXECUTE 0x01
#define EFI_USB_ERR_STALL 0x02
#define EFI_USB_ERR_BUFFER 0x04
#define EFI_USB_ERR_BABBLE 0x08
#define EFI_USB_ERR_NAK 0x10
#define EFI_USB_ERR_CRC 0x20
#define EFI_USB_ERR_TIMEOUT 0x40
#define EFI_USB_ERR_BITSTUFF 0x80
#define EFI_USB_ERR_SYSTEM 0x100
#pragma pack(1)
@ -216,42 +216,42 @@
// 7.6.9.2 When used by the DbC it is always a 64 byte data structure
//
typedef struct _ENDPOINT_CONTEXT_64 {
UINT32 EPState:3;
UINT32 RsvdZ1:5;
UINT32 Mult:2; // set to 0
UINT32 MaxPStreams:5; // set to 0
UINT32 LSA:1; // set to 0
UINT32 Interval:8; // set to 0
UINT32 RsvdZ2:8;
UINT32 EPState : 3;
UINT32 RsvdZ1 : 5;
UINT32 Mult : 2; // set to 0
UINT32 MaxPStreams : 5; // set to 0
UINT32 LSA : 1; // set to 0
UINT32 Interval : 8; // set to 0
UINT32 RsvdZ2 : 8;
UINT32 RsvdZ3:1;
UINT32 CErr:2;
UINT32 EPType:3;
UINT32 RsvdZ4:1;
UINT32 HID:1; // set to 0
UINT32 MaxBurstSize:8;
UINT32 MaxPacketSize:16;
UINT32 RsvdZ3 : 1;
UINT32 CErr : 2;
UINT32 EPType : 3;
UINT32 RsvdZ4 : 1;
UINT32 HID : 1; // set to 0
UINT32 MaxBurstSize : 8;
UINT32 MaxPacketSize : 16;
UINT32 PtrLo;
UINT32 PtrLo;
UINT32 PtrHi;
UINT32 PtrHi;
UINT32 AverageTRBLength:16;
UINT32 MaxESITPayload:16; // set to 0
UINT32 AverageTRBLength : 16;
UINT32 MaxESITPayload : 16; // set to 0
UINT32 RsvdZ5; // Reserved
UINT32 RsvdZ6;
UINT32 RsvdZ7;
UINT32 RsvdZ5; // Reserved
UINT32 RsvdZ6;
UINT32 RsvdZ7;
UINT32 RsvdZ8;
UINT32 RsvdZ9;
UINT32 RsvdZ10;
UINT32 RsvdZ11;
UINT32 RsvdZ8;
UINT32 RsvdZ9;
UINT32 RsvdZ10;
UINT32 RsvdZ11;
UINT32 RsvdZ12;
UINT32 RsvdZ13;
UINT32 RsvdZ14;
UINT32 RsvdZ15;
UINT32 RsvdZ12;
UINT32 RsvdZ13;
UINT32 RsvdZ14;
UINT32 RsvdZ15;
} ENDPOINT_CONTEXT_64;
//
@ -261,25 +261,25 @@ typedef struct _ENDPOINT_CONTEXT_64 {
// Rings, and to define the Data stage information for Control Transfer Rings.
//
typedef struct _TRANSFER_TRB_NORMAL {
UINT32 TRBPtrLo;
UINT32 TRBPtrLo;
UINT32 TRBPtrHi;
UINT32 TRBPtrHi;
UINT32 Length:17;
UINT32 TDSize:5;
UINT32 IntTarget:10;
UINT32 Length : 17;
UINT32 TDSize : 5;
UINT32 IntTarget : 10;
UINT32 CycleBit:1;
UINT32 ENT:1;
UINT32 ISP:1;
UINT32 NS:1;
UINT32 CH:1;
UINT32 IOC:1;
UINT32 IDT:1;
UINT32 RsvdZ1:2;
UINT32 BEI:1;
UINT32 Type:6;
UINT32 RsvdZ2:16;
UINT32 CycleBit : 1;
UINT32 ENT : 1;
UINT32 ISP : 1;
UINT32 NS : 1;
UINT32 CH : 1;
UINT32 IOC : 1;
UINT32 IDT : 1;
UINT32 RsvdZ1 : 2;
UINT32 BEI : 1;
UINT32 Type : 6;
UINT32 RsvdZ2 : 16;
} TRANSFER_TRB_NORMAL;
//
@ -288,21 +288,21 @@ typedef struct _TRANSFER_TRB_NORMAL {
// for more information on the use and operation of Transfer Events.
//
typedef struct _EVT_TRB_TRANSFER {
UINT32 TRBPtrLo;
UINT32 TRBPtrLo;
UINT32 TRBPtrHi;
UINT32 TRBPtrHi;
UINT32 Length:24;
UINT32 Completecode:8;
UINT32 Length : 24;
UINT32 Completecode : 8;
UINT32 CycleBit:1;
UINT32 RsvdZ1:1;
UINT32 ED:1;
UINT32 RsvdZ2:7;
UINT32 Type:6;
UINT32 EndpointId:5;
UINT32 RsvdZ3:3;
UINT32 SlotId:8;
UINT32 CycleBit : 1;
UINT32 RsvdZ1 : 1;
UINT32 ED : 1;
UINT32 RsvdZ2 : 7;
UINT32 Type : 6;
UINT32 EndpointId : 5;
UINT32 RsvdZ3 : 3;
UINT32 SlotId : 8;
} EVT_TRB_TRANSFER;
//
@ -310,104 +310,104 @@ typedef struct _EVT_TRB_TRANSFER {
// A Link TRB provides support for non-contiguous TRB Rings.
//
typedef struct _LINK_TRB {
UINT32 PtrLo;
UINT32 PtrLo;
UINT32 PtrHi;
UINT32 PtrHi;
UINT32 RsvdZ1:22;
UINT32 InterTarget:10;
UINT32 RsvdZ1 : 22;
UINT32 InterTarget : 10;
UINT32 CycleBit:1;
UINT32 TC:1;
UINT32 RsvdZ2:2;
UINT32 CH:1;
UINT32 IOC:1;
UINT32 RsvdZ3:4;
UINT32 Type:6;
UINT32 RsvdZ4:16;
UINT32 CycleBit : 1;
UINT32 TC : 1;
UINT32 RsvdZ2 : 2;
UINT32 CH : 1;
UINT32 IOC : 1;
UINT32 RsvdZ3 : 4;
UINT32 Type : 6;
UINT32 RsvdZ4 : 16;
} LINK_TRB;
//
// TRB Template: 16 bytes
//
typedef struct _TRB_TEMPLATE {
UINT32 Parameter1;
UINT32 Parameter1;
UINT32 Parameter2;
UINT32 Parameter2;
UINT32 Status;
UINT32 Status;
UINT32 CycleBit:1;
UINT32 RsvdZ1:9;
UINT32 Type:6;
UINT32 Control:16;
UINT32 CycleBit : 1;
UINT32 RsvdZ1 : 9;
UINT32 Type : 6;
UINT32 Control : 16;
} TRB_TEMPLATE;
//
// Refer to XHCI 6.5 Event Ring Segment Table: 16 bytes
//
typedef struct _EVENT_RING_SEG_TABLE_ENTRY {
UINT32 PtrLo;
UINT32 PtrHi;
UINT32 RingTrbSize:16;
UINT32 RsvdZ1:16;
UINT32 RsvdZ2;
UINT32 PtrLo;
UINT32 PtrHi;
UINT32 RingTrbSize : 16;
UINT32 RsvdZ1 : 16;
UINT32 RsvdZ2;
} EVENT_RING_SEG_TABLE_ENTRY;
//
// Size: 40 bytes
//
typedef struct _EVENT_RING {
EFI_PHYSICAL_ADDRESS ERSTBase;
EFI_PHYSICAL_ADDRESS EventRingSeg0;
UINT32 TrbNumber;
EFI_PHYSICAL_ADDRESS EventRingEnqueue;
EFI_PHYSICAL_ADDRESS EventRingDequeue;
UINT32 EventRingCCS;
EFI_PHYSICAL_ADDRESS ERSTBase;
EFI_PHYSICAL_ADDRESS EventRingSeg0;
UINT32 TrbNumber;
EFI_PHYSICAL_ADDRESS EventRingEnqueue;
EFI_PHYSICAL_ADDRESS EventRingDequeue;
UINT32 EventRingCCS;
} EVENT_RING;
// Size: 32 bytes
typedef struct _TRANSFER_RING {
EFI_PHYSICAL_ADDRESS RingSeg0;
UINT32 TrbNumber;
EFI_PHYSICAL_ADDRESS RingEnqueue;
EFI_PHYSICAL_ADDRESS RingDequeue;
UINT32 RingPCS;
EFI_PHYSICAL_ADDRESS RingSeg0;
UINT32 TrbNumber;
EFI_PHYSICAL_ADDRESS RingEnqueue;
EFI_PHYSICAL_ADDRESS RingDequeue;
UINT32 RingPCS;
} TRANSFER_RING;
//
// Size: 64 bytes
//
typedef struct _DBC_INFO_CONTEXT {
UINT64 String0DescAddress;
UINT64 ManufacturerStrDescAddress;
UINT64 ProductStrDescAddress;
UINT64 SerialNumberStrDescAddress;
UINT64 String0Length:8;
UINT64 ManufacturerStrLength:8;
UINT64 ProductStrLength:8;
UINT64 SerialNumberStrLength:8;
UINT64 RsvdZ1:32;
UINT64 RsvdZ2;
UINT64 RsvdZ3;
UINT64 RsvdZ4;
UINT64 String0DescAddress;
UINT64 ManufacturerStrDescAddress;
UINT64 ProductStrDescAddress;
UINT64 SerialNumberStrDescAddress;
UINT64 String0Length : 8;
UINT64 ManufacturerStrLength : 8;
UINT64 ProductStrLength : 8;
UINT64 SerialNumberStrLength : 8;
UINT64 RsvdZ1 : 32;
UINT64 RsvdZ2;
UINT64 RsvdZ3;
UINT64 RsvdZ4;
} DBC_INFO_CONTEXT;
//
// Debug Capability Context Data Structure: 192 bytes
//
typedef struct _XHC_DC_CONTEXT {
DBC_INFO_CONTEXT DbcInfoContext;
ENDPOINT_CONTEXT_64 EpOutContext;
ENDPOINT_CONTEXT_64 EpInContext;
DBC_INFO_CONTEXT DbcInfoContext;
ENDPOINT_CONTEXT_64 EpOutContext;
ENDPOINT_CONTEXT_64 EpInContext;
} XHC_DC_CONTEXT;
//
// Size: 16 bytes
//
typedef union _TRB {
TRB_TEMPLATE TrbTemplate;
TRANSFER_TRB_NORMAL TrbNormal;
TRB_TEMPLATE TrbTemplate;
TRANSFER_TRB_NORMAL TrbNormal;
} TRB;
///
@ -427,113 +427,113 @@ typedef struct _URB {
//
// Transfer data buffer
//
EFI_PHYSICAL_ADDRESS Data;
UINT32 DataLen;
EFI_PHYSICAL_ADDRESS Data;
UINT32 DataLen;
//
// Execute result
//
UINT32 Result;
UINT32 Result;
//
// Completed data length
//
UINT32 Completed;
UINT32 Completed;
//
// Tranfer Ring info
//
EFI_PHYSICAL_ADDRESS Ring;
EFI_PHYSICAL_ADDRESS Trb;
BOOLEAN Finished;
EFI_USB_DATA_DIRECTION Direction;
EFI_PHYSICAL_ADDRESS Ring;
EFI_PHYSICAL_ADDRESS Trb;
BOOLEAN Finished;
EFI_USB_DATA_DIRECTION Direction;
} URB;
typedef struct _USB3_DEBUG_PORT_INSTANCE {
UINT8 Initialized;
UINT8 Initialized;
//
// The flag indicates debug capability is supported
//
BOOLEAN DebugSupport;
BOOLEAN DebugSupport;
//
// The flag indicates debug device is ready
//
BOOLEAN Ready;
BOOLEAN Ready;
//
// The flag indicates the instance is from HOB
//
BOOLEAN FromHob;
BOOLEAN FromHob;
//
// Prevent notification being interrupted by debug timer
//
BOOLEAN InNotify;
BOOLEAN InNotify;
//
// PciIo protocol event
//
EFI_PHYSICAL_ADDRESS PciIoEvent;
EFI_PHYSICAL_ADDRESS PciIoEvent;
//
// The flag indicates if USB 3.0 ports has been turn off/on power
//
BOOLEAN ChangePortPower;
BOOLEAN ChangePortPower;
//
// XHCI MMIO Base address
//
EFI_PHYSICAL_ADDRESS XhciMmioBase;
EFI_PHYSICAL_ADDRESS XhciMmioBase;
//
// XHCI OP RegisterBase address
//
EFI_PHYSICAL_ADDRESS XhciOpRegister;
EFI_PHYSICAL_ADDRESS XhciOpRegister;
//
// XHCI Debug Register Base Address
//
EFI_PHYSICAL_ADDRESS DebugCapabilityBase;
EFI_PHYSICAL_ADDRESS DebugCapabilityBase;
//
// XHCI Debug Capability offset
//
UINT64 DebugCapabilityOffset;
UINT64 DebugCapabilityOffset;
//
// XHCI Debug Context Address
//
EFI_PHYSICAL_ADDRESS DebugCapabilityContext;
EFI_PHYSICAL_ADDRESS DebugCapabilityContext;
//
// Transfer Ring
//
TRANSFER_RING TransferRingOut;
TRANSFER_RING TransferRingIn;
TRANSFER_RING TransferRingOut;
TRANSFER_RING TransferRingIn;
//
// EventRing
//
EVENT_RING EventRing;
EVENT_RING EventRing;
//
// URB - Read
//
URB UrbOut;
URB UrbOut;
//
// URB - Write
//
URB UrbIn;
URB UrbIn;
//
// The available data length in the following data buffer.
//
UINT8 DataCount;
UINT8 DataCount;
//
// The data buffer address for data read and poll.
//
EFI_PHYSICAL_ADDRESS Data;
EFI_PHYSICAL_ADDRESS Data;
} USB3_DEBUG_PORT_HANDLE;
#pragma pack()
@ -549,8 +549,8 @@ typedef struct _USB3_DEBUG_PORT_INSTANCE {
**/
UINT32
XhcReadDebugReg (
IN USB3_DEBUG_PORT_HANDLE *Handle,
IN UINT32 Offset
IN USB3_DEBUG_PORT_HANDLE *Handle,
IN UINT32 Offset
);
/**
@ -578,9 +578,9 @@ XhcSetDebugRegBit (
**/
VOID
XhcWriteDebugReg (
IN USB3_DEBUG_PORT_HANDLE *Handle,
IN UINT32 Offset,
IN UINT32 Data
IN USB3_DEBUG_PORT_HANDLE *Handle,
IN UINT32 Offset,
IN UINT32 Data
);
/**
@ -594,7 +594,7 @@ XhcWriteDebugReg (
is not enabled.
**/
BOOLEAN
XhcIsBitSet(
XhcIsBitSet (
UINTN Register,
UINT32 BitMask
);
@ -606,7 +606,7 @@ XhcIsBitSet(
@param[in] BitMask 32-bit mask
**/
VOID
XhcSetR32Bit(
XhcSetR32Bit (
UINTN Register,
UINT32 BitMask
);
@ -618,9 +618,9 @@ XhcSetR32Bit(
@param[in] BitMask 32-bit mask
**/
VOID
XhcClearR32Bit(
IN OUT UINTN Register,
IN UINT32 BitMask
XhcClearR32Bit (
IN OUT UINTN Register,
IN UINT32 BitMask
);
/**
@ -654,9 +654,9 @@ GetXhciPciCommand (
@return A pointer to the allocated buffer or NULL if allocation fails.
**/
VOID*
VOID *
AllocateAlignBuffer (
IN UINTN BufferSize
IN UINTN BufferSize
);
/**
@ -694,11 +694,11 @@ USB3InitializeReal (
EFI_STATUS
EFIAPI
XhcDataTransfer (
IN USB3_DEBUG_PORT_HANDLE *Handle,
IN EFI_USB_DATA_DIRECTION Direction,
IN OUT VOID *Data,
IN OUT UINTN *DataLength,
IN UINTN Timeout
IN USB3_DEBUG_PORT_HANDLE *Handle,
IN EFI_USB_DATA_DIRECTION Direction,
IN OUT VOID *Data,
IN OUT UINTN *DataLength,
IN UINTN Timeout
);
/**
@ -713,7 +713,7 @@ XhcDataTransfer (
RETURN_STATUS
EFIAPI
InitializeUsbDebugHardware (
IN USB3_DEBUG_PORT_HANDLE *Handle
IN USB3_DEBUG_PORT_HANDLE *Handle
);
/**

View File

@ -13,7 +13,7 @@
#include <Ppi/IoMmu.h>
#include "DebugCommunicationLibUsb3Internal.h"
GUID gUsb3DbgGuid = USB3_DBG_GUID;
GUID gUsb3DbgGuid = USB3_DBG_GUID;
/**
USB3 IOMMU PPI notify.
@ -33,7 +33,7 @@ Usb3IoMmuPpiNotify (
IN VOID *Ppi
)
{
USB3_DEBUG_PORT_HANDLE *Instance;
USB3_DEBUG_PORT_HANDLE *Instance;
DEBUG ((DEBUG_INFO, "%a()\n", __FUNCTION__));
@ -60,7 +60,7 @@ Usb3IoMmuPpiNotify (
return EFI_SUCCESS;
}
EFI_PEI_NOTIFY_DESCRIPTOR mUsb3IoMmuPpiNotifyDesc = {
EFI_PEI_NOTIFY_DESCRIPTOR mUsb3IoMmuPpiNotifyDesc = {
(EFI_PEI_PPI_DESCRIPTOR_NOTIFY_CALLBACK | EFI_PEI_PPI_DESCRIPTOR_TERMINATE_LIST),
&gEdkiiIoMmuPpiGuid,
Usb3IoMmuPpiNotify
@ -94,12 +94,12 @@ IoMmuAllocateBuffer (
OUT VOID **Mapping
)
{
EFI_STATUS Status;
UINTN NumberOfBytes;
EFI_STATUS Status;
UINTN NumberOfBytes;
*HostAddress = NULL;
*HostAddress = NULL;
*DeviceAddress = 0;
*Mapping = NULL;
*Mapping = NULL;
Status = IoMmu->AllocateBuffer (
IoMmu,
@ -113,19 +113,20 @@ IoMmuAllocateBuffer (
}
NumberOfBytes = EFI_PAGES_TO_SIZE (Pages);
Status = IoMmu->Map (
IoMmu,
EdkiiIoMmuOperationBusMasterCommonBuffer,
*HostAddress,
&NumberOfBytes,
DeviceAddress,
Mapping
);
Status = IoMmu->Map (
IoMmu,
EdkiiIoMmuOperationBusMasterCommonBuffer,
*HostAddress,
&NumberOfBytes,
DeviceAddress,
Mapping
);
if (EFI_ERROR (Status)) {
IoMmu->FreeBuffer (IoMmu, Pages, *HostAddress);
*HostAddress = NULL;
return EFI_OUT_OF_RESOURCES;
}
Status = IoMmu->SetAttribute (
IoMmu,
*Mapping,
@ -134,7 +135,7 @@ IoMmuAllocateBuffer (
if (EFI_ERROR (Status)) {
IoMmu->Unmap (IoMmu, *Mapping);
IoMmu->FreeBuffer (IoMmu, Pages, *HostAddress);
*Mapping = NULL;
*Mapping = NULL;
*HostAddress = NULL;
return Status;
}
@ -153,15 +154,15 @@ Usb3GetIoMmu (
VOID
)
{
EFI_STATUS Status;
EDKII_IOMMU_PPI *IoMmu;
EFI_STATUS Status;
EDKII_IOMMU_PPI *IoMmu;
IoMmu = NULL;
IoMmu = NULL;
Status = PeiServicesLocatePpi (
&gEdkiiIoMmuPpiGuid,
0,
NULL,
(VOID **) &IoMmu
(VOID **)&IoMmu
);
if (!EFI_ERROR (Status) && (IoMmu != NULL)) {
return IoMmu;
@ -179,10 +180,10 @@ GetUsb3DebugPortInstanceAddrPtr (
VOID
)
{
USB3_DEBUG_PORT_HANDLE *Instance;
EFI_PHYSICAL_ADDRESS *AddrPtr;
EFI_PEI_HOB_POINTERS Hob;
EFI_STATUS Status;
USB3_DEBUG_PORT_HANDLE *Instance;
EFI_PHYSICAL_ADDRESS *AddrPtr;
EFI_PEI_HOB_POINTERS Hob;
EFI_STATUS Status;
Hob.Raw = GetFirstGuidHob (&gUsb3DbgGuid);
if (Hob.Raw == NULL) {
@ -196,9 +197,9 @@ GetUsb3DebugPortInstanceAddrPtr (
);
ASSERT (AddrPtr != NULL);
ZeroMem (AddrPtr, sizeof (EFI_PHYSICAL_ADDRESS) + sizeof (USB3_DEBUG_PORT_HANDLE));
Instance = (USB3_DEBUG_PORT_HANDLE *) (AddrPtr + 1);
*AddrPtr = (EFI_PHYSICAL_ADDRESS) (UINTN) Instance;
Instance->FromHob = TRUE;
Instance = (USB3_DEBUG_PORT_HANDLE *)(AddrPtr + 1);
*AddrPtr = (EFI_PHYSICAL_ADDRESS)(UINTN)Instance;
Instance->FromHob = TRUE;
Instance->Initialized = USB3DBG_UNINITIALIZED;
if (Usb3GetIoMmu () == NULL) {
Status = PeiServicesNotifyPpi (&mUsb3IoMmuPpiNotifyDesc);
@ -219,18 +220,18 @@ GetUsb3DebugPortInstanceAddrPtr (
@return A pointer to the allocated buffer or NULL if allocation fails.
**/
VOID*
VOID *
AllocateAlignBuffer (
IN UINTN BufferSize
IN UINTN BufferSize
)
{
VOID *Buf;
EFI_PHYSICAL_ADDRESS Address;
EFI_STATUS Status;
VOID *MemoryDiscoveredPpi;
EDKII_IOMMU_PPI *IoMmu;
VOID *HostAddress;
VOID *Mapping;
VOID *Buf;
EFI_PHYSICAL_ADDRESS Address;
EFI_STATUS Status;
VOID *MemoryDiscoveredPpi;
EDKII_IOMMU_PPI *IoMmu;
VOID *HostAddress;
VOID *Mapping;
Buf = NULL;
@ -241,7 +242,7 @@ AllocateAlignBuffer (
&gEfiPeiMemoryDiscoveredPpiGuid,
0,
NULL,
(VOID **) &MemoryDiscoveredPpi
(VOID **)&MemoryDiscoveredPpi
);
if (!EFI_ERROR (Status)) {
IoMmu = Usb3GetIoMmu ();
@ -254,8 +255,8 @@ AllocateAlignBuffer (
&Mapping
);
if (!EFI_ERROR (Status)) {
ASSERT (Address == ((EFI_PHYSICAL_ADDRESS) (UINTN) HostAddress));
Buf = (VOID *)(UINTN) Address;
ASSERT (Address == ((EFI_PHYSICAL_ADDRESS)(UINTN)HostAddress));
Buf = (VOID *)(UINTN)Address;
}
} else {
Status = PeiServicesAllocatePages (
@ -264,10 +265,10 @@ AllocateAlignBuffer (
&Address
);
if (!EFI_ERROR (Status)) {
Buf = (VOID *)(UINTN) Address;
Buf = (VOID *)(UINTN)Address;
}
}
}
return Buf;
}

View File

@ -19,20 +19,20 @@
EFI_STATUS
EFIAPI
XhcSyncTrsRing (
IN USB3_DEBUG_PORT_HANDLE *Handle,
IN TRANSFER_RING *TrsRing
IN USB3_DEBUG_PORT_HANDLE *Handle,
IN TRANSFER_RING *TrsRing
)
{
UINTN Index;
TRB_TEMPLATE *TrsTrb;
UINT32 CycleBit;
UINTN Index;
TRB_TEMPLATE *TrsTrb;
UINT32 CycleBit;
ASSERT (TrsRing != NULL);
//
// Calculate the latest RingEnqueue and RingPCS
//
TrsTrb = (TRB_TEMPLATE *)(UINTN) TrsRing->RingEnqueue;
TrsTrb = (TRB_TEMPLATE *)(UINTN)TrsRing->RingEnqueue;
ASSERT (TrsTrb != NULL);
@ -40,13 +40,14 @@ XhcSyncTrsRing (
if (TrsTrb->CycleBit != (TrsRing->RingPCS & BIT0)) {
break;
}
TrsTrb++;
if ((UINT8) TrsTrb->Type == TRB_TYPE_LINK) {
ASSERT (((LINK_TRB*)TrsTrb)->TC != 0);
if ((UINT8)TrsTrb->Type == TRB_TYPE_LINK) {
ASSERT (((LINK_TRB *)TrsTrb)->TC != 0);
//
// set cycle bit in Link TRB as normal
//
((LINK_TRB*)TrsTrb)->CycleBit = TrsRing->RingPCS & BIT0;
((LINK_TRB *)TrsTrb)->CycleBit = TrsRing->RingPCS & BIT0;
//
// Toggle PCS maintained by software
//
@ -54,10 +55,11 @@ XhcSyncTrsRing (
TrsTrb = (TRB_TEMPLATE *)(UINTN)((TrsTrb->Parameter1 | LShiftU64 ((UINT64)TrsTrb->Parameter2, 32)) & ~0x0F);
}
}
ASSERT (Index != TrsRing->TrbNumber);
if ((EFI_PHYSICAL_ADDRESS)(UINTN) TrsTrb != TrsRing->RingEnqueue) {
TrsRing->RingEnqueue = (EFI_PHYSICAL_ADDRESS)(UINTN) TrsTrb;
if ((EFI_PHYSICAL_ADDRESS)(UINTN)TrsTrb != TrsRing->RingEnqueue) {
TrsRing->RingEnqueue = (EFI_PHYSICAL_ADDRESS)(UINTN)TrsTrb;
}
//
@ -83,11 +85,11 @@ EFI_STATUS
EFIAPI
XhcSyncEventRing (
IN USB3_DEBUG_PORT_HANDLE *Handle,
IN EVENT_RING *EvtRing
IN EVENT_RING *EvtRing
)
{
UINTN Index;
TRB_TEMPLATE *EvtTrb1;
UINTN Index;
TRB_TEMPLATE *EvtTrb1;
ASSERT (EvtRing != NULL);
@ -95,7 +97,7 @@ XhcSyncEventRing (
// Calculate the EventRingEnqueue and EventRingCCS.
// Note: only support single Segment
//
EvtTrb1 = (TRB_TEMPLATE *)(UINTN) EvtRing->EventRingDequeue;
EvtTrb1 = (TRB_TEMPLATE *)(UINTN)EvtRing->EventRingDequeue;
for (Index = 0; Index < EvtRing->TrbNumber; Index++) {
if (EvtTrb1->CycleBit != EvtRing->EventRingCCS) {
@ -104,8 +106,8 @@ XhcSyncEventRing (
EvtTrb1++;
if ((UINTN)EvtTrb1 >= ((UINTN) EvtRing->EventRingSeg0 + sizeof (TRB_TEMPLATE) * EvtRing->TrbNumber)) {
EvtTrb1 = (TRB_TEMPLATE *)(UINTN) EvtRing->EventRingSeg0;
if ((UINTN)EvtTrb1 >= ((UINTN)EvtRing->EventRingSeg0 + sizeof (TRB_TEMPLATE) * EvtRing->TrbNumber)) {
EvtTrb1 = (TRB_TEMPLATE *)(UINTN)EvtRing->EventRingSeg0;
EvtRing->EventRingCCS = (EvtRing->EventRingCCS) ? 0 : 1;
}
}
@ -133,16 +135,16 @@ XhcSyncEventRing (
EFI_STATUS
EFIAPI
XhcCheckNewEvent (
IN USB3_DEBUG_PORT_HANDLE *Handle,
IN EVENT_RING *EvtRing,
OUT TRB_TEMPLATE **NewEvtTrb
IN USB3_DEBUG_PORT_HANDLE *Handle,
IN EVENT_RING *EvtRing,
OUT TRB_TEMPLATE **NewEvtTrb
)
{
EFI_STATUS Status;
EFI_STATUS Status;
ASSERT (EvtRing != NULL);
*NewEvtTrb = (TRB_TEMPLATE *)(UINTN) EvtRing->EventRingDequeue;
*NewEvtTrb = (TRB_TEMPLATE *)(UINTN)EvtRing->EventRingDequeue;
if (EvtRing->EventRingDequeue == EvtRing->EventRingEnqueue) {
return EFI_NOT_READY;
@ -154,7 +156,7 @@ XhcCheckNewEvent (
//
// If the dequeue pointer is beyond the ring, then roll-back it to the beginning of the ring.
//
if ((UINTN)EvtRing->EventRingDequeue >= ((UINTN) EvtRing->EventRingSeg0 + sizeof (TRB_TEMPLATE) * EvtRing->TrbNumber)) {
if ((UINTN)EvtRing->EventRingDequeue >= ((UINTN)EvtRing->EventRingSeg0 + sizeof (TRB_TEMPLATE) * EvtRing->TrbNumber)) {
EvtRing->EventRingDequeue = EvtRing->EventRingSeg0;
}
@ -173,14 +175,14 @@ XhcCheckNewEvent (
**/
BOOLEAN
IsTrbInTrsRing (
IN TRANSFER_RING *Ring,
IN TRB_TEMPLATE *Trb
IN TRANSFER_RING *Ring,
IN TRB_TEMPLATE *Trb
)
{
TRB_TEMPLATE *CheckedTrb;
UINTN Index;
CheckedTrb = (TRB_TEMPLATE *)(UINTN) Ring->RingSeg0;
CheckedTrb = (TRB_TEMPLATE *)(UINTN)Ring->RingSeg0;
ASSERT (Ring->TrbNumber == TR_RING_TRB_NUMBER);
@ -188,6 +190,7 @@ IsTrbInTrsRing (
if (Trb == CheckedTrb) {
return TRUE;
}
CheckedTrb++;
}
@ -204,18 +207,18 @@ IsTrbInTrsRing (
**/
VOID
XhcCheckUrbResult (
IN USB3_DEBUG_PORT_HANDLE *Handle,
IN URB *Urb
IN USB3_DEBUG_PORT_HANDLE *Handle,
IN URB *Urb
)
{
EVT_TRB_TRANSFER *EvtTrb;
TRB_TEMPLATE *TRBPtr;
UINTN Index;
EFI_STATUS Status;
URB *CheckedUrb;
UINT64 XhcDequeue;
UINT32 High;
UINT32 Low;
EVT_TRB_TRANSFER *EvtTrb;
TRB_TEMPLATE *TRBPtr;
UINTN Index;
EFI_STATUS Status;
URB *CheckedUrb;
UINT64 XhcDequeue;
UINT32 High;
UINT32 Low;
ASSERT ((Handle != NULL) && (Urb != NULL));
@ -231,7 +234,6 @@ XhcCheckUrbResult (
XhcSyncEventRing (Handle, &Handle->EventRing);
for (Index = 0; Index < Handle->EventRing.TrbNumber; Index++) {
Status = XhcCheckNewEvent (Handle, &Handle->EventRing, ((TRB_TEMPLATE **)&EvtTrb));
if (Status == EFI_NOT_READY) {
//
@ -244,7 +246,7 @@ XhcCheckUrbResult (
continue;
}
TRBPtr = (TRB_TEMPLATE *)(UINTN)(EvtTrb->TRBPtrLo | LShiftU64 ((UINT64) EvtTrb->TRBPtrHi, 32));
TRBPtr = (TRB_TEMPLATE *)(UINTN)(EvtTrb->TRBPtrLo | LShiftU64 ((UINT64)EvtTrb->TRBPtrHi, 32));
if (IsTrbInTrsRing ((TRANSFER_RING *)(UINTN)(Urb->Ring), TRBPtr)) {
CheckedUrb = Urb;
@ -253,7 +255,7 @@ XhcCheckUrbResult (
// If it is read event and it should be generated by poll, and current operation is write, we need save data into internal buffer.
// Internal buffer is used by next read.
//
Handle->DataCount = (UINT8) (Handle->UrbIn.DataLen - EvtTrb->Length);
Handle->DataCount = (UINT8)(Handle->UrbIn.DataLen - EvtTrb->Length);
CopyMem ((VOID *)(UINTN)Handle->Data, (VOID *)(UINTN)Handle->UrbIn.Data, Handle->DataCount);
//
// Fill this TRB complete with CycleBit, otherwise next read will fail with old TRB.
@ -265,14 +267,16 @@ XhcCheckUrbResult (
}
if ((EvtTrb->Completecode == TRB_COMPLETION_SHORT_PACKET) ||
(EvtTrb->Completecode == TRB_COMPLETION_SUCCESS)) {
(EvtTrb->Completecode == TRB_COMPLETION_SUCCESS))
{
//
// The length of data which were transferred.
//
CheckedUrb->Completed += (((TRANSFER_TRB_NORMAL*)TRBPtr)->Length - EvtTrb->Length);
CheckedUrb->Completed += (((TRANSFER_TRB_NORMAL *)TRBPtr)->Length - EvtTrb->Length);
} else {
CheckedUrb->Result |= EFI_USB_ERR_TIMEOUT;
CheckedUrb->Result |= EFI_USB_ERR_TIMEOUT;
}
//
// This Urb has been processed
//
@ -286,9 +290,9 @@ EXIT:
// Some 3rd party XHCI external cards don't support single 64-bytes width register access,
// So divide it to two 32-bytes width register access.
//
Low = XhcReadDebugReg (Handle, XHC_DC_DCERDP);
High = XhcReadDebugReg (Handle, XHC_DC_DCERDP + 4);
XhcDequeue = (UINT64)(LShiftU64((UINT64)High, 32) | Low);
Low = XhcReadDebugReg (Handle, XHC_DC_DCERDP);
High = XhcReadDebugReg (Handle, XHC_DC_DCERDP + 4);
XhcDequeue = (UINT64)(LShiftU64 ((UINT64)High, 32) | Low);
if ((XhcDequeue & (~0x0F)) != ((UINT64)(UINTN)Handle->EventRing.EventRingDequeue & (~0x0F))) {
//
@ -312,11 +316,11 @@ EXIT:
EFI_STATUS
EFIAPI
XhcRingDoorBell (
IN USB3_DEBUG_PORT_HANDLE *Handle,
IN URB *Urb
IN USB3_DEBUG_PORT_HANDLE *Handle,
IN URB *Urb
)
{
UINT32 Dcdb;
UINT32 Dcdb;
//
// 7.6.8.2 DCDB Register
@ -342,20 +346,21 @@ XhcRingDoorBell (
**/
VOID
XhcExecTransfer (
IN USB3_DEBUG_PORT_HANDLE *Handle,
IN URB *Urb,
IN UINTN Timeout
IN USB3_DEBUG_PORT_HANDLE *Handle,
IN URB *Urb,
IN UINTN Timeout
)
{
TRANSFER_RING *Ring;
TRB_TEMPLATE *Trb;
UINTN Loop;
UINTN Index;
TRANSFER_RING *Ring;
TRB_TEMPLATE *Trb;
UINTN Loop;
UINTN Index;
Loop = Timeout / XHC_DEBUG_PORT_1_MILLISECOND;
if (Timeout == 0) {
Loop = 0xFFFFFFFF;
}
XhcRingDoorBell (Handle, Urb);
//
// Event Ring Not Empty bit can only be set to 1 by XHC after ringing door bell with some delay.
@ -365,19 +370,22 @@ XhcExecTransfer (
if (Urb->Finished) {
break;
}
MicroSecondDelay (XHC_DEBUG_PORT_1_MILLISECOND);
}
if (Index == Loop) {
//
// If time out occurs.
//
Urb->Result |= EFI_USB_ERR_TIMEOUT;
}
//
// If URB transfer is error, restore transfer ring to original value before URB transfer
// This will make the current transfer TRB is always at the latest unused one in transfer ring.
//
Ring = (TRANSFER_RING *)(UINTN) Urb->Ring;
Ring = (TRANSFER_RING *)(UINTN)Urb->Ring;
if ((Urb->Result != EFI_USB_NOERROR) && (Urb->Direction == EfiUsbDataIn)) {
//
// Adjust Enqueue pointer
@ -386,7 +394,7 @@ XhcExecTransfer (
//
// Clear CCS flag for next use
//
Trb = (TRB_TEMPLATE *)(UINTN) Urb->Trb;
Trb = (TRB_TEMPLATE *)(UINTN)Urb->Trb;
Trb->CycleBit = ((~Ring->RingPCS) & BIT0);
} else {
//
@ -407,12 +415,12 @@ XhcExecTransfer (
**/
EFI_STATUS
XhcCreateTransferTrb (
IN USB3_DEBUG_PORT_HANDLE *Handle,
IN URB *Urb
IN USB3_DEBUG_PORT_HANDLE *Handle,
IN URB *Urb
)
{
TRANSFER_RING *EPRing;
TRB *Trb;
TRANSFER_RING *EPRing;
TRB *Trb;
if (Urb->Direction == EfiUsbDataIn) {
EPRing = &Handle->TransferRingIn;
@ -420,11 +428,11 @@ XhcCreateTransferTrb (
EPRing = &Handle->TransferRingOut;
}
Urb->Ring = (EFI_PHYSICAL_ADDRESS)(UINTN) EPRing;
Urb->Ring = (EFI_PHYSICAL_ADDRESS)(UINTN)EPRing;
XhcSyncTrsRing (Handle, EPRing);
Urb->Trb = EPRing->RingEnqueue;
Trb = (TRB *)(UINTN)EPRing->RingEnqueue;
Urb->Trb = EPRing->RingEnqueue;
Trb = (TRB *)(UINTN)EPRing->RingEnqueue;
Trb->TrbNormal.TRBPtrLo = XHC_LOW_32BIT (Urb->Data);
Trb->TrbNormal.TRBPtrHi = XHC_HIGH_32BIT (Urb->Data);
Trb->TrbNormal.Length = Urb->DataLen;
@ -453,17 +461,17 @@ XhcCreateTransferTrb (
@return Created URB or NULL
**/
URB*
URB *
XhcCreateUrb (
IN USB3_DEBUG_PORT_HANDLE *Handle,
IN EFI_USB_DATA_DIRECTION Direction,
IN VOID *Data,
IN UINTN DataLen
IN USB3_DEBUG_PORT_HANDLE *Handle,
IN EFI_USB_DATA_DIRECTION Direction,
IN VOID *Data,
IN UINTN DataLen
)
{
EFI_STATUS Status;
URB *Urb;
EFI_PHYSICAL_ADDRESS UrbData;
EFI_STATUS Status;
URB *Urb;
EFI_PHYSICAL_ADDRESS UrbData;
if (Direction == EfiUsbDataIn) {
Urb = &Handle->UrbIn;
@ -471,7 +479,7 @@ XhcCreateUrb (
Urb = &Handle->UrbOut;
}
UrbData = Urb->Data;
UrbData = Urb->Data;
ZeroMem (Urb, sizeof (URB));
Urb->Direction = Direction;
@ -481,20 +489,20 @@ XhcCreateUrb (
// to make XHCI DMA successfully
// re-use the pre-allocate buffer in PEI to avoid DXE memory service or gBS are not ready
//
Urb->Data = UrbData;
Urb->Data = UrbData;
if (Direction == EfiUsbDataIn) {
//
// Do not break URB data in buffer as it may contain the data which were just put in via DMA by XHC
//
Urb->DataLen = (UINT32) DataLen;
Urb->DataLen = (UINT32)DataLen;
} else {
//
// Put data into URB data out buffer which will create TRBs
//
ZeroMem ((VOID*)(UINTN) Urb->Data, DataLen);
CopyMem ((VOID*)(UINTN) Urb->Data, Data, DataLen);
Urb->DataLen = (UINT32) DataLen;
ZeroMem ((VOID *)(UINTN)Urb->Data, DataLen);
CopyMem ((VOID *)(UINTN)Urb->Data, Data, DataLen);
Urb->DataLen = (UINT32)DataLen;
}
Status = XhcCreateTransferTrb (Handle, Urb);
@ -524,15 +532,15 @@ XhcCreateUrb (
EFI_STATUS
EFIAPI
XhcDataTransfer (
IN USB3_DEBUG_PORT_HANDLE *Handle,
IN EFI_USB_DATA_DIRECTION Direction,
IN OUT VOID *Data,
IN OUT UINTN *DataLength,
IN UINTN Timeout
IN USB3_DEBUG_PORT_HANDLE *Handle,
IN EFI_USB_DATA_DIRECTION Direction,
IN OUT VOID *Data,
IN OUT UINTN *DataLength,
IN UINTN Timeout
)
{
URB *Urb;
EFI_STATUS Status;
URB *Urb;
EFI_STATUS Status;
//
// Validate the parameters
@ -557,7 +565,7 @@ XhcDataTransfer (
return EFI_DEVICE_ERROR;
}
*DataLength = Urb->Completed;
*DataLength = Urb->Completed;
Status = EFI_TIMEOUT;
if (Urb->Result == EFI_USB_NOERROR) {
@ -574,4 +582,3 @@ XhcDataTransfer (
return Status;
}

View File

@ -20,21 +20,21 @@
**/
BOOLEAN
CheckDebugAgentHandler (
IN IA32_DESCRIPTOR *IdtDescriptor,
IN UINTN InterruptType
IN IA32_DESCRIPTOR *IdtDescriptor,
IN UINTN InterruptType
)
{
IA32_IDT_GATE_DESCRIPTOR *IdtEntry;
UINTN InterruptHandler;
IA32_IDT_GATE_DESCRIPTOR *IdtEntry;
UINTN InterruptHandler;
IdtEntry = (IA32_IDT_GATE_DESCRIPTOR *) IdtDescriptor->Base;
IdtEntry = (IA32_IDT_GATE_DESCRIPTOR *)IdtDescriptor->Base;
if (IdtEntry == NULL) {
return FALSE;
}
InterruptHandler = IdtEntry[InterruptType].Bits.OffsetLow +
(IdtEntry[InterruptType].Bits.OffsetHigh << 16);
if (InterruptHandler >= sizeof (UINT32) && *(UINT32 *)(InterruptHandler - sizeof (UINT32)) == AGENT_HANDLER_SIGNATURE) {
(IdtEntry[InterruptType].Bits.OffsetHigh << 16);
if ((InterruptHandler >= sizeof (UINT32)) && (*(UINT32 *)(InterruptHandler - sizeof (UINT32)) == AGENT_HANDLER_SIGNATURE)) {
return TRUE;
} else {
return FALSE;
@ -50,23 +50,23 @@ CheckDebugAgentHandler (
**/
VOID
SaveAndUpdateIdtEntry1 (
IN IA32_DESCRIPTOR *IdtDescriptor,
OUT IA32_IDT_GATE_DESCRIPTOR *SavedIdtEntry
IN IA32_DESCRIPTOR *IdtDescriptor,
OUT IA32_IDT_GATE_DESCRIPTOR *SavedIdtEntry
)
{
IA32_IDT_GATE_DESCRIPTOR *IdtEntry;
UINT16 CodeSegment;
UINTN InterruptHandler;
IA32_IDT_GATE_DESCRIPTOR *IdtEntry;
UINT16 CodeSegment;
UINTN InterruptHandler;
IdtEntry = (IA32_IDT_GATE_DESCRIPTOR *) IdtDescriptor->Base;
IdtEntry = (IA32_IDT_GATE_DESCRIPTOR *)IdtDescriptor->Base;
CopyMem (SavedIdtEntry, &IdtEntry[1], sizeof (IA32_IDT_GATE_DESCRIPTOR));
//
//
// Use current CS as the segment selector of interrupt gate in IDT
//
CodeSegment = AsmReadCs ();
InterruptHandler = (UINTN) &AsmInterruptHandle;
InterruptHandler = (UINTN)&AsmInterruptHandle;
IdtEntry[1].Bits.OffsetLow = (UINT16)(UINTN)InterruptHandler;
IdtEntry[1].Bits.OffsetHigh = (UINT16)((UINTN)InterruptHandler >> 16);
IdtEntry[1].Bits.Selector = CodeSegment;
@ -82,12 +82,12 @@ SaveAndUpdateIdtEntry1 (
**/
VOID
RestoreIdtEntry1 (
IN IA32_DESCRIPTOR *IdtDescriptor,
IN IA32_IDT_GATE_DESCRIPTOR *RestoredIdtEntry
IN IA32_DESCRIPTOR *IdtDescriptor,
IN IA32_IDT_GATE_DESCRIPTOR *RestoredIdtEntry
)
{
IA32_IDT_GATE_DESCRIPTOR *IdtEntry;
IA32_IDT_GATE_DESCRIPTOR *IdtEntry;
IdtEntry = (IA32_IDT_GATE_DESCRIPTOR *) IdtDescriptor->Base;
IdtEntry = (IA32_IDT_GATE_DESCRIPTOR *)IdtDescriptor->Base;
CopyMem (&IdtEntry[1], RestoredIdtEntry, sizeof (IA32_IDT_GATE_DESCRIPTOR));
}

View File

@ -27,7 +27,7 @@ IsDrxEnabled (
IN UINTN Dr7
)
{
return (BOOLEAN) (((Dr7 >> (RegisterIndex * 2)) & (BIT0 | BIT1)) == (BIT0 | BIT1));
return (BOOLEAN)(((Dr7 >> (RegisterIndex * 2)) & (BIT0 | BIT1)) == (BIT0 | BIT1));
}
/**
@ -46,25 +46,25 @@ PeCoffLoaderExtraActionCommon (
IN UINTN Signature
)
{
BOOLEAN InterruptState;
UINTN Dr0;
UINTN Dr1;
UINTN Dr2;
UINTN Dr3;
UINTN Dr7;
UINTN Cr4;
UINTN NewDr7;
UINT8 LoadImageMethod;
UINT8 DebugAgentStatus;
IA32_DESCRIPTOR IdtDescriptor;
IA32_IDT_GATE_DESCRIPTOR OriginalIdtEntry;
BOOLEAN IdtEntryHooked;
UINT32 RegEdx;
BOOLEAN InterruptState;
UINTN Dr0;
UINTN Dr1;
UINTN Dr2;
UINTN Dr3;
UINTN Dr7;
UINTN Cr4;
UINTN NewDr7;
UINT8 LoadImageMethod;
UINT8 DebugAgentStatus;
IA32_DESCRIPTOR IdtDescriptor;
IA32_IDT_GATE_DESCRIPTOR OriginalIdtEntry;
BOOLEAN IdtEntryHooked;
UINT32 RegEdx;
ASSERT (ImageContext != NULL);
if (ImageContext->PdbPointer != NULL) {
DEBUG((DEBUG_ERROR, " PDB = %a\n", ImageContext->PdbPointer));
DEBUG ((DEBUG_ERROR, " PDB = %a\n", ImageContext->PdbPointer));
}
//
@ -84,6 +84,7 @@ PeCoffLoaderExtraActionCommon (
LoadImageMethod = DEBUG_LOAD_IMAGE_METHOD_SOFT_INT3;
}
}
AsmReadIdtr (&IdtDescriptor);
if (LoadImageMethod == DEBUG_LOAD_IMAGE_METHOD_SOFT_INT3) {
if (!CheckDebugAgentHandler (&IdtDescriptor, SOFT_INT_VECTOR_NUM)) {
@ -122,8 +123,8 @@ PeCoffLoaderExtraActionCommon (
//
AsmWriteDr7 (BIT10);
AsmWriteDr0 (Signature);
AsmWriteDr1 ((UINTN) ImageContext->PdbPointer);
AsmWriteDr2 ((UINTN) ImageContext);
AsmWriteDr1 ((UINTN)ImageContext->PdbPointer);
AsmWriteDr2 ((UINTN)ImageContext);
AsmWriteDr3 (IO_PORT_BREAKPOINT_ADDRESS);
if (LoadImageMethod == DEBUG_LOAD_IMAGE_METHOD_IO_HW_BREAKPOINT) {
@ -136,7 +137,6 @@ PeCoffLoaderExtraActionCommon (
do {
DebugAgentStatus = IoRead8 (IO_PORT_BREAKPOINT_ADDRESS);
} while (DebugAgentStatus == DEBUG_AGENT_IMAGE_WAIT);
} else if (LoadImageMethod == DEBUG_LOAD_IMAGE_METHOD_SOFT_INT3) {
//
// Generate a software break point.
@ -150,26 +150,31 @@ PeCoffLoaderExtraActionCommon (
// in the above exception handler
//
NewDr7 = AsmReadDr7 () | BIT10; // H/w sets bit 10, some simulators don't
if (!IsDrxEnabled (0, NewDr7) && (AsmReadDr0 () == 0 || AsmReadDr0 () == Signature)) {
if (!IsDrxEnabled (0, NewDr7) && ((AsmReadDr0 () == 0) || (AsmReadDr0 () == Signature))) {
//
// If user changed Dr3 (by setting HW bp in the above exception handler,
// we will not set Dr0 to 0 in GO/STEP handler because the break cause is not IMAGE_LOAD/_UNLOAD.
//
AsmWriteDr0 (Dr0);
}
if (!IsDrxEnabled (1, NewDr7) && (AsmReadDr1 () == (UINTN) ImageContext->PdbPointer)) {
if (!IsDrxEnabled (1, NewDr7) && (AsmReadDr1 () == (UINTN)ImageContext->PdbPointer)) {
AsmWriteDr1 (Dr1);
}
if (!IsDrxEnabled (2, NewDr7) && (AsmReadDr2 () == (UINTN) ImageContext)) {
if (!IsDrxEnabled (2, NewDr7) && (AsmReadDr2 () == (UINTN)ImageContext)) {
AsmWriteDr2 (Dr2);
}
if (!IsDrxEnabled (3, NewDr7) && (AsmReadDr3 () == IO_PORT_BREAKPOINT_ADDRESS)) {
AsmWriteDr3 (Dr3);
}
if (LoadImageMethod == DEBUG_LOAD_IMAGE_METHOD_IO_HW_BREAKPOINT) {
if (AsmReadCr4 () == (Cr4 | BIT3)) {
AsmWriteCr4 (Cr4);
}
if (NewDr7 == 0x20000480) {
AsmWriteDr7 (Dr7);
}
@ -178,12 +183,14 @@ PeCoffLoaderExtraActionCommon (
AsmWriteDr7 (Dr7);
}
}
//
// Restore original IDT entry for INT1 if it was hooked.
//
if (IdtEntryHooked) {
RestoreIdtEntry1 (&IdtDescriptor, &OriginalIdtEntry);
}
//
// Restore the interrupt state
//

View File

@ -19,11 +19,11 @@
#include <ImageDebugSupport.h>
#define DEBUG_LOAD_IMAGE_METHOD_IO_HW_BREAKPOINT 1
#define DEBUG_LOAD_IMAGE_METHOD_SOFT_INT3 2
#define DEBUG_LOAD_IMAGE_METHOD_IO_HW_BREAKPOINT 1
#define DEBUG_LOAD_IMAGE_METHOD_SOFT_INT3 2
#define IO_HW_BREAKPOINT_VECTOR_NUM 1
#define SOFT_INT_VECTOR_NUM 3
#define IO_HW_BREAKPOINT_VECTOR_NUM 1
#define SOFT_INT_VECTOR_NUM 3
extern UINTN AsmInterruptHandle;
@ -39,8 +39,8 @@ extern UINTN AsmInterruptHandle;
**/
BOOLEAN
CheckDebugAgentHandler (
IN IA32_DESCRIPTOR *IdtDescriptor,
IN UINTN InterruptType
IN IA32_DESCRIPTOR *IdtDescriptor,
IN UINTN InterruptType
);
/**
@ -52,8 +52,8 @@ CheckDebugAgentHandler (
**/
VOID
SaveAndUpdateIdtEntry1 (
IN IA32_DESCRIPTOR *IdtDescriptor,
OUT IA32_IDT_GATE_DESCRIPTOR *SavedIdtEntry
IN IA32_DESCRIPTOR *IdtDescriptor,
OUT IA32_IDT_GATE_DESCRIPTOR *SavedIdtEntry
);
/**
@ -65,9 +65,8 @@ SaveAndUpdateIdtEntry1 (
**/
VOID
RestoreIdtEntry1 (
IN IA32_DESCRIPTOR *IdtDescriptor,
IN IA32_IDT_GATE_DESCRIPTOR *RestoredIdtEntry
IN IA32_DESCRIPTOR *IdtDescriptor,
IN IA32_IDT_GATE_DESCRIPTOR *RestoredIdtEntry
);
#endif

View File

@ -20,22 +20,22 @@
**/
BOOLEAN
CheckDebugAgentHandler (
IN IA32_DESCRIPTOR *IdtDescriptor,
IN UINTN InterruptType
IN IA32_DESCRIPTOR *IdtDescriptor,
IN UINTN InterruptType
)
{
IA32_IDT_GATE_DESCRIPTOR *IdtEntry;
UINTN InterruptHandler;
IA32_IDT_GATE_DESCRIPTOR *IdtEntry;
UINTN InterruptHandler;
IdtEntry = (IA32_IDT_GATE_DESCRIPTOR *) IdtDescriptor->Base;
IdtEntry = (IA32_IDT_GATE_DESCRIPTOR *)IdtDescriptor->Base;
if (IdtEntry == NULL) {
return FALSE;
}
InterruptHandler = IdtEntry[InterruptType].Bits.OffsetLow +
(((UINTN)IdtEntry[InterruptType].Bits.OffsetHigh) << 16) +
(((UINTN)IdtEntry[InterruptType].Bits.OffsetUpper) << 32);
if (InterruptHandler >= sizeof (UINT32) && *(UINT32 *)(InterruptHandler - sizeof (UINT32)) == AGENT_HANDLER_SIGNATURE) {
(((UINTN)IdtEntry[InterruptType].Bits.OffsetHigh) << 16) +
(((UINTN)IdtEntry[InterruptType].Bits.OffsetUpper) << 32);
if ((InterruptHandler >= sizeof (UINT32)) && (*(UINT32 *)(InterruptHandler - sizeof (UINT32)) == AGENT_HANDLER_SIGNATURE)) {
return TRUE;
} else {
return FALSE;
@ -51,28 +51,28 @@ CheckDebugAgentHandler (
**/
VOID
SaveAndUpdateIdtEntry1 (
IN IA32_DESCRIPTOR *IdtDescriptor,
OUT IA32_IDT_GATE_DESCRIPTOR *SavedIdtEntry
IN IA32_DESCRIPTOR *IdtDescriptor,
OUT IA32_IDT_GATE_DESCRIPTOR *SavedIdtEntry
)
{
IA32_IDT_GATE_DESCRIPTOR *IdtEntry;
UINT16 CodeSegment;
UINTN InterruptHandler;
IA32_IDT_GATE_DESCRIPTOR *IdtEntry;
UINT16 CodeSegment;
UINTN InterruptHandler;
IdtEntry = (IA32_IDT_GATE_DESCRIPTOR *) IdtDescriptor->Base;
IdtEntry = (IA32_IDT_GATE_DESCRIPTOR *)IdtDescriptor->Base;
CopyMem (SavedIdtEntry, &IdtEntry[1], sizeof (IA32_IDT_GATE_DESCRIPTOR));
//
//
// Use current CS as the segment selector of interrupt gate in IDT
//
CodeSegment = AsmReadCs ();
InterruptHandler = (UINTN) &AsmInterruptHandle;
IdtEntry[1].Bits.OffsetLow = (UINT16)(UINTN)InterruptHandler;
IdtEntry[1].Bits.OffsetHigh = (UINT16)((UINTN)InterruptHandler >> 16);
IdtEntry[1].Bits.OffsetUpper = (UINT32)((UINTN)InterruptHandler >> 32);
IdtEntry[1].Bits.Selector = CodeSegment;
IdtEntry[1].Bits.GateType = IA32_IDT_GATE_TYPE_INTERRUPT_32;
InterruptHandler = (UINTN)&AsmInterruptHandle;
IdtEntry[1].Bits.OffsetLow = (UINT16)(UINTN)InterruptHandler;
IdtEntry[1].Bits.OffsetHigh = (UINT16)((UINTN)InterruptHandler >> 16);
IdtEntry[1].Bits.OffsetUpper = (UINT32)((UINTN)InterruptHandler >> 32);
IdtEntry[1].Bits.Selector = CodeSegment;
IdtEntry[1].Bits.GateType = IA32_IDT_GATE_TYPE_INTERRUPT_32;
}
/**
@ -84,12 +84,12 @@ SaveAndUpdateIdtEntry1 (
**/
VOID
RestoreIdtEntry1 (
IN IA32_DESCRIPTOR *IdtDescriptor,
IN IA32_IDT_GATE_DESCRIPTOR *RestoredIdtEntry
IN IA32_DESCRIPTOR *IdtDescriptor,
IN IA32_IDT_GATE_DESCRIPTOR *RestoredIdtEntry
)
{
IA32_IDT_GATE_DESCRIPTOR *IdtEntry;
IA32_IDT_GATE_DESCRIPTOR *IdtEntry;
IdtEntry = (IA32_IDT_GATE_DESCRIPTOR *) IdtDescriptor->Base;
IdtEntry = (IA32_IDT_GATE_DESCRIPTOR *)IdtDescriptor->Base;
CopyMem (&IdtEntry[1], RestoredIdtEntry, sizeof (IA32_IDT_GATE_DESCRIPTOR));
}