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https://github.com/acidanthera/audk.git
synced 2025-04-08 17:05:09 +02:00
Ring3: Added necessary Core pages to User page table.
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285c6b0de9
commit
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@ -297,8 +297,7 @@ GetUefiImageRecord (
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for (ImageRecordLink = mProtectedImageRecordList.ForwardLink;
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ImageRecordLink != &mProtectedImageRecordList;
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ImageRecordLink = ImageRecordLink->ForwardLink)
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{
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ImageRecordLink = ImageRecordLink->ForwardLink) {
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ImageRecord = CR (
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ImageRecordLink,
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UEFI_IMAGE_RECORD,
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@ -18,9 +18,13 @@ RING3_DATA *gRing3Data;
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VOID *gRing3Interfaces;
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UINTN gUartBaseAddress;
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UEFI_IMAGE_RECORD *mDxeRing3;
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VOID *mUserPageTableTemplate;
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UINTN mUserPageTableTemplateSize;
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UEFI_IMAGE_RECORD *mDxeRing3;
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VOID *mUserPageTableTemplate;
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UINTN mUserPageTableTemplateSize;
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EXCEPTION_ADDRESSES *mExceptionAddresses;
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extern UINTN SysCallBase;
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extern UINTN SysCallEnd;
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VOID
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EFIAPI
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@ -193,6 +197,8 @@ InitializeRing3 (
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MakeUserPageTableTemplate (&mUserPageTableTemplate, &mUserPageTableTemplateSize);
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mExceptionAddresses = GetExceptionAddresses ();
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return Status;
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}
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@ -255,32 +261,59 @@ InitializeUserPageTable (
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}
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//
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// Map CoreBootServices
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// Map CoreBootServices, gCoreSysCallStackBase, ExceptionHandlers, ExceptionStacks
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//
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gCpu->SetUserMemoryAttributes (
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gCpu,
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UserPageTable,
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(EFI_PHYSICAL_ADDRESS)(UINTN)CoreBootServices,
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SIZE_4KB,
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(UINTN)&SysCallBase,
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(UINTN)&SysCallEnd - (UINTN)&SysCallBase,
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EFI_MEMORY_RO
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);
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gCpu->SetUserMemoryAttributes (
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gCpu,
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UserPageTable,
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(EFI_PHYSICAL_ADDRESS)(UINTN)&gCorePageTable,
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(UINTN)&gCorePageTable,
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SIZE_4KB,
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EFI_MEMORY_RO | EFI_MEMORY_XP
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);
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//
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// Map ExceptionHandlerAsm: AsmIdtVectorBegin - AsmGetTemplateAddressMap
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// mCorePageTable, gCoreSysCallStackTop
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//
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// gCpu->SetUserMemoryAttributes (gCpu, (UINTN)PageMap, BaseAddress, SIZE_4KB, EFI_MEMORY_RO);
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//
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// gCpu->SetUserMemoryAttributes (gCpu, gUserPageTable, (UINTN)gCoreSysCallStackBase, SizeOfStack, EFI_MEMORY_XP);
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//
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gCpu->SetUserMemoryAttributes (
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gCpu,
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UserPageTable,
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(UINTN)gCoreSysCallStackBase,
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EFI_SIZE_TO_PAGES (USER_STACK_SIZE) * EFI_PAGE_SIZE,
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EFI_MEMORY_XP
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);
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gCpu->SetUserMemoryAttributes (
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gCpu,
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UserPageTable,
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mExceptionAddresses->ExceptionStackBase,
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mExceptionAddresses->ExceptionStackSize,
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EFI_MEMORY_XP
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);
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gCpu->SetUserMemoryAttributes (
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gCpu,
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UserPageTable,
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mExceptionAddresses->ExceptionHandlerBase,
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mExceptionAddresses->ExceptionHandlerSize,
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EFI_MEMORY_RO
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);
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gCpu->SetUserMemoryAttributes (
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gCpu,
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UserPageTable,
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mExceptionAddresses->ExceptionDataBase,
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SIZE_4KB,
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EFI_MEMORY_XP
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);
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//
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// Necessary fix for ProcessLibraryConstructorList() -> DxeCcProbeLibConstructor()
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//
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gCpu->SetUserMemoryAttributes (
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gCpu,
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UserPageTable,
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@ -62,18 +62,7 @@ GoToRing3 (
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VA_END (Marker);
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ForbidSupervisorAccessToUserMemory ();
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#if defined (MDE_CPU_X64) || defined (MDE_CPU_IA32)
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if (Number == 2) {
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//
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// Necessary fix for ProcessLibraryConstructorList() -> DxeCcProbeLibConstructor()
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//
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SetUefiImageMemoryAttributes (
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FixedPcdGet32 (PcdOvmfWorkAreaBase),
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FixedPcdGet32 (PcdOvmfWorkAreaSize),
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EFI_MEMORY_XP | EFI_MEMORY_USER
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);
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}
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#elif defined (MDE_CPU_AARCH64) || defined (MDE_CPU_ARM)
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#if defined (MDE_CPU_AARCH64) || defined (MDE_CPU_ARM)
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//
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// Necessary fix for DEBUG printings.
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//
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@ -85,15 +74,7 @@ GoToRing3 (
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#endif
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Status = CallRing3 (Input);
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#if defined (MDE_CPU_X64) || defined (MDE_CPU_IA32)
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if (Number == 2) {
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SetUefiImageMemoryAttributes (
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FixedPcdGet32 (PcdOvmfWorkAreaBase),
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FixedPcdGet32 (PcdOvmfWorkAreaSize),
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EFI_MEMORY_XP
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);
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}
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#elif defined (MDE_CPU_AARCH64) || defined (MDE_CPU_ARM)
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#if defined (MDE_CPU_AARCH64) || defined (MDE_CPU_ARM)
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AllowSupervisorAccessToUserMemory ();
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SetUefiImageMemoryAttributes (
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gUartBaseAddress,
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@ -106,6 +106,10 @@ copy:
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mov gs, ax
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%endmacro
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ALIGN 4096
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global ASM_PFX(SysCallBase)
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ASM_PFX(SysCallBase):
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;------------------------------------------------------------------------------
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; EFI_STATUS
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; EFIAPI
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@ -123,8 +127,6 @@ copy:
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;
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; (On User Stack) Argument 4, 5, ...
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;------------------------------------------------------------------------------
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ALIGN 4096
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global ASM_PFX(CoreBootServices)
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ASM_PFX(CoreBootServices):
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mov rax, [ASM_PFX(gCorePageTable)]
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@ -233,6 +235,10 @@ ASM_PFX(CallRing3):
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; Pass control to user image
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o64 sysret
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ALIGN 4096
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global ASM_PFX(SysCallEnd)
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ASM_PFX(SysCallEnd):
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;------------------------------------------------------------------------------
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; VOID
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; EFIAPI
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@ -267,5 +273,6 @@ global ASM_PFX(gUserPageTable)
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ASM_PFX(gUserPageTable):
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resq 1
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ALIGN 4096
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ASM_PFX(CoreRsp):
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resq 1
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@ -13,6 +13,14 @@
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#include <Ppi/VectorHandoffInfo.h>
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#include <Protocol/Cpu.h>
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typedef struct {
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UINTN ExceptionStackBase;
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UINTN ExceptionStackSize;
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UINTN ExceptionHandlerBase;
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UINTN ExceptionHandlerSize;
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UINTN ExceptionDataBase;
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} EXCEPTION_ADDRESSES;
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/**
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Initializes all CPU exceptions entries and provides the default exception handlers.
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@ -99,4 +107,10 @@ DumpCpuContext (
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IN EFI_SYSTEM_CONTEXT SystemContext
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);
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EXCEPTION_ADDRESSES *
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EFIAPI
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GetExceptionAddresses (
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VOID
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);
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#endif
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@ -30,6 +30,13 @@ UINT8 mBuffer[CPU_STACK_SWITCH_EXCEPTION_NUMBER * CPU_KNOWN_GOOD_STACK_SIZE
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STATIC CONST EFI_DEBUG_IMAGE_INFO_TABLE_HEADER *mDebugImageInfoTable = NULL;
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EXCEPTION_ADDRESSES mAddresses;
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extern UINTN ExceptionHandlerBase;
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extern UINTN ExceptionHandlerEnd;
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extern UINT8 mSwitchCr3Flag;
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extern UINTN CorePageTable;
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/**
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Common exception handler.
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@ -129,13 +136,17 @@ InitializeSeparateExceptionStacks (
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UINTN LocalBufferSize;
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EFI_STATUS Status;
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mAddresses.ExceptionStackSize = CPU_STACK_SWITCH_EXCEPTION_NUMBER * CPU_KNOWN_GOOD_STACK_SIZE;
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if ((Buffer == NULL) && (BufferSize == NULL)) {
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SetMem (mBuffer, sizeof (mBuffer), 0);
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LocalBufferSize = sizeof (mBuffer);
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Status = ArchSetupExceptionStack (mBuffer, &LocalBufferSize);
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ASSERT_EFI_ERROR (Status);
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mAddresses.ExceptionStackBase = (UINTN)mBuffer;
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return Status;
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} else {
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mAddresses.ExceptionStackBase = (UINTN)Buffer;
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return ArchSetupExceptionStack (Buffer, BufferSize);
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}
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}
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@ -189,3 +200,20 @@ GetImageInfoByIp (
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return FALSE;
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}
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EXCEPTION_ADDRESSES *
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EFIAPI
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GetExceptionAddresses (
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VOID
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)
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{
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mSwitchCr3Flag = 1;
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mAddresses.ExceptionHandlerBase = (UINTN)&ExceptionHandlerBase;
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mAddresses.ExceptionHandlerSize = (UINTN)&ExceptionHandlerEnd - mAddresses.ExceptionHandlerBase;
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mAddresses.ExceptionDataBase = (UINTN)&CorePageTable;
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CorePageTable = AsmReadCr3 ();
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return &mAddresses;
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}
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@ -53,11 +53,27 @@ extern ASM_PFX(mDoFarReturnFlag) ; Do far return flag
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extern ASM_PFX(CommonExceptionHandler)
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SECTION .data
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ALIGN 4096
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global ASM_PFX(CorePageTable)
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ASM_PFX(CorePageTable):
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resq 1
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global ASM_PFX(UserPageTable)
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ASM_PFX(UserPageTable):
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resq 1
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ALIGN 4096
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global ASM_PFX(mSwitchCr3Flag)
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ASM_PFX(mSwitchCr3Flag):
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db 0x0
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DEFAULT REL
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SECTION .text
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ALIGN 8
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ALIGN 4096
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global ASM_PFX(ExceptionHandlerBase)
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ASM_PFX(ExceptionHandlerBase):
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; Generate NUM_VECTORS IDT vectors.
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AsmIdtVectorBegin:
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@ -121,6 +137,14 @@ HookAfterStubHeaderEnd:
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global ASM_PFX(CommonInterruptEntry)
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ASM_PFX(CommonInterruptEntry):
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cli
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cmp byte [ASM_PFX(mSwitchCr3Flag)], 0
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jz NoCr3Switch
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mov rax, cr3
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mov [ASM_PFX(UserPageTable)], rax
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mov rax, [ASM_PFX(CorePageTable)]
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mov cr3, rax
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NoCr3Switch:
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pop rax
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;
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; All interrupt handlers are invoked through interrupt gates, so
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@ -436,8 +460,8 @@ CetDone:
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push rcx
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mov rcx, ds
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and rcx, 3
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pop rcx
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jnz ReturnToRing3
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pop rcx
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mov rsp, rbp
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pop rbp
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@ -466,11 +490,18 @@ DoReturn:
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DoIret:
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iretq
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ReturnToRing3:
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mov rcx, [ASM_PFX(UserPageTable)]
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mov cr3, rcx
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pop rcx
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mov rsp, rbp
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pop rbp
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add rsp, 16
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iretq
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ALIGN 4096
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global ASM_PFX(ExceptionHandlerEnd)
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ASM_PFX(ExceptionHandlerEnd):
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;-------------------------------------------------------------------------------------
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; GetTemplateAddressMap (&AddressMap);
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;-------------------------------------------------------------------------------------
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