Need to add some extra functions to the libraries to support paging in the CpuDxe driver (still working on that). Also looks like some of the .INF file hade the token used to search replace the copyright headers and not the headers so I updated that.

git-svn-id: https://edk2.svn.sourceforge.net/svnroot/edk2/trunk/edk2@9716 6f19259b-4bc3-4df7-8a09-765794883524
This commit is contained in:
AJFISH 2010-01-12 18:47:28 +00:00
parent 06dc4de11b
commit c2b5ca8b56
21 changed files with 200 additions and 14 deletions

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@ -1,4 +1,18 @@
#%HEADER% #/** @file
# Semihosting serail port lib
#
# Copyright (c) 2008, Apple Inc.
#
# All rights reserved. This program and the accompanying materials
# are licensed and made available under the terms and conditions of the BSD License
# which accompanies this distribution. The full text of the license may be found at
# http://opensource.org/licenses/bsd-license.php
# THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
# WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
#
#
#**/
[Defines] [Defines]
INF_VERSION = 0x00010005 INF_VERSION = 0x00010005
BASE_NAME = ArmCacheMaintenanceLib BASE_NAME = ArmCacheMaintenanceLib

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@ -1,4 +1,18 @@
#%HEADER% #/** @file
# Semihosting serail port lib
#
# Copyright (c) 2008 - 2010, Apple Inc.
#
# All rights reserved. This program and the accompanying materials
# are licensed and made available under the terms and conditions of the BSD License
# which accompanies this distribution. The full text of the license may be found at
# http://opensource.org/licenses/bsd-license.php
# THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
# WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
#
#
#**/
[Defines] [Defines]
INF_VERSION = 0x00010005 INF_VERSION = 0x00010005
BASE_NAME = Arm11ArmLib BASE_NAME = Arm11ArmLib

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@ -1,4 +1,18 @@
#%HEADER% #/** @file
# Semihosting serail port lib
#
# Copyright (c) 2008 - 2010, Apple Inc.
#
# All rights reserved. This program and the accompanying materials
# are licensed and made available under the terms and conditions of the BSD License
# which accompanies this distribution. The full text of the license may be found at
# http://opensource.org/licenses/bsd-license.php
# THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
# WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
#
#
#**/
[Defines] [Defines]
INF_VERSION = 0x00010005 INF_VERSION = 0x00010005
BASE_NAME = Arm11ArmLib BASE_NAME = Arm11ArmLib

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@ -23,6 +23,7 @@
.globl ASM_PFX(ArmCleanInvalidateDataCacheEntryByMVA) .globl ASM_PFX(ArmCleanInvalidateDataCacheEntryByMVA)
.globl ASM_PFX(ArmEnableMmu) .globl ASM_PFX(ArmEnableMmu)
.globl ASM_PFX(ArmDisableMmu) .globl ASM_PFX(ArmDisableMmu)
.globl ASM_PFX(ArmMmuEnabled)
.globl ASM_PFX(ArmEnableDataCache) .globl ASM_PFX(ArmEnableDataCache)
.globl ASM_PFX(ArmDisableDataCache) .globl ASM_PFX(ArmDisableDataCache)
.globl ASM_PFX(ArmEnableInstructionCache) .globl ASM_PFX(ArmEnableInstructionCache)
@ -76,6 +77,11 @@ ASM_PFX(ArmEnableMmu):
mcr p15,0,R0,c1,c0,0 mcr p15,0,R0,c1,c0,0
bx LR bx LR
ASM_PFX(ArmMmuEnabled):
mrc p15,0,R0,c1,c0,0
and R0,R0,#1
bx LR
ASM_PFX(ArmDisableMmu): ASM_PFX(ArmDisableMmu):
mrc p15,0,R0,c1,c0,0 mrc p15,0,R0,c1,c0,0
bic R0,R0,#1 bic R0,R0,#1

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@ -21,6 +21,7 @@
EXPORT ArmCleanInvalidateDataCacheEntryByMVA EXPORT ArmCleanInvalidateDataCacheEntryByMVA
EXPORT ArmEnableMmu EXPORT ArmEnableMmu
EXPORT ArmDisableMmu EXPORT ArmDisableMmu
EXPORT ArmMmuEnabled
EXPORT ArmEnableDataCache EXPORT ArmEnableDataCache
EXPORT ArmDisableDataCache EXPORT ArmDisableDataCache
EXPORT ArmEnableInstructionCache EXPORT ArmEnableInstructionCache
@ -80,6 +81,11 @@ ArmEnableMmu
mcr p15,0,R0,c1,c0,0 mcr p15,0,R0,c1,c0,0
bx LR bx LR
ArmMmuEnabled
mrc p15,0,R0,c1,c0,0
and R0,R0,#1
bx LR
ArmDisableMmu ArmDisableMmu
mrc p15,0,R0,c1,c0,0 mrc p15,0,R0,c1,c0,0
bic R0,R0,#1 bic R0,R0,#1

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@ -1,4 +1,18 @@
#%HEADER% #/** @file
# Semihosting serail port lib
#
# Copyright (c) 2008 - 2010, Apple Inc.
#
# All rights reserved. This program and the accompanying materials
# are licensed and made available under the terms and conditions of the BSD License
# which accompanies this distribution. The full text of the license may be found at
# http://opensource.org/licenses/bsd-license.php
# THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
# WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
#
#
#**/
[Defines] [Defines]
INF_VERSION = 0x00010005 INF_VERSION = 0x00010005
BASE_NAME = Arm9ArmLib BASE_NAME = Arm9ArmLib

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@ -1,4 +1,18 @@
#%HEADER% #/** @file
# Semihosting serail port lib
#
# Copyright (c) 2008 - 2010, Apple Inc.
#
# All rights reserved. This program and the accompanying materials
# are licensed and made available under the terms and conditions of the BSD License
# which accompanies this distribution. The full text of the license may be found at
# http://opensource.org/licenses/bsd-license.php
# THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
# WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
#
#
#**/
[Defines] [Defines]
INF_VERSION = 0x00010005 INF_VERSION = 0x00010005
BASE_NAME = Arm9ArmLibPrePi BASE_NAME = Arm9ArmLibPrePi

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@ -23,6 +23,7 @@
.globl ASM_PFX(ArmCleanInvalidateDataCacheEntryByMVA) .globl ASM_PFX(ArmCleanInvalidateDataCacheEntryByMVA)
.globl ASM_PFX(ArmEnableMmu) .globl ASM_PFX(ArmEnableMmu)
.globl ASM_PFX(ArmDisableMmu) .globl ASM_PFX(ArmDisableMmu)
.globl ASM_PFX(ArmMmuEnabled)
.globl ASM_PFX(ArmEnableDataCache) .globl ASM_PFX(ArmEnableDataCache)
.globl ASM_PFX(ArmDisableDataCache) .globl ASM_PFX(ArmDisableDataCache)
.globl ASM_PFX(ArmEnableInstructionCache) .globl ASM_PFX(ArmEnableInstructionCache)
@ -75,6 +76,11 @@ ASM_PFX(ArmEnableMmu):
mcr p15,0,R0,c1,c0,0 mcr p15,0,R0,c1,c0,0
bx LR bx LR
ASM_PFX(ArmMmuEnabled):
mrc p15,0,R0,c1,c0,0
and R0,R0,#1
bx LR
ASM_PFX(ArmDisableMmu): ASM_PFX(ArmDisableMmu):
mrc p15,0,R0,c1,c0,0 mrc p15,0,R0,c1,c0,0
bic R0,R0,#1 bic R0,R0,#1

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@ -21,6 +21,7 @@
EXPORT ArmCleanInvalidateDataCacheEntryByMVA EXPORT ArmCleanInvalidateDataCacheEntryByMVA
EXPORT ArmEnableMmu EXPORT ArmEnableMmu
EXPORT ArmDisableMmu EXPORT ArmDisableMmu
EXPORT ArmMmuEnabled
EXPORT ArmEnableDataCache EXPORT ArmEnableDataCache
EXPORT ArmDisableDataCache EXPORT ArmDisableDataCache
EXPORT ArmEnableInstructionCache EXPORT ArmEnableInstructionCache
@ -77,6 +78,11 @@ ArmEnableMmu
mcr p15,0,R0,c1,c0,0 mcr p15,0,R0,c1,c0,0
bx LR bx LR
ArmMmuEnabled
mrc p15,0,R0,c1,c0,0
and R0,R0,#1
bx LR
ArmDisableMmu ArmDisableMmu
mrc p15,0,R0,c1,c0,0 mrc p15,0,R0,c1,c0,0
bic R0,R0,#1 bic R0,R0,#1

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@ -50,8 +50,7 @@ FillTranslationTable (
Entry = TRANSLATION_TABLE_ENTRY_FOR_VIRTUAL_ADDRESS(TranslationTable, MemoryRegion->VirtualBase); Entry = TRANSLATION_TABLE_ENTRY_FOR_VIRTUAL_ADDRESS(TranslationTable, MemoryRegion->VirtualBase);
Sections = MemoryRegion->Length / TT_DESCRIPTOR_SECTION_SIZE; Sections = MemoryRegion->Length / TT_DESCRIPTOR_SECTION_SIZE;
for (Index = 0; Index < Sections; Index++) for (Index = 0; Index < Sections; Index++) {
{
*Entry++ = TT_DESCRIPTOR_SECTION_BASE_ADDRESS(PhysicalBase) | Attributes; *Entry++ = TT_DESCRIPTOR_SECTION_BASE_ADDRESS(PhysicalBase) | Attributes;
PhysicalBase += TT_DESCRIPTOR_SECTION_SIZE; PhysicalBase += TT_DESCRIPTOR_SECTION_SIZE;
} }

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@ -24,6 +24,7 @@
.globl ASM_PFX(ArmDrainWriteBuffer) .globl ASM_PFX(ArmDrainWriteBuffer)
.globl ASM_PFX(ArmEnableMmu) .globl ASM_PFX(ArmEnableMmu)
.globl ASM_PFX(ArmDisableMmu) .globl ASM_PFX(ArmDisableMmu)
.globl ASM_PFX(ArmMmuEnabled)
.globl ASM_PFX(ArmEnableDataCache) .globl ASM_PFX(ArmEnableDataCache)
.globl ASM_PFX(ArmDisableDataCache) .globl ASM_PFX(ArmDisableDataCache)
.globl ASM_PFX(ArmEnableInstructionCache) .globl ASM_PFX(ArmEnableInstructionCache)
@ -85,6 +86,12 @@ ASM_PFX(ArmEnableMmu):
mcr p15,0,R0,c1,c0,0 mcr p15,0,R0,c1,c0,0
bx LR bx LR
ASM_PFX(ArmMmuEnabled):
mrc p15,0,R0,c1,c0,0
and R0,R0,#1
bx LR
ASM_PFX(ArmDisableMmu): ASM_PFX(ArmDisableMmu):
mov R0,#0 mov R0,#0
mcr p15,0,R0,c13,c0,0 @FCSE PID register must be cleared before disabling MMU mcr p15,0,R0,c13,c0,0 @FCSE PID register must be cleared before disabling MMU

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@ -22,6 +22,7 @@
EXPORT ArmDrainWriteBuffer EXPORT ArmDrainWriteBuffer
EXPORT ArmEnableMmu EXPORT ArmEnableMmu
EXPORT ArmDisableMmu EXPORT ArmDisableMmu
EXPORT ArmMmuEnabled
EXPORT ArmEnableDataCache EXPORT ArmEnableDataCache
EXPORT ArmDisableDataCache EXPORT ArmDisableDataCache
EXPORT ArmEnableInstructionCache EXPORT ArmEnableInstructionCache
@ -86,6 +87,11 @@ ArmEnableMmu
mcr p15,0,R0,c1,c0,0 mcr p15,0,R0,c1,c0,0
bx LR bx LR
ArmMmuEnabled
mrc p15,0,R0,c1,c0,0
and R0,R0,#1
bx LR
ArmDisableMmu ArmDisableMmu
mov R0,#0 mov R0,#0
mcr p15,0,R0,c13,c0,0 ;FCSE PID register must be cleared before disabling MMU mcr p15,0,R0,c13,c0,0 ;FCSE PID register must be cleared before disabling MMU

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@ -1,4 +1,18 @@
#%HEADER% #/** @file
# Semihosting serail port lib
#
# Copyright (c) 2008 - 2010, Apple Inc.
#
# All rights reserved. This program and the accompanying materials
# are licensed and made available under the terms and conditions of the BSD License
# which accompanies this distribution. The full text of the license may be found at
# http://opensource.org/licenses/bsd-license.php
# THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
# WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
#
#
#**/
[Defines] [Defines]
INF_VERSION = 0x00010005 INF_VERSION = 0x00010005
BASE_NAME = ArmCortexArmLib BASE_NAME = ArmCortexArmLib

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@ -1,4 +1,18 @@
#%HEADER% #/** @file
# Semihosting serail port lib
#
# Copyright (c) 2008 - 2010, Apple Inc.
#
# All rights reserved. This program and the accompanying materials
# are licensed and made available under the terms and conditions of the BSD License
# which accompanies this distribution. The full text of the license may be found at
# http://opensource.org/licenses/bsd-license.php
# THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
# WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
#
#
#**/
[Defines] [Defines]
INF_VERSION = 0x00010005 INF_VERSION = 0x00010005
BASE_NAME = ArmCortexArmLibPrePi BASE_NAME = ArmCortexArmLibPrePi

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@ -21,6 +21,7 @@
.globl ASM_PFX(ArmGetInterruptState) .globl ASM_PFX(ArmGetInterruptState)
.globl ASM_PFX(ArmInvalidateTlb) .globl ASM_PFX(ArmInvalidateTlb)
.globl ASM_PFX(ArmSetTranslationTableBaseAddress) .globl ASM_PFX(ArmSetTranslationTableBaseAddress)
.globl ASM_PFX(ArmGetTranslationTableBaseAddress)
.globl ASM_PFX(ArmSetDomainAccessControl) .globl ASM_PFX(ArmSetDomainAccessControl)
.globl ASM_PFX(CPSRMaskInsert) .globl ASM_PFX(CPSRMaskInsert)
.globl ASM_PFX(CPSRRead) .globl ASM_PFX(CPSRRead)
@ -66,6 +67,11 @@ ASM_PFX(ArmSetTranslationTableBaseAddress):
mcr p15,0,r0,c2,c0,0 mcr p15,0,r0,c2,c0,0
bx lr bx lr
ASM_PFX(ArmGetTranslationTableBaseAddress):
mrc p15,0,r0,c2,c0,0
bx lr
ASM_PFX(ArmSetDomainAccessControl): ASM_PFX(ArmSetDomainAccessControl):
mcr p15,0,r0,c3,c0,0 mcr p15,0,r0,c3,c0,0
bx lr bx lr

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@ -20,6 +20,7 @@
EXPORT ArmGetInterruptState EXPORT ArmGetInterruptState
EXPORT ArmInvalidateTlb EXPORT ArmInvalidateTlb
EXPORT ArmSetTranslationTableBaseAddress EXPORT ArmSetTranslationTableBaseAddress
EXPORT ArmGetTranslationTableBaseAddress
EXPORT ArmSetDomainAccessControl EXPORT ArmSetDomainAccessControl
EXPORT CPSRMaskInsert EXPORT CPSRMaskInsert
EXPORT CPSRRead EXPORT CPSRRead
@ -65,6 +66,10 @@ ArmSetTranslationTableBaseAddress
mcr p15,0,r0,c2,c0,0 mcr p15,0,r0,c2,c0,0
bx lr bx lr
ArmSetTranslationTableBaseAddress
mrc p15,0,r0,c2,c0,0
bx lr
ArmSetDomainAccessControl ArmSetDomainAccessControl
mcr p15,0,r0,c3,c0,0 mcr p15,0,r0,c3,c0,0
bx lr bx lr

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@ -1,4 +1,18 @@
#%HEADER% #/** @file
# Semihosting serail port lib
#
# Copyright (c) 2008 - 2010, Apple Inc.
#
# All rights reserved. This program and the accompanying materials
# are licensed and made available under the terms and conditions of the BSD License
# which accompanies this distribution. The full text of the license may be found at
# http://opensource.org/licenses/bsd-license.php
# THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
# WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
#
#
#**/
[Defines] [Defines]
INF_VERSION = 0x00010005 INF_VERSION = 0x00010005
BASE_NAME = NullArmLib BASE_NAME = NullArmLib

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@ -1,4 +1,4 @@
#%HEADER%
#/** @file #/** @file
# Debug Library for UEFI drivers # Debug Library for UEFI drivers
# #

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@ -1,4 +1,3 @@
#%HEADER%
#/** @file #/** @file
# Semihosting serail port lib # Semihosting serail port lib
# #

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@ -1,4 +1,18 @@
#%HEADER% #/** @file
# Semihosting serail port lib
#
# Copyright (c) 2008 - 2010, Apple Inc.
#
# All rights reserved. This program and the accompanying materials
# are licensed and made available under the terms and conditions of the BSD License
# which accompanies this distribution. The full text of the license may be found at
# http://opensource.org/licenses/bsd-license.php
# THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
# WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
#
#
#**/
[Defines] [Defines]
INF_VERSION = 0x00010005 INF_VERSION = 0x00010005
BASE_NAME = SemihostLib BASE_NAME = SemihostLib

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@ -1,4 +1,18 @@
#%HEADER% #/** @file
# Semihosting serail port lib
#
# Copyright (c) 2008 - 2010, Apple Inc.
#
# All rights reserved. This program and the accompanying materials
# are licensed and made available under the terms and conditions of the BSD License
# which accompanies this distribution. The full text of the license may be found at
# http://opensource.org/licenses/bsd-license.php
# THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
# WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
#
#
#**/
[Defines] [Defines]
INF_VERSION = 0x00010005 INF_VERSION = 0x00010005
BASE_NAME = UncachedMemoryAllocationLib BASE_NAME = UncachedMemoryAllocationLib