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MdePkg BaseLib: Convert Ia32/LRotU64.asm to NASM 

The BaseTools/Scripts/ConvertMasmToNasm.py script was used to convert
Ia32/LRotU64.asm to Ia32/LRotU64.nasm

Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Jordan Justen <jordan.l.justen@intel.com>
This commit is contained in:
Jordan Justen 2016-05-30 18:51:58 -07:00 committed by Liming Gao
parent 76a7787865
commit c41d8eb046
2 changed files with 52 additions and 0 deletions
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2
MdePkg/Library/BaseLib/BaseLib.inf
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@ -303,6 +303,7 @@
Ia32/MultU64x32.asm | INTEL
Ia32/LShiftU64.nasm| INTEL
Ia32/LShiftU64.asm | INTEL
Ia32/LRotU64.nasm| INTEL
Ia32/LRotU64.asm | INTEL
Ia32/LongJump.asm | INTEL
Ia32/Invd.asm | INTEL
@ -363,6 +364,7 @@
Ia32/MultU64x32.S | GCC
Ia32/RRotU64.nasm| GCC
Ia32/RRotU64.S | GCC
Ia32/LRotU64.nasm| GCC
Ia32/LRotU64.S | GCC
Ia32/ARShiftU64.S | GCC
Ia32/RShiftU64.nasm| GCC

50
MdePkg/Library/BaseLib/Ia32/LRotU64.nasm Normal file
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@ -0,0 +1,50 @@
;------------------------------------------------------------------------------
;
; Copyright (c) 2006 - 2015, Intel Corporation. All rights reserved.<BR>
; This program and the accompanying materials
; are licensed and made available under the terms and conditions of the BSD License
; which accompanies this distribution. The full text of the license may be found at
; http://opensource.org/licenses/bsd-license.php.
;
; THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
; WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
;
; Module Name:
;
; LRotU64.nasm
;
; Abstract:
;
; 64-bit left rotation for Ia32
;
;------------------------------------------------------------------------------
SECTION .text
;------------------------------------------------------------------------------
; UINT64
; EFIAPI
; InternalMathLRotU64 (
; IN UINT64 Operand,
; IN UINTN Count
; );
;------------------------------------------------------------------------------
global ASM_PFX(InternalMathLRotU64)
ASM_PFX(InternalMathLRotU64):
push ebx
mov cl, [esp + 16]
mov edx, [esp + 12]
mov eax, [esp + 8]
shld ebx, edx, cl
shld edx, eax, cl
ror ebx, cl
shld eax, ebx, cl
test cl, 32 ; Count >= 32?
jz .0
mov ecx, eax
mov eax, edx
mov edx, ecx
.0:
pop ebx
ret