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Vlv2TbltDevicePkg/PlatformInitPei: Better SMRAM size alignment
https://bugzilla.tianocore.org/show_bug.cgi?id=260 Update workaround to be more generic. * Search for the largest region between 1MB and 4GB * Find all adjacent regions to compute total size * Minimum aligned size if 4KB * Mark extended region to align size as EFI_ALLOCATED * If an adjacent EFI_ALLOCATED region is present, then increase the size of the adjacent region. * If adjacent EFI_ALLOCATED region is not present, then allocate a new HOB with one extra entry to describe the extended region to align the total size. Preserve the last entry in the descriptor list for compatibility. This is a workaround until the binary module that produces the gEfiSmmPeiSmramMemoryReserveGuid HOB is updated Cc: Jiewen Yao <jiewen.yao@intel.com> Cc: David Wei <david.wei@intel.com> Cc: Mang Guo <mang.guo@intel.com> Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Michael Kinney <michael.d.kinney@intel.com> Reviewed-by: Jiewen Yao <jiewen.yao@intel.com>
This commit is contained in:
Michael Kinney
parent
a42e6d448d
commit
c497dcc8e5
@ -821,17 +821,156 @@ PlatformEarlyInitEntry (
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EFI_PEI_HOB_POINTERS Hob;
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EFI_PEI_HOB_POINTERS Hob;
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EFI_PLATFORM_CPU_INFO PlatformCpuInfo;
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EFI_PLATFORM_CPU_INFO PlatformCpuInfo;
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EFI_SMRAM_HOB_DESCRIPTOR_BLOCK *DescriptorBlock;
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EFI_SMRAM_HOB_DESCRIPTOR_BLOCK *DescriptorBlock;
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EFI_SMRAM_HOB_DESCRIPTOR_BLOCK *NewDescriptorBlock;
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UINTN Index;
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UINTN MaxIndex;
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UINT64 Base;
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UINT64 Size;
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UINT64 Size;
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UINT64 NewSize;
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//
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//
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// Make sure last SMRAM region is aligned
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// Make sure base and size of the SMRAM region is aligned
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//
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//
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Hob.Raw = GetFirstGuidHob (&gEfiSmmPeiSmramMemoryReserveGuid);
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Hob.Raw = GetFirstGuidHob (&gEfiSmmPeiSmramMemoryReserveGuid);
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if (Hob.Raw != NULL) {
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if (Hob.Raw != NULL) {
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DescriptorBlock = GET_GUID_HOB_DATA (Hob.Raw);
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DescriptorBlock = GET_GUID_HOB_DATA (Hob.Raw);
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Size = DescriptorBlock->Descriptor[DescriptorBlock->NumberOfSmmReservedRegions - 1].PhysicalSize;
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DEBUG ((DEBUG_INFO, "SMM PEI SMRAM Memory Reserved HOB\n"));
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Size = LShiftU64 (1, HighBitSet64 (Size - 1) + 1);
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for (Index = 0; Index < DescriptorBlock->NumberOfSmmReservedRegions; Index++) {
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DescriptorBlock->Descriptor[DescriptorBlock->NumberOfSmmReservedRegions - 1].PhysicalSize = Size;
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DEBUG((DEBUG_INFO, " SMRAM Descriptor[%02x]: Start=%016lx Size=%016lx State=%02x\n",
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Index,
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DescriptorBlock->Descriptor[Index].PhysicalStart,
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DescriptorBlock->Descriptor[Index].PhysicalSize,
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DescriptorBlock->Descriptor[Index].RegionState
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));
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}
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//
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// Find the largest usable range of SMRAM between 1MB and 4GB
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//
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for (Index = 0, MaxIndex = 0, Size = 0; Index < DescriptorBlock->NumberOfSmmReservedRegions; Index++) {
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//
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// Skip any SMRAM region that is already allocated, needs testing, or needs ECC initialization
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//
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if ((DescriptorBlock->Descriptor[Index].RegionState & (EFI_ALLOCATED | EFI_NEEDS_TESTING | EFI_NEEDS_ECC_INITIALIZATION)) != 0) {
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continue;
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}
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//
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// Skip any SMRAM region below 1MB
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//
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if (DescriptorBlock->Descriptor[Index].CpuStart < BASE_1MB) {
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continue;
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}
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//
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// Skip any SMRAM region that is above 4GB or crosses the 4GB boundary
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//
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if ((DescriptorBlock->Descriptor[Index].CpuStart + DescriptorBlock->Descriptor[Index].PhysicalSize) >= BASE_4GB) {
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continue;
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}
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//
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// Cache the largest SMRAM region index
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//
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if (DescriptorBlock->Descriptor[Index].PhysicalSize >= DescriptorBlock->Descriptor[MaxIndex].PhysicalSize) {
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MaxIndex = Index;
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}
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}
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//
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// Find the extent of the contiguous SMRAM region that surrounds the largest usable SMRAM range
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//
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Base = DescriptorBlock->Descriptor[MaxIndex].CpuStart;
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Size = DescriptorBlock->Descriptor[MaxIndex].PhysicalSize;
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for (Index = 0; Index < DescriptorBlock->NumberOfSmmReservedRegions; Index++) {
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if (DescriptorBlock->Descriptor[Index].CpuStart < Base &&
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Base == (DescriptorBlock->Descriptor[Index].CpuStart + DescriptorBlock->Descriptor[Index].PhysicalSize)) {
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Base = DescriptorBlock->Descriptor[Index].CpuStart;
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Size += DescriptorBlock->Descriptor[Index].PhysicalSize;
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} else if ((Base + Size) == DescriptorBlock->Descriptor[Index].CpuStart) {
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Size += DescriptorBlock->Descriptor[Index].PhysicalSize;
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}
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}
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//
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// Round SMRAM region up to nearest power of 2 that is at least 4KB
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//
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NewSize = MAX (LShiftU64 (1, HighBitSet64 (Size - 1) + 1), SIZE_4KB);
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if ((Base & ~(NewSize - 1)) != Base) {
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//
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// SMRAM region Base Address has smaller alignment than SMRAM region Size
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// This is not compatible with SMRR settings
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//
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DEBUG((DEBUG_ERROR, "ERROR: SMRAM Region Size has larger alignment than SMRAM Region Base\n"));
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DEBUG((DEBUG_ERROR, " SMRAM Region Base=%016lx Size=%016lx\n", Base, NewSize));
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ASSERT (FALSE);
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} else if (Size != NewSize) {
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//
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// See if the size difference can be added to an adjacent descriptor that is already allocated
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//
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for (Index = 0; Index < DescriptorBlock->NumberOfSmmReservedRegions; Index++) {
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if ((DescriptorBlock->Descriptor[Index].CpuStart + DescriptorBlock->Descriptor[Index].PhysicalSize) == (Base + Size)) {
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if (((DescriptorBlock->Descriptor[Index].RegionState) & EFI_ALLOCATED) != 0) {
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DescriptorBlock->Descriptor[Index].PhysicalSize += (NewSize - Size);
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Size = NewSize;
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break;
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}
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}
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}
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if (Size != NewSize) {
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//
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// Add an allocated descriptor to the SMM PEI SMRAM Memory Reserved HOB to accomodate the larger size.
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//
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Index = DescriptorBlock->NumberOfSmmReservedRegions;
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NewDescriptorBlock = (EFI_SMRAM_HOB_DESCRIPTOR_BLOCK *)BuildGuidHob (
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&gEfiSmmPeiSmramMemoryReserveGuid,
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sizeof (EFI_SMRAM_HOB_DESCRIPTOR_BLOCK) + ((Index + 1) * sizeof (EFI_SMRAM_DESCRIPTOR))
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);
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ASSERT (NewDescriptorBlock != NULL);
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//
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// Copy old EFI_SMRAM_HOB_DESCRIPTOR_BLOCK to new allocated region
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//
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CopyMem (
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NewDescriptorBlock,
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DescriptorBlock,
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sizeof (EFI_SMRAM_HOB_DESCRIPTOR_BLOCK) + (Index * sizeof (EFI_SMRAM_DESCRIPTOR))
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);
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//
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// Make sure last descriptor in NewDescriptorBlock contains last descriptor from DescriptorBlock
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//
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CopyMem (
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&NewDescriptorBlock->Descriptor[Index],
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&NewDescriptorBlock->Descriptor[Index - 1],
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sizeof (EFI_SMRAM_DESCRIPTOR)
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);
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//
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// Fill next to last descriptor with an allocated descriptor that aligns the total size of SMRAM
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//
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NewDescriptorBlock->Descriptor[Index - 1].CpuStart = Base + Size;
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NewDescriptorBlock->Descriptor[Index - 1].PhysicalStart = Base + Size;
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NewDescriptorBlock->Descriptor[Index - 1].PhysicalSize = NewSize - Size;
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NewDescriptorBlock->Descriptor[Index - 1].RegionState = DescriptorBlock->Descriptor[MaxIndex].RegionState | EFI_ALLOCATED;
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NewDescriptorBlock->NumberOfSmmReservedRegions++;
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//
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// Invalidate the original gEfiSmmPeiSmramMemoryReserveGuid HOB
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//
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ZeroMem (&Hob.Guid->Name, sizeof (&Hob.Guid->Name));
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}
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Hob.Raw = GetFirstGuidHob (&gEfiSmmPeiSmramMemoryReserveGuid);
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DescriptorBlock = GET_GUID_HOB_DATA (Hob.Raw);
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DEBUG ((DEBUG_INFO, "SMM PEI SMRAM Memory Reserved HOB - Updated\n"));
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for (Index = 0; Index < DescriptorBlock->NumberOfSmmReservedRegions; Index++) {
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DEBUG((DEBUG_INFO, " SMRAM Descriptor[%02x]: Start=%016lx Size=%016lx State=%02x\n",
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Index,
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DescriptorBlock->Descriptor[Index].PhysicalStart,
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DescriptorBlock->Descriptor[Index].PhysicalSize,
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DescriptorBlock->Descriptor[Index].RegionState
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));
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}
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}
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}
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}
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//
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//
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