mirror of https://github.com/acidanthera/audk.git
UefiCpuPkg/Include/Register/Msr/*.h: Add new MSR.
Changes includes: 1. Add new MSR: MSR_*_MSRUNCORE_RATIO_LIMIT Cc: Michael D Kinney <michael.d.kinney@intel.com> Cc: Ruiyu Ni <ruiyu.ni@intel.com> Cc: Laszlo Ersek <lersek@redhat.com> Contributed-under: TianoCore Contribution Agreement 1.1 Signed-off-by: Eric Dong <eric.dong@intel.com> Reviewed-by: Ruiyu Ni <ruiyu.ni@intel.com> Acked-by: Laszlo Ersek <lersek@redhat.com>
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@ -285,6 +285,60 @@ typedef union {
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} MSR_BROADWELL_TURBO_RATIO_LIMIT_REGISTER;
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/**
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Package. Uncore Ratio Limit (R/W) Out of reset, the min_ratio and max_ratio
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fields represent the widest possible range of uncore frequencies. Writing to
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these fields allows software to control the minimum and the maximum
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frequency that hardware will select.
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@param ECX MSR_BROADWELL_MSRUNCORE_RATIO_LIMIT (0x00000620)
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@param EAX Lower 32-bits of MSR value.
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Described by the type MSR_BROADWELL_MSRUNCORE_RATIO_LIMIT_REGISTER.
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@param EDX Upper 32-bits of MSR value.
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Described by the type MSR_BROADWELL_MSRUNCORE_RATIO_LIMIT_REGISTER.
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<b>Example usage</b>
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@code
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MSR_BROADWELL_MSRUNCORE_RATIO_LIMIT_REGISTER Msr;
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Msr.Uint64 = AsmReadMsr64 (MSR_BROADWELL_MSRUNCORE_RATIO_LIMIT);
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AsmWriteMsr64 (MSR_BROADWELL_MSRUNCORE_RATIO_LIMIT, Msr.Uint64);
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@endcode
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**/
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#define MSR_BROADWELL_MSRUNCORE_RATIO_LIMIT 0x00000620
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/**
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MSR information returned for MSR index #MSR_BROADWELL_MSRUNCORE_RATIO_LIMIT
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**/
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typedef union {
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///
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/// Individual bit fields
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///
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struct {
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///
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/// [Bits 6:0] MAX_RATIO This field is used to limit the max ratio of the
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/// LLC/Ring.
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///
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UINT32 MAX_RATIO:7;
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UINT32 Reserved2:1;
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///
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/// [Bits 14:8] MIN_RATIO Writing to this field controls the minimum
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/// possible ratio of the LLC/Ring.
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///
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UINT32 MIN_RATIO:7;
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UINT32 Reserved3:17;
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UINT32 Reserved4:32;
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} Bits;
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///
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/// All bit fields as a 32-bit value
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///
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UINT32 Uint32;
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///
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/// All bit fields as a 64-bit value
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///
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UINT64 Uint64;
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} MSR_BROADWELL_MSRUNCORE_RATIO_LIMIT_REGISTER;
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/**
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Package. PP0 Energy Status (R/O) See Section 14.9.4, "PP0/PP1 RAPL
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Domains.".
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@ -846,7 +846,61 @@ typedef union {
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/**
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Package. Reserved (R/O) Reads return 0.
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Package. Uncore Ratio Limit (R/W) Out of reset, the min_ratio and max_ratio
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fields represent the widest possible range of uncore frequencies. Writing to
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these fields allows software to control the minimum and the maximum
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frequency that hardware will select.
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@param ECX MSR_HASWELL_E_MSRUNCORE_RATIO_LIMIT (0x00000620)
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@param EAX Lower 32-bits of MSR value.
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Described by the type MSR_HASWELL_E_MSRUNCORE_RATIO_LIMIT_REGISTER.
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@param EDX Upper 32-bits of MSR value.
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Described by the type MSR_HASWELL_E_MSRUNCORE_RATIO_LIMIT_REGISTER.
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<b>Example usage</b>
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@code
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MSR_HASWELL_E_MSRUNCORE_RATIO_LIMIT_REGISTER Msr;
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Msr.Uint64 = AsmReadMsr64 (MSR_HASWELL_E_MSRUNCORE_RATIO_LIMIT);
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AsmWriteMsr64 (MSR_HASWELL_E_MSRUNCORE_RATIO_LIMIT, Msr.Uint64);
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@endcode
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**/
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#define MSR_HASWELL_E_MSRUNCORE_RATIO_LIMIT 0x00000620
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/**
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MSR information returned for MSR index #MSR_HASWELL_E_MSRUNCORE_RATIO_LIMIT
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**/
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typedef union {
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///
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/// Individual bit fields
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///
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struct {
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///
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/// [Bits 6:0] MAX_RATIO This field is used to limit the max ratio of the
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/// LLC/Ring.
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///
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UINT32 MAX_RATIO:7;
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UINT32 Reserved1:1;
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///
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/// [Bits 14:8] MIN_RATIO Writing to this field controls the minimum
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/// possible ratio of the LLC/Ring.
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///
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UINT32 MIN_RATIO:7;
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UINT32 Reserved2:17;
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UINT32 Reserved3:32;
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} Bits;
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///
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/// All bit fields as a 32-bit value
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///
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UINT32 Uint32;
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///
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/// All bit fields as a 64-bit value
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///
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UINT64 Uint64;
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} MSR_HASWELL_E_MSRUNCORE_RATIO_LIMIT_REGISTER;
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/**
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Package. Reserved (R/O) Reads return 0.
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@param ECX MSR_HASWELL_E_PP0_ENERGY_STATUS (0x00000639)
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@param EAX Lower 32-bits of MSR value.
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@ -754,7 +754,61 @@ typedef union {
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/**
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Package. Reserved (R/O) Reads return 0.
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Package. Uncore Ratio Limit (R/W) Out of reset, the min_ratio and max_ratio
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fields represent the widest possible range of uncore frequencies. Writing to
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these fields allows software to control the minimum and the maximum
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frequency that hardware will select.
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@param ECX MSR_XEON_D_MSRUNCORE_RATIO_LIMIT (0x00000620)
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@param EAX Lower 32-bits of MSR value.
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Described by the type MSR_XEON_D_MSRUNCORE_RATIO_LIMIT_REGISTER.
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@param EDX Upper 32-bits of MSR value.
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Described by the type MSR_XEON_D_MSRUNCORE_RATIO_LIMIT_REGISTER.
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<b>Example usage</b>
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@code
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MSR_XEON_D_MSRUNCORE_RATIO_LIMIT_REGISTER Msr;
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Msr.Uint64 = AsmReadMsr64 (MSR_XEON_D_MSRUNCORE_RATIO_LIMIT);
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AsmWriteMsr64 (MSR_XEON_D_MSRUNCORE_RATIO_LIMIT, Msr.Uint64);
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@endcode
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**/
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#define MSR_XEON_D_MSRUNCORE_RATIO_LIMIT 0x00000620
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/**
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MSR information returned for MSR index #MSR_XEON_D_MSRUNCORE_RATIO_LIMIT
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**/
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typedef union {
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///
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/// Individual bit fields
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///
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struct {
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///
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/// [Bits 6:0] MAX_RATIO This field is used to limit the max ratio of the
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/// LLC/Ring.
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///
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UINT32 MAX_RATIO:7;
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UINT32 Reserved1:1;
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///
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/// [Bits 14:8] MIN_RATIO Writing to this field controls the minimum
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/// possible ratio of the LLC/Ring.
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///
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UINT32 MIN_RATIO:7;
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UINT32 Reserved2:17;
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UINT32 Reserved3:32;
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} Bits;
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///
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/// All bit fields as a 32-bit value
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///
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UINT32 Uint32;
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///
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/// All bit fields as a 64-bit value
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///
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UINT64 Uint64;
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} MSR_XEON_D_MSRUNCORE_RATIO_LIMIT_REGISTER;
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/**
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Package. Reserved (R/O) Reads return 0.
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@param ECX MSR_XEON_D_PP0_ENERGY_STATUS (0x00000639)
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@param EAX Lower 32-bits of MSR value.
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