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UefiCpuPkg/Include/Register/Msr/*.h: Add new MSR. 

Changes includes:
  1. Add new MSR: MSR_*_MSRUNCORE_RATIO_LIMIT

Cc: Michael D Kinney <michael.d.kinney@intel.com>
Cc: Ruiyu Ni <ruiyu.ni@intel.com>
Cc: Laszlo Ersek <lersek@redhat.com>
Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Eric Dong <eric.dong@intel.com>
Reviewed-by: Ruiyu Ni <ruiyu.ni@intel.com>
Acked-by: Laszlo Ersek <lersek@redhat.com>
This commit is contained in:
Eric Dong 2018-08-30 13:57:58 +08:00
parent 47f75d2169
commit c4b073632d
3 changed files with 164 additions and 2 deletions
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54
UefiCpuPkg/Include/Register/Msr/BroadwellMsr.h
View File

@ -285,6 +285,60 @@ typedef union {
} MSR_BROADWELL_TURBO_RATIO_LIMIT_REGISTER; } MSR_BROADWELL_TURBO_RATIO_LIMIT_REGISTER;
/**
Package. Uncore Ratio Limit (R/W) Out of reset, the min_ratio and max_ratio
fields represent the widest possible range of uncore frequencies. Writing to
these fields allows software to control the minimum and the maximum
frequency that hardware will select.
@param ECX MSR_BROADWELL_MSRUNCORE_RATIO_LIMIT (0x00000620)
@param EAX Lower 32-bits of MSR value.
Described by the type MSR_BROADWELL_MSRUNCORE_RATIO_LIMIT_REGISTER.
@param EDX Upper 32-bits of MSR value.
Described by the type MSR_BROADWELL_MSRUNCORE_RATIO_LIMIT_REGISTER.
<b>Example usage</b>
@code
MSR_BROADWELL_MSRUNCORE_RATIO_LIMIT_REGISTER Msr;
Msr.Uint64 = AsmReadMsr64 (MSR_BROADWELL_MSRUNCORE_RATIO_LIMIT);
AsmWriteMsr64 (MSR_BROADWELL_MSRUNCORE_RATIO_LIMIT, Msr.Uint64);
@endcode
**/
#define MSR_BROADWELL_MSRUNCORE_RATIO_LIMIT 0x00000620
/**
MSR information returned for MSR index #MSR_BROADWELL_MSRUNCORE_RATIO_LIMIT
**/
typedef union {
///
/// Individual bit fields
///
struct {
///
/// [Bits 6:0] MAX_RATIO This field is used to limit the max ratio of the
/// LLC/Ring.
///
UINT32 MAX_RATIO:7;
UINT32 Reserved2:1;
///
/// [Bits 14:8] MIN_RATIO Writing to this field controls the minimum
/// possible ratio of the LLC/Ring.
///
UINT32 MIN_RATIO:7;
UINT32 Reserved3:17;
UINT32 Reserved4:32;
} Bits;
///
/// All bit fields as a 32-bit value
///
UINT32 Uint32;
///
/// All bit fields as a 64-bit value
///
UINT64 Uint64;
} MSR_BROADWELL_MSRUNCORE_RATIO_LIMIT_REGISTER;
/** /**
Package. PP0 Energy Status (R/O) See Section 14.9.4, "PP0/PP1 RAPL Package. PP0 Energy Status (R/O) See Section 14.9.4, "PP0/PP1 RAPL
Domains.". Domains.".

54
UefiCpuPkg/Include/Register/Msr/HaswellEMsr.h
View File

@ -845,6 +845,60 @@ typedef union {
} MSR_HASWELL_E_PCIE_PLL_RATIO_REGISTER; } MSR_HASWELL_E_PCIE_PLL_RATIO_REGISTER;
/**
Package. Uncore Ratio Limit (R/W) Out of reset, the min_ratio and max_ratio
fields represent the widest possible range of uncore frequencies. Writing to
these fields allows software to control the minimum and the maximum
frequency that hardware will select.
@param ECX MSR_HASWELL_E_MSRUNCORE_RATIO_LIMIT (0x00000620)
@param EAX Lower 32-bits of MSR value.
Described by the type MSR_HASWELL_E_MSRUNCORE_RATIO_LIMIT_REGISTER.
@param EDX Upper 32-bits of MSR value.
Described by the type MSR_HASWELL_E_MSRUNCORE_RATIO_LIMIT_REGISTER.
<b>Example usage</b>
@code
MSR_HASWELL_E_MSRUNCORE_RATIO_LIMIT_REGISTER Msr;
Msr.Uint64 = AsmReadMsr64 (MSR_HASWELL_E_MSRUNCORE_RATIO_LIMIT);
AsmWriteMsr64 (MSR_HASWELL_E_MSRUNCORE_RATIO_LIMIT, Msr.Uint64);
@endcode
**/
#define MSR_HASWELL_E_MSRUNCORE_RATIO_LIMIT 0x00000620
/**
MSR information returned for MSR index #MSR_HASWELL_E_MSRUNCORE_RATIO_LIMIT
**/
typedef union {
///
/// Individual bit fields
///
struct {
///
/// [Bits 6:0] MAX_RATIO This field is used to limit the max ratio of the
/// LLC/Ring.
///
UINT32 MAX_RATIO:7;
UINT32 Reserved1:1;
///
/// [Bits 14:8] MIN_RATIO Writing to this field controls the minimum
/// possible ratio of the LLC/Ring.
///
UINT32 MIN_RATIO:7;
UINT32 Reserved2:17;
UINT32 Reserved3:32;
} Bits;
///
/// All bit fields as a 32-bit value
///
UINT32 Uint32;
///
/// All bit fields as a 64-bit value
///
UINT64 Uint64;
} MSR_HASWELL_E_MSRUNCORE_RATIO_LIMIT_REGISTER;
/** /**
Package. Reserved (R/O) Reads return 0. Package. Reserved (R/O) Reads return 0.

54
UefiCpuPkg/Include/Register/Msr/XeonDMsr.h
View File

@ -753,6 +753,60 @@ typedef union {
#define MSR_XEON_D_DRAM_POWER_INFO 0x0000061C #define MSR_XEON_D_DRAM_POWER_INFO 0x0000061C
/**
Package. Uncore Ratio Limit (R/W) Out of reset, the min_ratio and max_ratio
fields represent the widest possible range of uncore frequencies. Writing to
these fields allows software to control the minimum and the maximum
frequency that hardware will select.
@param ECX MSR_XEON_D_MSRUNCORE_RATIO_LIMIT (0x00000620)
@param EAX Lower 32-bits of MSR value.
Described by the type MSR_XEON_D_MSRUNCORE_RATIO_LIMIT_REGISTER.
@param EDX Upper 32-bits of MSR value.
Described by the type MSR_XEON_D_MSRUNCORE_RATIO_LIMIT_REGISTER.
<b>Example usage</b>
@code
MSR_XEON_D_MSRUNCORE_RATIO_LIMIT_REGISTER Msr;
Msr.Uint64 = AsmReadMsr64 (MSR_XEON_D_MSRUNCORE_RATIO_LIMIT);
AsmWriteMsr64 (MSR_XEON_D_MSRUNCORE_RATIO_LIMIT, Msr.Uint64);
@endcode
**/
#define MSR_XEON_D_MSRUNCORE_RATIO_LIMIT 0x00000620
/**
MSR information returned for MSR index #MSR_XEON_D_MSRUNCORE_RATIO_LIMIT
**/
typedef union {
///
/// Individual bit fields
///
struct {
///
/// [Bits 6:0] MAX_RATIO This field is used to limit the max ratio of the
/// LLC/Ring.
///
UINT32 MAX_RATIO:7;
UINT32 Reserved1:1;
///
/// [Bits 14:8] MIN_RATIO Writing to this field controls the minimum
/// possible ratio of the LLC/Ring.
///
UINT32 MIN_RATIO:7;
UINT32 Reserved2:17;
UINT32 Reserved3:32;
} Bits;
///
/// All bit fields as a 32-bit value
///
UINT32 Uint32;
///
/// All bit fields as a 64-bit value
///
UINT64 Uint64;
} MSR_XEON_D_MSRUNCORE_RATIO_LIMIT_REGISTER;
/** /**
Package. Reserved (R/O) Reads return 0. Package. Reserved (R/O) Reads return 0.