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ArmPlatformPkg/PL35xSmc: Added function PL35xSmcSetRefresh

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Signed-off-by: Olivier Martin <olivier.martin@arm.com>



git-svn-id: https://edk2.svn.sourceforge.net/svnroot/edk2/trunk/edk2@13254 6f19259b-4bc3-4df7-8a09-765794883524
This commit is contained in:
oliviermartin 2012-05-02 20:04:00 +00:00
parent 836c350061
commit c54de82204
3 changed files with 25 additions and 8 deletions
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13
ArmPlatformPkg/Drivers/PL35xSmc/InitializeSMC.S
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@ -1,10 +1,10 @@
# #
# Copyright (c) 2011, ARM Limited. All rights reserved. # Copyright (c) 2011-2012, ARM Limited. All rights reserved.
# #
# This program and the accompanying materials # This program and the accompanying materials
# are licensed and made available under the terms and conditions of the BSD License # are licensed and made available under the terms and conditions of the BSD License
# which accompanies this distribution. The full text of the license may be found at # which accompanies this distribution. The full text of the license may be found at
# http:#opensource.org/licenses/bsd-license.php # http://opensource.org/licenses/bsd-license.php
# #
# THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS, # THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
# WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED. # WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
@ -22,6 +22,7 @@
.align 3 .align 3
GCC_ASM_EXPORT(PL35xSmcInitialize) GCC_ASM_EXPORT(PL35xSmcInitialize)
GCC_ASM_EXPORT(PL35xSmcSetRefresh)
// IN r1 Smc Base Address // IN r1 Smc Base Address
// IN r2 Smc Configuration Start Address // IN r2 Smc Configuration Start Address
@ -50,4 +51,10 @@ ASM_PFX(PL35xSmcInitialize):
add r2, #0xC add r2, #0xC
b ASM_PFX(PL35xSmcInitialize) b ASM_PFX(PL35xSmcInitialize)
ASM_FUNCTION_REMOVE_IF_UNREFERENCED // IN r1 Smc Base Address
// IN r2 Smc Refresh Period 0
// IN r3 Smc Refresh Period 1
ASM_PFX(PL35xSmcSetRefresh):
str r2, [r1, #PL350_SMC_REFRESH_0_OFFSET]
str r3, [r1, #PL350_SMC_REFRESH_1_OFFSET]
blx lr

10
ArmPlatformPkg/Drivers/PL35xSmc/InitializeSMC.asm
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@ -1,5 +1,5 @@
// //
// Copyright (c) 2011, ARM Limited. All rights reserved. // Copyright (c) 2011-2012, ARM Limited. All rights reserved.
// //
// This program and the accompanying materials // This program and the accompanying materials
// are licensed and made available under the terms and conditions of the BSD License // are licensed and made available under the terms and conditions of the BSD License
@ -19,6 +19,7 @@
INCLUDE AsmMacroIoLib.inc INCLUDE AsmMacroIoLib.inc
EXPORT PL35xSmcInitialize EXPORT PL35xSmcInitialize
EXPORT PL35xSmcSetRefresh
PRESERVE8 PRESERVE8
AREA ModuleInitializeSMC, CODE, READONLY AREA ModuleInitializeSMC, CODE, READONLY
@ -50,3 +51,10 @@ PL35xSmcInitialize
add r2, #0xC add r2, #0xC
b PL35xSmcInitialize b PL35xSmcInitialize
// IN r1 Smc Base Address
// IN r2 Smc Refresh Period 0
// IN r3 Smc Refresh Period 1
PL35xSmcSetRefresh
str r2, [r1, #PL350_SMC_REFRESH_0_OFFSET]
str r3, [r1, #PL350_SMC_REFRESH_1_OFFSET]
blx lr

10
ArmPlatformPkg/Include/Drivers/PL35xSmc.h
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@ -1,6 +1,6 @@
/** @file /** @file
* *
* Copyright (c) 2011, ARM Limited. All rights reserved. * Copyright (c) 2011-2012, ARM Limited. All rights reserved.
* *
* This program and the accompanying materials * This program and the accompanying materials
* are licensed and made available under the terms and conditions of the BSD License * are licensed and made available under the terms and conditions of the BSD License
@ -15,9 +15,11 @@
#ifndef PL35xSMC_H_ #ifndef PL35xSMC_H_
#define PL35xSMC_H_ #define PL35xSMC_H_
#define PL350_SMC_DIRECT_CMD_OFFSET 0x10 #define PL350_SMC_DIRECT_CMD_OFFSET 0x10
#define PL350_SMC_SET_CYCLES_OFFSET 0x14 #define PL350_SMC_SET_CYCLES_OFFSET 0x14
#define PL350_SMC_SET_OPMODE_OFFSET 0x18 #define PL350_SMC_SET_OPMODE_OFFSET 0x18
#define PL350_SMC_REFRESH_0_OFFSET 0x20
#define PL350_SMC_REFRESH_1_OFFSET 0x24
#define PL350_SMC_DIRECT_CMD_ADDR(addr) ((addr) & 0xFFFFF) #define PL350_SMC_DIRECT_CMD_ADDR(addr) ((addr) & 0xFFFFF)
#define PL350_SMC_DIRECT_CMD_ADDR_SET_CRE (1 << 20) #define PL350_SMC_DIRECT_CMD_ADDR_SET_CRE (1 << 20)