mirror of https://github.com/acidanthera/audk.git
MdeModulePkg BootScriptExecutorDxe: Reduce reserved memory consumption
We are going to reduce reserved memory consumption by page table buffer, then OS can have more available memory to use. Take PhysicalAddressBits = 48 and 2MB page granularity as example, 1:1 Virtual to Physical identity mapping page table buffer needs to be ((512 + 1) * 512 + 1) * 4096 = 1075843072 bytes = 0x40201000 bytes. Current BootScriptExecutorDxe handles > 4G request by page fault because S3ResumePeim only builds 4G page table when long mode waking vector is not needed, but BootScriptExecutorDxe still assume the page table buffer for page table is at 1:1 Virtual to Physical identity mapping. To reduce reserved memory consumption, the code is updated to only use 8 extra pages to handles > 4G request by page fault. Another, when both BIOS and OS wants long mode waking vector, S3ResumePei should have established 1:1 Virtual to Physical identity mapping page table for ACPI spec requirement, so no need to hook page fault handler. Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Star Zeng <star.zeng@intel.com> Reviewed-by: Jiewen Yao <jiewen.yao@intel.com> git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@18067 6f19259b-4bc3-4df7-8a09-765794883524
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@ -3,7 +3,7 @@
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Set a IDT entry for interrupt vector 3 for debug purpose for x64 platform
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Set a IDT entry for interrupt vector 3 for debug purpose for x64 platform
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Copyright (c) 2006 - 2013, Intel Corporation. All rights reserved.<BR>
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Copyright (c) 2006 - 2015, Intel Corporation. All rights reserved.<BR>
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This program and the accompanying materials
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This program and the accompanying materials
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are licensed and made available under the terms and conditions of the BSD License
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are licensed and made available under the terms and conditions of the BSD License
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@ -16,13 +16,23 @@ WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
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**/
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**/
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#include "ScriptExecute.h"
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#include "ScriptExecute.h"
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//
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// 8 extra pages for PF handler.
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//
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#define EXTRA_PAGE_TABLE_PAGES 8
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#define IA32_PG_P BIT0
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#define IA32_PG_P BIT0
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#define IA32_PG_RW BIT1
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#define IA32_PG_RW BIT1
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#define IA32_PG_PS BIT7
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#define IA32_PG_PS BIT7
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UINT64 mPhyMask;
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UINT64 mPhyMask;
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VOID *mOriginalHandler;
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VOID *mOriginalHandler;
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UINTN mS3NvsPageTableAddress;
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UINTN mPageFaultBuffer;
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UINTN mPageFaultIndex = 0;
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//
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// Store the uplink information for each page being used.
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//
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UINT64 *mPageFaultUplink[EXTRA_PAGE_TABLE_PAGES];
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/**
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/**
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Page fault handler.
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Page fault handler.
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@ -73,10 +83,46 @@ HookPageFaultHandler (
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IdtEntry->Bits.Reserved_1 = 0;
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IdtEntry->Bits.Reserved_1 = 0;
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if (mPage1GSupport) {
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if (mPage1GSupport) {
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mS3NvsPageTableAddress = (UINTN)(AsmReadCr3 () & mPhyMask) + EFI_PAGES_TO_SIZE(2);
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mPageFaultBuffer = (UINTN)(AsmReadCr3 () & mPhyMask) + EFI_PAGES_TO_SIZE(2);
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}else {
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}else {
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mS3NvsPageTableAddress = (UINTN)(AsmReadCr3 () & mPhyMask) + EFI_PAGES_TO_SIZE(6);
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mPageFaultBuffer = (UINTN)(AsmReadCr3 () & mPhyMask) + EFI_PAGES_TO_SIZE(6);
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}
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}
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ZeroMem (mPageFaultUplink, sizeof (mPageFaultUplink));
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}
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/**
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The function will check if current waking vector is long mode.
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@param AcpiS3Context a pointer to a structure of ACPI_S3_CONTEXT
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@retval TRUE Current context need long mode waking vector.
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@retval FALSE Current context need not long mode waking vector.
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**/
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BOOLEAN
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IsLongModeWakingVector (
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IN ACPI_S3_CONTEXT *AcpiS3Context
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)
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{
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EFI_ACPI_4_0_FIRMWARE_ACPI_CONTROL_STRUCTURE *Facs;
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Facs = (EFI_ACPI_4_0_FIRMWARE_ACPI_CONTROL_STRUCTURE *) ((UINTN) (AcpiS3Context->AcpiFacsTable));
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if ((Facs == NULL) ||
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(Facs->Signature != EFI_ACPI_4_0_FIRMWARE_ACPI_CONTROL_STRUCTURE_SIGNATURE) ||
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((Facs->FirmwareWakingVector == 0) && (Facs->XFirmwareWakingVector == 0)) ) {
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// Something wrong with FACS
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return FALSE;
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}
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if (Facs->XFirmwareWakingVector != 0) {
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if ((Facs->Version == EFI_ACPI_4_0_FIRMWARE_ACPI_CONTROL_STRUCTURE_VERSION) &&
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((Facs->Flags & EFI_ACPI_4_0_64BIT_WAKE_SUPPORTED_F) != 0) &&
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((Facs->Flags & EFI_ACPI_4_0_OSPM_64BIT_WAKE__F) != 0)) {
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// Both BIOS and OS wants 64bit vector
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if (FeaturePcdGet (PcdDxeIplSwitchToLongMode)) {
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return TRUE;
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}
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}
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}
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return FALSE;
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}
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}
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/**
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/**
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@ -124,27 +170,47 @@ SetIdtEntry (
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}
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}
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);
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);
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IdtEntry = (IA32_IDT_GATE_DESCRIPTOR *)(IdtDescriptor->Base + (14 * sizeof (IA32_IDT_GATE_DESCRIPTOR)));
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//
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HookPageFaultHandler (IdtEntry);
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// If both BIOS and OS wants long mode waking vector,
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// S3ResumePei should have established 1:1 Virtual to Physical identity mapping page table,
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// no need to hook page fault handler.
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//
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if (!IsLongModeWakingVector (AcpiS3Context)) {
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IdtEntry = (IA32_IDT_GATE_DESCRIPTOR *)(IdtDescriptor->Base + (14 * sizeof (IA32_IDT_GATE_DESCRIPTOR)));
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HookPageFaultHandler (IdtEntry);
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}
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}
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}
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/**
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/**
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Get new page address.
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Acquire page for page fault.
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@param PageNum new page number needed
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@param[in, out] Uplink Pointer to up page table entry.
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@return new page address
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**/
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**/
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UINTN
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VOID
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GetNewPage (
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AcquirePage (
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IN UINTN PageNum
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IN OUT UINT64 *Uplink
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)
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)
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{
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{
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UINTN NewPage;
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UINTN Address;
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NewPage = mS3NvsPageTableAddress;
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ZeroMem ((VOID *)NewPage, EFI_PAGES_TO_SIZE(PageNum));
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Address = mPageFaultBuffer + EFI_PAGES_TO_SIZE (mPageFaultIndex);
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mS3NvsPageTableAddress += EFI_PAGES_TO_SIZE(PageNum);
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ZeroMem ((VOID *) Address, EFI_PAGES_TO_SIZE (1));
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return NewPage;
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//
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// Cut the previous uplink if it exists and wasn't overwritten.
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//
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if ((mPageFaultUplink[mPageFaultIndex] != NULL) && ((*mPageFaultUplink[mPageFaultIndex] & mPhyMask) == Address)) {
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*mPageFaultUplink[mPageFaultIndex] = 0;
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}
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//
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// Link & Record the current uplink.
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//
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*Uplink = Address | IA32_PG_P | IA32_PG_RW;
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mPageFaultUplink[mPageFaultIndex] = Uplink;
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mPageFaultIndex = (mPageFaultIndex + 1) % EXTRA_PAGE_TABLE_PAGES;
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}
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}
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/**
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/**
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@ -177,21 +243,21 @@ PageFaultHandler (
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PTIndex = BitFieldRead64 (PFAddress, 39, 47);
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PTIndex = BitFieldRead64 (PFAddress, 39, 47);
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// PML4E
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// PML4E
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if ((PageTable[PTIndex] & IA32_PG_P) == 0) {
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if ((PageTable[PTIndex] & IA32_PG_P) == 0) {
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PageTable[PTIndex] = GetNewPage (1) | IA32_PG_P | IA32_PG_RW;
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AcquirePage (&PageTable[PTIndex]);
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}
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}
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PageTable = (UINT64*)(UINTN)(PageTable[PTIndex] & mPhyMask);
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PageTable = (UINT64*)(UINTN)(PageTable[PTIndex] & mPhyMask);
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PTIndex = BitFieldRead64 (PFAddress, 30, 38);
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PTIndex = BitFieldRead64 (PFAddress, 30, 38);
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// PDPTE
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// PDPTE
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if (mPage1GSupport) {
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if (mPage1GSupport) {
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PageTable[PTIndex] = PFAddress | IA32_PG_P | IA32_PG_RW | IA32_PG_PS;
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PageTable[PTIndex] = (PFAddress & ~((1ull << 30) - 1)) | IA32_PG_P | IA32_PG_RW | IA32_PG_PS;
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} else {
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} else {
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if ((PageTable[PTIndex] & IA32_PG_P) == 0) {
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if ((PageTable[PTIndex] & IA32_PG_P) == 0) {
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PageTable[PTIndex] = GetNewPage (1) | IA32_PG_P | IA32_PG_RW;
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AcquirePage (&PageTable[PTIndex]);
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}
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}
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PageTable = (UINT64*)(UINTN)(PageTable[PTIndex] & mPhyMask);
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PageTable = (UINT64*)(UINTN)(PageTable[PTIndex] & mPhyMask);
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PTIndex = BitFieldRead64 (PFAddress, 21, 29);
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PTIndex = BitFieldRead64 (PFAddress, 21, 29);
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// PD
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// PD
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PageTable[PTIndex] = PFAddress | IA32_PG_P | IA32_PG_RW | IA32_PG_PS;
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PageTable[PTIndex] = (PFAddress & ~((1ull << 21) - 1)) | IA32_PG_P | IA32_PG_RW | IA32_PG_PS;
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}
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}
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return TRUE;
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return TRUE;
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