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UefiCpuPkg/CpuDxe: clean up PAGE_TABLE_LIB_PAGING_CONTEXT usage. 

REF: https://bugzilla.tianocore.org/show_bug.cgi?id=1039

Current implementation not checks system mode before using
PAGE_TABLE_LIB_PAGING_CONTEXT.ContextData.X64 or
PAGE_TABLE_LIB_PAGING_CONTEXT.ContextData.Ia32. This patch check the
mode before using the correct one.

Signed-off-by: Eric Dong <eric.dong@intel.com>
Reviewed-by: Laszlo Ersek <lersek@redhat.com>
This commit is contained in:
Dong, Eric 2019-09-12 13:22:18 +08:00 committed by Eric Dong
parent a3596a040b
commit c70fef962e
5 changed files with 112 additions and 16 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

4
UefiCpuPkg/CpuDxe/CpuDxe.inf
View File

@ -1,7 +1,7 @@
## @file
# CPU driver installs CPU Architecture Protocol and CPU MP protocol.
#
# Copyright (c) 2008 - 2018, Intel Corporation. All rights reserved.<BR>
# Copyright (c) 2008 - 2019, Intel Corporation. All rights reserved.<BR>
# Copyright (c) 2017, AMD Incorporated. All rights reserved.<BR>
#
# SPDX-License-Identifier: BSD-2-Clause-Patent
@ -54,9 +54,11 @@
[Sources.IA32]
Ia32/CpuAsm.nasm
Ia32/PagingAttribute.c
[Sources.X64]
X64/CpuAsm.nasm
X64/PagingAttribute.c
[Protocols]
gEfiCpuArchProtocolGuid ## PRODUCES

41
UefiCpuPkg/CpuDxe/CpuPageTable.c
View File

@ -155,6 +155,8 @@ GetCurrentPagingContext (
MSR_IA32_EFER_REGISTER MsrEfer;
IA32_CR4 Cr4;
IA32_CR0 Cr0;
UINT32 *Attributes;
UINTN *PageTableBase;
//
// Don't retrieve current paging context from processor if in SMM mode.
@ -167,25 +169,27 @@ GetCurrentPagingContext (
mPagingContext.MachineType = IMAGE_FILE_MACHINE_I386;
}
GetPagingDetails (&mPagingContext.ContextData, &PageTableBase, &Attributes);
Cr0.UintN = AsmReadCr0 ();
Cr4.UintN = AsmReadCr4 ();
if (Cr0.Bits.PG != 0) {
mPagingContext.ContextData.X64.PageTableBase = (AsmReadCr3 () & PAGING_4K_ADDRESS_MASK_64);
*PageTableBase = (AsmReadCr3 () & PAGING_4K_ADDRESS_MASK_64);
} else {
mPagingContext.ContextData.X64.PageTableBase = 0;
*PageTableBase = 0;
}
if (Cr0.Bits.WP != 0) {
mPagingContext.ContextData.Ia32.Attributes |= PAGE_TABLE_LIB_PAGING_CONTEXT_IA32_X64_ATTRIBUTES_WP_ENABLE;
*Attributes |= PAGE_TABLE_LIB_PAGING_CONTEXT_IA32_X64_ATTRIBUTES_WP_ENABLE;
}
if (Cr4.Bits.PSE != 0) {
mPagingContext.ContextData.Ia32.Attributes |= PAGE_TABLE_LIB_PAGING_CONTEXT_IA32_X64_ATTRIBUTES_PSE;
*Attributes |= PAGE_TABLE_LIB_PAGING_CONTEXT_IA32_X64_ATTRIBUTES_PSE;
}
if (Cr4.Bits.PAE != 0) {
mPagingContext.ContextData.Ia32.Attributes |= PAGE_TABLE_LIB_PAGING_CONTEXT_IA32_X64_ATTRIBUTES_PAE;
*Attributes |= PAGE_TABLE_LIB_PAGING_CONTEXT_IA32_X64_ATTRIBUTES_PAE;
}
if (Cr4.Bits.LA57 != 0) {
mPagingContext.ContextData.Ia32.Attributes |= PAGE_TABLE_LIB_PAGING_CONTEXT_IA32_X64_ATTRIBUTES_5_LEVEL;
*Attributes |= PAGE_TABLE_LIB_PAGING_CONTEXT_IA32_X64_ATTRIBUTES_5_LEVEL;
}
AsmCpuid (CPUID_EXTENDED_FUNCTION, &RegEax, NULL, NULL, NULL);
@ -197,12 +201,12 @@ GetCurrentPagingContext (
MsrEfer.Uint64 = AsmReadMsr64(MSR_CORE_IA32_EFER);
if (MsrEfer.Bits.NXE != 0) {
// XD activated
mPagingContext.ContextData.Ia32.Attributes |= PAGE_TABLE_LIB_PAGING_CONTEXT_IA32_X64_ATTRIBUTES_XD_ACTIVATED;
*Attributes |= PAGE_TABLE_LIB_PAGING_CONTEXT_IA32_X64_ATTRIBUTES_XD_ACTIVATED;
}
}
if (RegEdx.Bits.Page1GB != 0) {
mPagingContext.ContextData.Ia32.Attributes |= PAGE_TABLE_LIB_PAGING_CONTEXT_IA32_X64_ATTRIBUTES_PAGE_1G_SUPPORT;
*Attributes |= PAGE_TABLE_LIB_PAGING_CONTEXT_IA32_X64_ATTRIBUTES_PAGE_1G_SUPPORT;
}
}
}
@ -395,6 +399,7 @@ ConvertPageEntryAttribute (
{
UINT64 CurrentPageEntry;
UINT64 NewPageEntry;
UINT32 *PageAttributes;
CurrentPageEntry = *PageEntry;
NewPageEntry = CurrentPageEntry;
@ -438,7 +443,10 @@ ConvertPageEntryAttribute (
break;
}
}
if ((PagingContext->ContextData.Ia32.Attributes & PAGE_TABLE_LIB_PAGING_CONTEXT_IA32_X64_ATTRIBUTES_XD_ACTIVATED) != 0) {
GetPagingDetails (&PagingContext->ContextData, NULL, &PageAttributes);
if ((*PageAttributes & PAGE_TABLE_LIB_PAGING_CONTEXT_IA32_X64_ATTRIBUTES_XD_ACTIVATED) != 0) {
if ((Attributes & EFI_MEMORY_XP) != 0) {
switch (PageAction) {
case PageActionAssign:
@ -1338,15 +1346,18 @@ InitializePageTableLib (
)
{
PAGE_TABLE_LIB_PAGING_CONTEXT CurrentPagingContext;
UINT32 *Attributes;
UINTN *PageTableBase;
GetCurrentPagingContext (&CurrentPagingContext);
GetPagingDetails (&CurrentPagingContext.ContextData, &PageTableBase, &Attributes);
//
// Reserve memory of page tables for future uses, if paging is enabled.
//
if (CurrentPagingContext.ContextData.X64.PageTableBase != 0 &&
(CurrentPagingContext.ContextData.Ia32.Attributes &
PAGE_TABLE_LIB_PAGING_CONTEXT_IA32_X64_ATTRIBUTES_PAE) != 0) {
if ((*PageTableBase != 0) &&
(*Attributes & PAGE_TABLE_LIB_PAGING_CONTEXT_IA32_X64_ATTRIBUTES_PAE) != 0) {
DisableReadOnlyPageWriteProtect ();
InitializePageTablePool (1);
EnableReadOnlyPageWriteProtect ();
@ -1361,10 +1372,10 @@ InitializePageTableLib (
ASSERT (mLastPFEntryPointer != NULL);
}
DEBUG ((DEBUG_INFO, "CurrentPagingContext:\n", CurrentPagingContext.MachineType));
DEBUG ((DEBUG_INFO, "CurrentPagingContext:\n"));
DEBUG ((DEBUG_INFO, " MachineType - 0x%x\n", CurrentPagingContext.MachineType));
DEBUG ((DEBUG_INFO, " PageTableBase - 0x%x\n", CurrentPagingContext.ContextData.X64.PageTableBase));
DEBUG ((DEBUG_INFO, " Attributes - 0x%x\n", CurrentPagingContext.ContextData.X64.Attributes));
DEBUG ((DEBUG_INFO, " PageTableBase - 0x%Lx\n", (UINT64)*PageTableBase));
DEBUG ((DEBUG_INFO, " Attributes - 0x%x\n", *Attributes));
return ;
}

15
UefiCpuPkg/CpuDxe/CpuPageTable.h
View File

@ -139,4 +139,19 @@ AllocatePageTableMemory (
IN UINTN Pages
);
/**
Get paging details.
@param PagingContextData The paging context.
@param PageTableBase Return PageTableBase field.
@param Attributes Return Attributes field.
**/
VOID
GetPagingDetails (
IN PAGE_TABLE_LIB_PAGING_CONTEXT_DATA *PagingContextData,
OUT UINTN **PageTableBase OPTIONAL,
OUT UINT32 **Attributes OPTIONAL
);
#endif

34
UefiCpuPkg/CpuDxe/Ia32/PagingAttribute.c Normal file
View File

@ -0,0 +1,34 @@
/** @file
Return Paging attribute.
Copyright (c) 2019, Intel Corporation. All rights reserved.<BR>
SPDX-License-Identifier: BSD-2-Clause-Patent
**/
#include "CpuPageTable.h"
/**
Get paging details.
@param PagingContextData The paging context.
@param PageTableBase Return PageTableBase field.
@param Attributes Return Attributes field.
**/
VOID
GetPagingDetails (
IN PAGE_TABLE_LIB_PAGING_CONTEXT_DATA *PagingContextData,
OUT UINTN **PageTableBase OPTIONAL,
OUT UINT32 **Attributes OPTIONAL
)
{
if (PageTableBase != NULL) {
*PageTableBase = &PagingContextData->Ia32.PageTableBase;
}
if (Attributes != NULL) {
*Attributes = &PagingContextData->Ia32.Attributes;
}
}

34
UefiCpuPkg/CpuDxe/X64/PagingAttribute.c Normal file
View File

@ -0,0 +1,34 @@
/** @file
Return Paging attribute.
Copyright (c) 2019, Intel Corporation. All rights reserved.<BR>
SPDX-License-Identifier: BSD-2-Clause-Patent
**/
#include "CpuPageTable.h"
/**
Get paging details.
@param PagingContextData The paging context.
@param PageTableBase Return PageTableBase field.
@param Attributes Return Attributes field.
**/
VOID
GetPagingDetails (
IN PAGE_TABLE_LIB_PAGING_CONTEXT_DATA *PagingContextData,
OUT UINTN **PageTableBase OPTIONAL,
OUT UINT32 **Attributes OPTIONAL
)
{
if (PageTableBase != NULL) {
*PageTableBase = &PagingContextData->X64.PageTableBase;
}
if (Attributes != NULL) {
*Attributes = &PagingContextData->X64.Attributes;
}
}