mirror of https://github.com/acidanthera/audk.git
Fix thumb2 Branch instruction in disassembler
git-svn-id: https://edk2.svn.sourceforge.net/svnroot/edk2/trunk/edk2@9913 6f19259b-4bc3-4df7-8a09-765794883524
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@ -157,7 +157,7 @@ THUMB_INSTRUCTIONS gOpThumb2[] = {
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{ "B", 0xf0009000, 0xf800d000, B_T4 },
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{ "BL", 0xf000d000, 0xf800d000, B_T4 },
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{ "BLX", 0xf000c000, 0xf800d000, BL_T2 }
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// ADD POP PUSH STR(B)(D) LDR(B)(D) EOR MOV ADDS SUBS STM
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#if 0
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// 32-bit Thumb instructions op1 01
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@ -444,9 +444,9 @@ DisassembleThumbInstruction (
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for (Index = 0; Index < sizeof (gOpThumb2)/sizeof (THUMB_INSTRUCTIONS); Index++) {
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if ((OpCode32 & gOpThumb2[Index].Mask) == gOpThumb2[Index].OpCode) {
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if (Extended) {
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Offset = AsciiSPrint (Buf, Size, "0x%04x %-6a", OpCode32, gOpThumb2[Index].Start);
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Offset = AsciiSPrint (Buf, Size, "0x%04x %-6a", OpCode32, gOpThumb2[Index].Start);
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} else {
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Offset = AsciiSPrint (Buf, Size, " %-6a", gOpThumb2[Index].Start);
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Offset = AsciiSPrint (Buf, Size, " %-6a", gOpThumb2[Index].Start);
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}
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switch (gOpThumb2[Index].AddressMode) {
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case B_T3:
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@ -455,36 +455,36 @@ DisassembleThumbInstruction (
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Buf[Offset-4] = *Cond;
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// S:J2:J1:imm6:imm11:0
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Target = ((OpCode32 << 1) & 0xffe) + ((OpCode32 >> 4) & 0x3f000);
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Target |= (OpCode & BIT11) ? BIT18 : 0; // J2
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Target |= (OpCode & BIT13) ? BIT17 : 0; // J1
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Target |= (OpCode & BIT26) ? BIT19 : 0; // S
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Target = SignExtend32 (Target, BIT19);
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AsciiSPrint (&Buf[Offset], Size - Offset, " 0x%08x", Target);
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Target |= ((OpCode32 & BIT11) == BIT11)? BIT19 : 0; // J2
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Target |= ((OpCode32 & BIT13) == BIT13)? BIT18 : 0; // J1
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Target |= ((OpCode32 & BIT26) == BIT26)? BIT20 : 0; // S
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Target = SignExtend32 (Target, BIT20);
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AsciiSPrint (&Buf[Offset], Size - Offset, " 0x%08x", PC + 4 + Target);
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return;
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case B_T4:
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// S:I1:I2:imm10:imm11:0
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Target = ((OpCode32 << 1) & 0xffe) + ((OpCode32 >> 4) & 0x3ff000);
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S = (OpCode & BIT26);
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J1 = (OpCode & BIT13);
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J2 = (OpCode & BIT11);
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Target |= !(J2 ^ S) ? BIT21 : 0; // I2
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Target |= !(J1 ^ S) ? BIT22 : 0; // I1
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Target |= (OpCode & BIT26) ? BIT23 : 0; // S
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Target = SignExtend32 (Target, BIT23);
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AsciiSPrint (&Buf[Offset], Size - Offset, " 0x%08x", Target);
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S = (OpCode32 & BIT26) == BIT26;
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J1 = (OpCode32 & BIT13) == BIT13;
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J2 = (OpCode32 & BIT11) == BIT11;
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Target |= (!(J2 ^ S) ? BIT22 : 0); // I2
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Target |= (!(J1 ^ S) ? BIT23 : 0); // I1
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Target |= (S ? BIT24 : 0); // S
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Target = SignExtend32 (Target, BIT24);
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AsciiSPrint (&Buf[Offset], Size - Offset, " 0x%08x", PC + 4 + Target);
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return;
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case BL_T2:
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// S:I1:I2:imm10:imm11:0
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// S:I1:I2:imm10:imm11:00
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Target = ((OpCode32 << 2) & 0x1ffc) + ((OpCode32 >> 3) & 0x7fe000);
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S = (OpCode & BIT26);
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J1 = (OpCode & BIT13);
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J2 = (OpCode & BIT11);
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Target |= !(J2 ^ S) ? BIT22 : 0; // I2
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Target |= !(J1 ^ S) ? BIT23 : 0; // I1
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Target |= (OpCode & BIT26) ? BIT24 : 0; // S
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Target = SignExtend32 (Target, BIT24);
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AsciiSPrint (&Buf[Offset], Size - Offset, " 0x%08x", Target);
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S = (OpCode32 & BIT26) == BIT26;
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J1 = (OpCode32 & BIT13) == BIT13;
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J2 = (OpCode32 & BIT11) == BIT11;
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Target |= (!(J2 ^ S) ? BIT23 : 0); // I2
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Target |= (!(J1 ^ S) ? BIT24 : 0); // I1
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Target |= (S ? BIT25 : 0); // S
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Target = SignExtend32 (Target, BIT25);
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AsciiSPrint (&Buf[Offset], Size - Offset, " 0x%08x", PC + 4 + Target);
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return;
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}
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}
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