mirror of https://github.com/acidanthera/audk.git
Replace SetPower2 by EDKII baselib - GetPowerOfTwo64.
Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: "Yao, Jiewen" <Jiewen.Yao@intel.com> Reviewed-by: "Ma, Maurice" <Maurice.Ma@intel.com> git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@17222 6f19259b-4bc3-4df7-8a09-765794883524
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@ -1,6 +1,6 @@
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/** @file
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Copyright (c) 2014, Intel Corporation. All rights reserved.<BR>
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Copyright (c) 2014 - 2015, Intel Corporation. All rights reserved.<BR>
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This program and the accompanying materials
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are licensed and made available under the terms and conditions of the BSD License
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which accompanies this distribution. The full text of the license may be found at
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@ -17,17 +17,6 @@
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#include <Library/CacheAsRamLib.h>
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#include "CacheLibInternal.h"
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/**
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Calculate the maximum value which is a power of 2, but less the Input.
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@param[in] Input The number to pass in.
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@return The maximum value which is align to power of 2 and less the Input
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**/
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UINT32
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SetPower2 (
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IN UINT32 Input
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);
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/**
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Search the memory cache type for specific memory from MTRR.
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@ -236,11 +225,7 @@ Power2MaxMemory (
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//
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// Compute inital power of 2 size to return
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//
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if (RShiftU64(MemoryLength, 32)) {
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Result = LShiftU64((UINT64)SetPower2((UINT32) RShiftU64(MemoryLength, 32)), 32);
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} else {
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Result = (UINT64)SetPower2((UINT32)MemoryLength);
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}
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Result = GetPowerOfTwo64(MemoryLength);
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//
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// Special case base of 0 as all ranges are valid
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@ -295,37 +280,6 @@ CheckMtrrAlignment (
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return ShiftedBase % ShiftedSize;
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}
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/**
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Calculate the maximum value which is a power of 2, but less the Input.
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@param[in] Input The number to pass in.
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@return The maximum value which is align to power of 2 and less the Input.
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**/
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UINT32
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SetPower2 (
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IN UINT32 Input
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)
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{
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UINT32 Result;
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Result = 0;
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#if defined(__GCC__)
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asm("bsr %1, \
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%%eax; \
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bts %%eax, \
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%0;" :"=r"(Result) :
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"r"(Input)
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);
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#elif defined(_MSC_VER)
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_asm {
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bsr eax, Input
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bts Result, eax
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}
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#endif
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return Result;
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}
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/**
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Programs fixed MTRRs registers.
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