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ArmPlatformPkg/PL011UartLib: Check PID2 if FiFoDepth is zero 

PL011UartLib determines its FIFO depth based on the PID2 value but
the register PID2 is not mandatory as per the SBSA spec.
This change won't check PID2 if PcdUartDefaultReceiveFifoDepth is set
to a value > 0.

Signed-off-by: Irene Park <ipark@nvidia.com>
Reviewed-by: Ard Biesheuvel <ard.biesheuvel@arm.com>
This commit is contained in:
Irene Park 2020-06-09 13:56:31 -04:00 committed by mergify[bot]
parent 00217f1919
commit c8edb70945
2 changed files with 8 additions and 3 deletions
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10
ArmPlatformPkg/Library/PL011UartLib/PL011UartLib.c
View File

@ -78,10 +78,14 @@ PL011UartInitializePort (
UINT32 Integer; UINT32 Integer;
UINT32 Fractional; UINT32 Fractional;
UINT32 HardwareFifoDepth; UINT32 HardwareFifoDepth;
UINT32 UartPid2;
HardwareFifoDepth = FixedPcdGet16 (PcdUartDefaultReceiveFifoDepth);
if (HardwareFifoDepth == 0) {
UartPid2 = MmioRead32 (UartBase + UARTPID2);
HardwareFifoDepth = (PL011_UARTPID2_VER (UartPid2) > PL011_VER_R1P4) ? 32 : 16;
}
HardwareFifoDepth = (PL011_UARTPID2_VER (MmioRead32 (UartBase + UARTPID2)) \
> PL011_VER_R1P4) \
? 32 : 16 ;
// The PL011 supports a buffer of 1, 16 or 32 chars. Therefore we can accept // The PL011 supports a buffer of 1, 16 or 32 chars. Therefore we can accept
// 1 char buffer as the minimum FIFO size. Because everything can be rounded // 1 char buffer as the minimum FIFO size. Because everything can be rounded
// down, there is no maximum FIFO size. // down, there is no maximum FIFO size.

1
ArmPlatformPkg/Library/PL011UartLib/PL011UartLib.inf
View File

@ -30,6 +30,7 @@
ArmPlatformPkg/ArmPlatformPkg.dec ArmPlatformPkg/ArmPlatformPkg.dec
[FixedPcd] [FixedPcd]
gEfiMdePkgTokenSpaceGuid.PcdUartDefaultReceiveFifoDepth
gEfiMdeModulePkgTokenSpaceGuid.PcdSerialBaudRate gEfiMdeModulePkgTokenSpaceGuid.PcdSerialBaudRate
gArmPlatformTokenSpaceGuid.PL011UartInteger gArmPlatformTokenSpaceGuid.PL011UartInteger