mirror of https://github.com/acidanthera/audk.git
MdePkg/PciExpress: Add macro PCI_ECAM_ADDRESS
The patch adds new macro PCI_ECAM_ADDRESS into PciExpress21.h, to align to the PCIE spec, and also update PciExpressLib.h to redirect PCI_EXPRESS_LIB_ADDRESS to the new macro. Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Ruiyu Ni <ruiyu.ni@intel.com> Reviewed-by: Liming Gao <liming.gao@intel.com>
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/** @file
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/** @file
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Support for the latest PCI standard.
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Support for the latest PCI standard.
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Copyright (c) 2006 - 2016, Intel Corporation. All rights reserved.<BR>
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Copyright (c) 2006 - 2017, Intel Corporation. All rights reserved.<BR>
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(C) Copyright 2016 Hewlett Packard Enterprise Development LP<BR>
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(C) Copyright 2016 Hewlett Packard Enterprise Development LP<BR>
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This program and the accompanying materials
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This program and the accompanying materials
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are licensed and made available under the terms and conditions of the BSD License
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are licensed and made available under the terms and conditions of the BSD License
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#include <IndustryStandard/Pci30.h>
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#include <IndustryStandard/Pci30.h>
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/**
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Macro that converts PCI Bus, PCI Device, PCI Function and PCI Register to an
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ECAM (Enhanced Configuration Access Mechanism) address. The unused upper bits
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of Bus, Device, Function and Register are stripped prior to the generation of
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the address.
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@param Bus PCI Bus number. Range 0..255.
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@param Device PCI Device number. Range 0..31.
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@param Function PCI Function number. Range 0..7.
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@param Register PCI Register number. Range 0..4095.
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@return The encode ECAM address.
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**/
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#define PCI_ECAM_ADDRESS(Bus,Device,Function,Offset) \
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(((Offset) & 0xfff) | (((Function) & 0x07) << 12) | (((Device) & 0x1f) << 15) | (((Bus) & 0xff) << 20))
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#pragma pack(1)
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#pragma pack(1)
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///
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///
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/// PCI Express Capability Structure
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/// PCI Express Capability Structure
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@ -5,7 +5,7 @@
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configuration cycles must be through the 256 MB PCI Express MMIO window whose base address
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configuration cycles must be through the 256 MB PCI Express MMIO window whose base address
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is defined by PcdPciExpressBaseAddress.
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is defined by PcdPciExpressBaseAddress.
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Copyright (c) 2006 - 2012, Intel Corporation. All rights reserved.<BR>
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Copyright (c) 2006 - 2017, Intel Corporation. All rights reserved.<BR>
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This program and the accompanying materials
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This program and the accompanying materials
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are licensed and made available under the terms and conditions of the BSD License
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are licensed and made available under the terms and conditions of the BSD License
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which accompanies this distribution. The full text of the license may be found at
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which accompanies this distribution. The full text of the license may be found at
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@ -35,8 +35,7 @@ WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
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@return The encode PCI address.
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@return The encode PCI address.
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**/
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**/
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#define PCI_EXPRESS_LIB_ADDRESS(Bus,Device,Function,Offset) \
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#define PCI_EXPRESS_LIB_ADDRESS(Bus,Device,Function,Offset) PCI_ECAM_ADDRESS ((Bus), (Device), (Function), (Offset))
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(((Offset) & 0xfff) | (((Function) & 0x07) << 12) | (((Device) & 0x1f) << 15) | (((Bus) & 0xff) << 20))
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/**
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/**
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Registers a PCI device so PCI configuration registers may be accessed after
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Registers a PCI device so PCI configuration registers may be accessed after
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