From caecffd105b6cbd5e5f6f09c3200df205e0a0a12 Mon Sep 17 00:00:00 2001
From: vanjeff <vanjeff@6f19259b-4bc3-4df7-8a09-765794883524>
Date: Tue, 17 Apr 2007 13:31:47 +0000
Subject: [PATCH] 1. Fixed one bug in UpdateDataCheck(). 2. Reduce one time
 notify function calling. 3. Fix comments bug in resources degrade function.

git-svn-id: https://edk2.svn.sourceforge.net/svnroot/edk2/trunk/edk2@2573 6f19259b-4bc3-4df7-8a09-765794883524
---
 EdkModulePkg/Bus/Pci/PciBus/Dxe/PciLib.c      | 40 +++++++++++--------
 .../Bus/Pci/PciBus/Dxe/PciResourceSupport.c   |  2 +-
 2 files changed, 24 insertions(+), 18 deletions(-)

diff --git a/EdkModulePkg/Bus/Pci/PciBus/Dxe/PciLib.c b/EdkModulePkg/Bus/Pci/PciBus/Dxe/PciLib.c
index 1296836a30..1601a4d617 100644
--- a/EdkModulePkg/Bus/Pci/PciBus/Dxe/PciLib.c
+++ b/EdkModulePkg/Bus/Pci/PciBus/Dxe/PciLib.c
@@ -1892,14 +1892,13 @@ Returns:
     //
   }
 
+  //
+  // Notify the bus allocation phase is finished for the first time
+  //
+  NotifyPhase (PciResAlloc, EfiPciHostBridgeEndBusAllocation);
+
   if (FeaturePcdGet (PcdPciBusHotplugDeviceSupport)) {
 
-    //
-    // Notify the bus allocation phase is finished for the first time
-    //
-    NotifyPhase (PciResAlloc, EfiPciHostBridgeEndBusAllocation);
-
-
     if (gPciHotPlugInit != NULL) {
       //
       // Wait for all HPC initialized
@@ -1944,15 +1943,10 @@ Returns:
       }
 
       //
-      // Notify the bus allocation phase is to end
+      // Notify the bus allocation phase is to end for the 2nd time
       //
       NotifyPhase (PciResAlloc, EfiPciHostBridgeEndBusAllocation);
     }
-  } else {
-    //
-    // Notify the bus allocation phase is to end
-    //
-    NotifyPhase (PciResAlloc, EfiPciHostBridgeEndBusAllocation);
   }
 
   //
@@ -2215,7 +2209,9 @@ UpdateConfigData (
 {
   EFI_STATUS                    Status;
   EFI_PCI_REGISTER_VALUE_DATA   *PciRegisterData;
-  UINT64                        TempValue;
+  UINT32                        AndValue;
+  UINT32                        OrValue;
+  UINT32                        TempValue;
 
   //
   // check register value incompatibility
@@ -2224,17 +2220,27 @@ UpdateConfigData (
 
   if (Status == EFI_SUCCESS) {
 
+    AndValue = ((UINT32) PciRegisterData->AndValue) >> (((UINT8) Address & 0x3) * 8);
+    OrValue  = ((UINT32) PciRegisterData->OrValue)  >> (((UINT8) Address & 0x3) * 8);
+
     TempValue = * (UINT32 *) Buffer;
+    if (PciRegisterData->AndValue != VALUE_NOCARE) {
+      TempValue &= AndValue;
+    }
+    if (PciRegisterData->OrValue != VALUE_NOCARE) {
+      TempValue |= OrValue;
+    }
 
     switch (Width) {
     case EfiPciWidthUint8:
-      * (UINT8 *) Buffer = (UINT8) TempValue;
+      *(UINT8 *)Buffer = (UINT8) TempValue;
       break;
+
     case EfiPciWidthUint16:
-      * (UINT16 *) Buffer = (UINT16) TempValue;
+      *(UINT16 *)Buffer = (UINT16) TempValue;
       break;
     case EfiPciWidthUint32:
-      * (UINT32 *) Buffer = (UINT32) TempValue;
+      *(UINT32 *)Buffer = TempValue;
       break;
 
     default:
@@ -2366,7 +2372,7 @@ WriteConfigData (
           return Status;
         }
 
-        Data = Data >> ((1 << AccessWidth) * 8);
+        Data = RShiftU64 (Data, ((1 << AccessWidth) * 8));
 
         Stride = 1 << AccessWidth;
         AccessAddress += Stride;
diff --git a/EdkModulePkg/Bus/Pci/PciBus/Dxe/PciResourceSupport.c b/EdkModulePkg/Bus/Pci/PciBus/Dxe/PciResourceSupport.c
index cd781841a1..a6ae80f4c5 100644
--- a/EdkModulePkg/Bus/Pci/PciBus/Dxe/PciResourceSupport.c
+++ b/EdkModulePkg/Bus/Pci/PciBus/Dxe/PciResourceSupport.c
@@ -1010,7 +1010,7 @@ Returns:
 
   //
   // If bridge doesn't support Prefetchable
-  // memory64, degrade it to Mem64
+  // memory64, degrade it to Prefetchable memory32
   //
   if (!BridgeSupportResourceDecode (Bridge, EFI_BRIDGE_PMEM64_DECODE_SUPPORTED)) {
     MergeResourceTree (