mirror of https://github.com/acidanthera/audk.git
ArmPlatformPkg: Fix ARM RealView EB and VE builds
Tested with RVCTLINUX and ARMGCC toolchains. git-svn-id: https://edk2.svn.sourceforge.net/svnroot/edk2/trunk/edk2@12233 6f19259b-4bc3-4df7-8a09-765794883524
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@ -280,9 +280,9 @@ InitializeDebugAgent (
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// modules
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// modules
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if (InitFlag == DEBUG_AGENT_INIT_PREMEM_SEC) {
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if (InitFlag == DEBUG_AGENT_INIT_PREMEM_SEC) {
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//
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//
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// Get the PrePi or PrePeiCore module (defined as SEC type module)
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// Get the Sec or PrePeiCore module (defined as SEC type module)
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//
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//
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Status = GetFfsFile ((EFI_FIRMWARE_VOLUME_HEADER*)PcdGet32(PcdSecureFdBaseAddress), EFI_FV_FILETYPE_SECURITY_CORE, &FfsHeader);
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Status = GetFfsFile ((EFI_FIRMWARE_VOLUME_HEADER*)PcdGet32(PcdSecureFvBaseAddress), EFI_FV_FILETYPE_SECURITY_CORE, &FfsHeader);
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if (!EFI_ERROR(Status)) {
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if (!EFI_ERROR(Status)) {
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Status = GetImageContext (FfsHeader,&ImageContext);
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Status = GetImageContext (FfsHeader,&ImageContext);
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if (!EFI_ERROR(Status)) {
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if (!EFI_ERROR(Status)) {
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@ -42,21 +42,6 @@ ArmPlatformTrustzoneSupported (
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return FALSE;
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return FALSE;
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}
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}
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/**
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Initialize the Secure peripherals and memory regions
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If Trustzone is supported by your platform then this function makes the required initialization
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of the secure peripherals and memory regions.
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**/
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VOID
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ArmPlatformTrustzoneInit (
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VOID
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)
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{
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ASSERT(FALSE);
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}
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/**
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/**
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Remap the memory at 0x0
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Remap the memory at 0x0
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@ -87,20 +72,6 @@ ArmPlatformGetBootMode (
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return BOOT_WITH_FULL_CONFIGURATION;
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return BOOT_WITH_FULL_CONFIGURATION;
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}
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}
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/**
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Initialize controllers that must setup at the early stage
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Some peripherals must be initialized in Secure World.
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For example, some L2x0 requires to be initialized in Secure World
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**/
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VOID
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ArmPlatformSecInitialize (
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VOID
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) {
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// Do nothing yet
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}
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/**
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/**
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Initialize controllers that must setup in the normal world
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Initialize controllers that must setup in the normal world
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@ -32,6 +32,7 @@
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[Sources.common]
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[Sources.common]
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ArmRealViewEb.c
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ArmRealViewEb.c
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ArmRealViewEbSec.c
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ArmRealViewEbHelper.asm | RVCT
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ArmRealViewEbHelper.asm | RVCT
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ArmRealViewEbHelper.S | GCC
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ArmRealViewEbHelper.S | GCC
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ArmRealViewEbBoot.asm | RVCT
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ArmRealViewEbBoot.asm | RVCT
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@ -39,3 +40,6 @@
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[FeaturePcd]
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[FeaturePcd]
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gEmbeddedTokenSpaceGuid.PcdCacheEnable
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gEmbeddedTokenSpaceGuid.PcdCacheEnable
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[FixedPcd]
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gArmTokenSpaceGuid.PcdNormalFvBaseAddress
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@ -17,13 +17,17 @@
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#define _SP804_TIMER_H__
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#define _SP804_TIMER_H__
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// SP804 Timer constants
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// SP804 Timer constants
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#define SP804_TIMER_LOAD_REG 0x00
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// Note: The SP804 Timer module comprises two timers, Timer_0 and Timer_1
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#define SP804_TIMER_CURRENT_REG 0x04
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// These timers are identical and all their registers have an offset of 0x20
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#define SP804_TIMER_CONTROL_REG 0x08
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// i.e. SP804_TIMER_0_LOAD_REG = 0x00 and SP804_TIMER_1_LOAD_REG = 0x20
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#define SP804_TIMER_INT_CLR_REG 0x0C
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// Therefore, define all registers only once and adjust the base addresses by 0x20
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#define SP804_TIMER_RAW_INT_STS_REG 0x10
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#define SP804_TIMER_LOAD_REG 0x00
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#define SP804_TIMER_MSK_INT_STS_REG 0x14
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#define SP804_TIMER_CURRENT_REG 0x04
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#define SP804_TIMER_BG_LOAD_REG 0x18
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#define SP804_TIMER_CONTROL_REG 0x08
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#define SP804_TIMER_INT_CLR_REG 0x0C
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#define SP804_TIMER_RAW_INT_STS_REG 0x10
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#define SP804_TIMER_MSK_INT_STS_REG 0x14
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#define SP804_TIMER_BG_LOAD_REG 0x18
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// Timer control register bit definitions
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// Timer control register bit definitions
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#define SP804_TIMER_CTRL_ONESHOT BIT0
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#define SP804_TIMER_CTRL_ONESHOT BIT0
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@ -36,6 +40,9 @@
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#define SP804_TIMER_CTRL_PERIODIC BIT6
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#define SP804_TIMER_CTRL_PERIODIC BIT6
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#define SP804_TIMER_CTRL_ENABLE BIT7
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#define SP804_TIMER_CTRL_ENABLE BIT7
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// Other SP804 Timer definitions
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#define SP804_MAX_TICKS 0xFFFFFFFF
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// SP810 System Controller constants
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// SP810 System Controller constants
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#define SP810_SYS_CTRL_REG 0x00
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#define SP810_SYS_CTRL_REG 0x00
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#define SP810_SYS_CTRL_TIMER0_TIMCLK BIT15 // 0=REFCLK, 1=TIMCLK
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#define SP810_SYS_CTRL_TIMER0_TIMCLK BIT15 // 0=REFCLK, 1=TIMCLK
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@ -43,4 +43,5 @@
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gArmPlatformTokenSpaceGuid.PcdPeiServicePtrGlobalOffset
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gArmPlatformTokenSpaceGuid.PcdPeiServicePtrGlobalOffset
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gArmPlatformTokenSpaceGuid.PcdCPUCoresNonSecStackBase
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gArmPlatformTokenSpaceGuid.PcdCPUCoresNonSecStackBase
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gArmPlatformTokenSpaceGuid.PcdCPUCoresNonSecStackSize
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gArmPlatformTokenSpaceGuid.PcdCPUCoresNonSecStackSize
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gArmPlatformTokenSpaceGuid.PcdPeiGlobalVariableSize
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