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Change function IpfFlushCacheRange() to AsmFlushCacheRange() follow the Mde_Lib_Spec 0.61k 

git-svn-id: https://edk2.svn.sourceforge.net/svnroot/edk2/trunk/edk2@6834 6f19259b-4bc3-4df7-8a09-765794883524
This commit is contained in:
gikidy 2008-12-04 06:52:09 +00:00
parent a694b670e1
commit cc39b88baa
3 changed files with 17 additions and 18 deletions
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20
MdePkg/Include/Library/BaseLib.h
View File

@ -3608,21 +3608,19 @@ EFIAPI
CpuDeadLoop (
VOID
);
#if defined (MDE_CPU_IPF)
/**
Flush a range of cache lines in the cache coherency domain of the calling
CPU.
Invalidates the cache lines specified by Address and Length. If Address is
not aligned on a cache line boundary, then entire cache line containing
Address is invalidated. If Address + Length is not aligned on a cache line
boundary, then the entire instruction cache line containing Address + Length
-1 is invalidated. This function may choose to invalidate the entire
instruction cache if that is more efficient than invalidating the specified
range. If Length is 0, the no instruction cache lines are invalidated.
Address is returned.
Flushes the cache lines specified by Address and Length. If Address is not aligned
on a cache line boundary, then entire cache line containing Address is flushed.
If Address + Length is not aligned on a cache line boundary, then the entire cache
line containing Address + Length - 1 is flushed. This function may choose to flush
the entire cache if that is more efficient than flushing the specified range. If
Length is 0, the no cache lines are flushed. Address is returned.
This function is only available on IPF.
If Length is greater than (MAX_ADDRESS - Address + 1), then ASSERT().
@ -3633,12 +3631,12 @@ CpuDeadLoop (
@param Length The number of bytes to invalidate from the instruction cache.
@return Address
@return Address.
**/
VOID *
EFIAPI
IpfFlushCacheRange (
AsmFlushCacheRange (
IN VOID *Address,
IN UINTN Length
);

8
MdePkg/Library/BaseCacheMaintenanceLib/IpfCache.c
View File

@ -68,7 +68,7 @@ InvalidateInstructionCacheRange (
)
{
ASSERT (Length <= MAX_ADDRESS - (UINTN)Address + 1);
return IpfFlushCacheRange (Address, Length);
return AsmFlushCacheRange (Address, Length);
}
/**
@ -125,7 +125,7 @@ WriteBackInvalidateDataCacheRange (
{
ASSERT (Length <= MAX_ADDRESS - (UINTN)Address + 1);
return IpfFlushCacheRange (Address, Length);
return AsmFlushCacheRange (Address, Length);
}
/**
@ -181,7 +181,7 @@ WriteBackDataCacheRange (
{
ASSERT (Length <= MAX_ADDRESS - (UINTN)Address + 1);
return IpfFlushCacheRange (Address, Length);
return AsmFlushCacheRange (Address, Length);
}
/**
@ -247,5 +247,5 @@ InvalidateDataCacheRange (
// Invalidation of a data cache range without writing back is not supported on
// IPF architecture, so write back and invalidate operation is performed.
//
return IpfFlushCacheRange (Address, Length);
return AsmFlushCacheRange (Address, Length);
}

7
MdePkg/Library/BaseLib/Ipf/FlushCacheRange.s
View File

@ -33,6 +33,7 @@
// invalidate the entire instruction cache if that is more efficient than
// invalidating the specified range. If Length is 0, the no instruction cache
// lines are invalidated. Address is returned.
// This function is only available on IPF.
//
// If Length is greater than (MAX_ADDRESS - Address + 1), then ASSERT().
//
@ -47,12 +48,12 @@
//
// VOID *
// EFIAPI
// IpfFlushCacheRange (
// AsmFlushCacheRange (
// IN VOID *Address,
// IN UINTN Length
// );
//
PROCEDURE_ENTRY (IpfFlushCacheRange)
PROCEDURE_ENTRY (AsmFlushCacheRange)
NESTED_SETUP (5,8,0,0)
@ -91,5 +92,5 @@ DoneFlushingC:
mov r8 = in0 // return *Address
NESTED_RETURN
PROCEDURE_EXIT (IpfFlushCacheRange)
PROCEDURE_EXIT (AsmFlushCacheRange)