OvmfPkg: extract some bits and port offsets common to Q35 and I440FX

The PMBA_RTE and ACPI_TIMER_OFFSET macros apply equally to both boards,
plus they are triplicated between the various AcpiTimerLib instances.
Define them centrally in "OvmfPlatforms.h".

Cc: Gabriel Somlo <somlo@cmu.edu>
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Laszlo Ersek <lersek@redhat.com>
Acked-by: Gabriel Somlo <somlo@cmu.edu>
Tested-by: Gabriel Somlo <somlo@cmu.edu>
Reviewed-by: Jordan Justen <jordan.l.justen@intel.com>

git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@17436 6f19259b-4bc3-4df7-8a09-765794883524
This commit is contained in:
Laszlo Ersek 2015-05-13 09:31:53 +00:00 committed by lersek
parent da37216768
commit cc5e0aa9ca
4 changed files with 10 additions and 30 deletions

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@ -27,4 +27,14 @@
#define OVMF_HOSTBRIDGE_DID \
PCI_LIB_ADDRESS (0, 0, 0, PCI_DEVICE_ID_OFFSET)
//
// Common bits in same-purpose registers
//
#define PMBA_RTE BIT0
//
// Common IO ports relative to the Power Management Base Address
//
#define ACPI_TIMER_OFFSET 0x8
#endif

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@ -18,16 +18,6 @@
#include <Library/PcdLib.h>
#include <OvmfPlatforms.h>
//
// Power Management PCI Configuration Register fields
//
#define PMBA_RTE BIT0
//
// Offset in the Power Management Base Address to the ACPI Timer
//
#define ACPI_TIMER_OFFSET 0x8
//
// Cached ACPI Timer IO Address
//

View File

@ -19,16 +19,6 @@
#include <Library/PcdLib.h>
#include <OvmfPlatforms.h>
//
// Power Management PCI Configuration Register fields
//
#define PMBA_RTE BIT0
//
// Offset in the Power Management Base Address to the ACPI Timer
//
#define ACPI_TIMER_OFFSET 0x8
/**
The constructor function enables ACPI IO space.

View File

@ -18,16 +18,6 @@
#include <Library/PciLib.h>
#include <OvmfPlatforms.h>
//
// Power Management PCI Configuration Register fields
//
#define PMBA_RTE BIT0
//
// Offset in the Power Management Base Address to the ACPI Timer
//
#define ACPI_TIMER_OFFSET 0x8
//
// Cached ACPI Timer IO Address
//