diff --git a/IntelFsp2Pkg/FspSecCore/SecFsp.c b/IntelFsp2Pkg/FspSecCore/SecFsp.c index 281d39a24b..c4d4d11687 100644 --- a/IntelFsp2Pkg/FspSecCore/SecFsp.c +++ b/IntelFsp2Pkg/FspSecCore/SecFsp.c @@ -53,7 +53,7 @@ SecGetPlatformData ( FSP_PLAT_DATA *FspPlatformData; UINT32 TopOfCar; UINT32 *StackPtr; - UINT32 DwordSize; + UINT32 DataSize; UINT32 TemporaryRamSize; FspPlatformData = &FspData->PlatformData; @@ -89,22 +89,21 @@ SecGetPlatformData ( // // This following data was pushed onto stack after TempRamInit API // - DwordSize = 4; - StackPtr = StackPtr - 1 - DwordSize; - CopyMem (&(FspPlatformData->MicrocodeRegionBase), StackPtr, (DwordSize << 2)); - StackPtr--; + DataSize = *(StackPtr); + DataSize = DataSize / sizeof (DataSize); + StackPtr -= DataSize; + CopyMem (&(FspPlatformData->MicrocodeRegionBase), StackPtr + 1, 4 * sizeof (UINTN)); } else if (*(StackPtr - 1) == FSP_PER0_SIGNATURE) { // // This is the performance data for InitTempMemory API entry/exit // - DwordSize = 4; - StackPtr = StackPtr - 1 - DwordSize; - CopyMem (FspData->PerfData, StackPtr, (DwordSize << 2)); + DataSize = *(StackPtr); + DataSize = DataSize / sizeof (DataSize); + StackPtr -= DataSize; + CopyMem (FspData->PerfData, StackPtr + 1, 2 * sizeof (UINT64)); // Copy from the end of the PER0 data ((UINT8 *)(&FspData->PerfData[0]))[7] = FSP_PERF_ID_API_TEMP_RAM_INIT_ENTRY; ((UINT8 *)(&FspData->PerfData[1]))[7] = FSP_PERF_ID_API_TEMP_RAM_INIT_EXIT; - - StackPtr--; } else { StackPtr -= (*StackPtr); } diff --git a/IntelFsp2Pkg/FspSecCore/X64/FspApiEntryT.nasm b/IntelFsp2Pkg/FspSecCore/X64/FspApiEntryT.nasm index f1c0673209..3e7a6400a2 100644 --- a/IntelFsp2Pkg/FspSecCore/X64/FspApiEntryT.nasm +++ b/IntelFsp2Pkg/FspSecCore/X64/FspApiEntryT.nasm @@ -30,7 +30,7 @@ extern ASM_PFX(SecCarInit) ; Define the data length that we saved on the stack top ; DATA_LEN_OF_PER0 EQU 18h -DATA_LEN_OF_MCUD EQU 18h +DATA_LEN_OF_MCUD EQU 28h DATA_LEN_AT_STACK_TOP EQU (DATA_LEN_OF_PER0 + DATA_LEN_OF_MCUD + 4) ;