mirror of https://github.com/acidanthera/audk.git
DynamicTablesPkg: Add Pci related objects
Introduce the following CmObj in the ArmNameSpaceObjects: - CM_ARM_PCI_ADDRESS_MAP_INFO - CM_ARM_PCI_INTERRUPT_MAP_INFO These objects allow to describe address range mapping of Pci busses and interrupt mapping of Pci devices. To: Sami Mujawar <sami.mujawar@arm.com> To: Alexei Fedorov <Alexei.Fedorov@arm.com> Signed-off-by: Pierre Gondois <Pierre.Gondois@arm.com> Reviewed-by: Sami Mujawar <sami.mujawar@arm.com>
This commit is contained in:
parent
69ddfee1c3
commit
ce306e48eb
|
@ -59,6 +59,8 @@ typedef enum ArmObjectID {
|
||||||
EArmObjSerialPortInfo, ///< 35 - Generic Serial Port Info
|
EArmObjSerialPortInfo, ///< 35 - Generic Serial Port Info
|
||||||
EArmObjCmn600Info, ///< 36 - CMN-600 Info
|
EArmObjCmn600Info, ///< 36 - CMN-600 Info
|
||||||
EArmObjLpiInfo, ///< 37 - Lpi Info
|
EArmObjLpiInfo, ///< 37 - Lpi Info
|
||||||
|
EArmObjPciAddressMapInfo, ///< 38 - Pci Address Map Info
|
||||||
|
EArmObjPciInterruptMapInfo, ///< 39 - Pci Interrupt Map Info
|
||||||
EArmObjMax
|
EArmObjMax
|
||||||
} EARM_OBJECT_ID;
|
} EARM_OBJECT_ID;
|
||||||
|
|
||||||
|
@ -423,16 +425,24 @@ typedef struct CmArmGenericWatchdogInfo {
|
||||||
*/
|
*/
|
||||||
typedef struct CmArmPciConfigSpaceInfo {
|
typedef struct CmArmPciConfigSpaceInfo {
|
||||||
/// The physical base address for the PCI segment
|
/// The physical base address for the PCI segment
|
||||||
UINT64 BaseAddress;
|
UINT64 BaseAddress;
|
||||||
|
|
||||||
/// The PCI segment group number
|
/// The PCI segment group number
|
||||||
UINT16 PciSegmentGroupNumber;
|
UINT16 PciSegmentGroupNumber;
|
||||||
|
|
||||||
/// The start bus number
|
/// The start bus number
|
||||||
UINT8 StartBusNumber;
|
UINT8 StartBusNumber;
|
||||||
|
|
||||||
/// The end bus number
|
/// The end bus number
|
||||||
UINT8 EndBusNumber;
|
UINT8 EndBusNumber;
|
||||||
|
|
||||||
|
/// Optional field: Reference Token for address mapping.
|
||||||
|
/// Token identifying a CM_ARM_OBJ_REF structure.
|
||||||
|
CM_OBJECT_TOKEN AddressMapToken;
|
||||||
|
|
||||||
|
/// Optional field: Reference Token for interrupt mapping.
|
||||||
|
/// Token identifying a CM_ARM_OBJ_REF structure.
|
||||||
|
CM_OBJECT_TOKEN InterruptMapToken;
|
||||||
} CM_ARM_PCI_CONFIG_SPACE_INFO;
|
} CM_ARM_PCI_CONFIG_SPACE_INFO;
|
||||||
|
|
||||||
/** A structure that describes the
|
/** A structure that describes the
|
||||||
|
@ -667,6 +677,10 @@ typedef struct CmArmGenericInterrupt {
|
||||||
UINT32 Interrupt;
|
UINT32 Interrupt;
|
||||||
|
|
||||||
/// Flags
|
/// Flags
|
||||||
|
/// BIT0: 0: Interrupt is Level triggered
|
||||||
|
/// 1: Interrupt is Edge triggered
|
||||||
|
/// BIT1: 0: Interrupt is Active high
|
||||||
|
/// 1: Interrupt is Active low
|
||||||
UINT32 Flags;
|
UINT32 Flags;
|
||||||
} CM_ARM_GENERIC_INTERRUPT;
|
} CM_ARM_GENERIC_INTERRUPT;
|
||||||
|
|
||||||
|
@ -928,6 +942,70 @@ typedef struct CmArmLpiInfo {
|
||||||
CHAR8 StateName[16];
|
CHAR8 StateName[16];
|
||||||
} CM_ARM_LPI_INFO;
|
} CM_ARM_LPI_INFO;
|
||||||
|
|
||||||
|
/** A structure that describes a PCI Address Map.
|
||||||
|
|
||||||
|
The memory-ranges used by the PCI bus are described by this object.
|
||||||
|
|
||||||
|
ID: EArmObjPciAddressMapInfo
|
||||||
|
*/
|
||||||
|
typedef struct CmArmPciAddressMapInfo {
|
||||||
|
/** Pci address space code
|
||||||
|
|
||||||
|
Available values are:
|
||||||
|
- 0: Configuration Space
|
||||||
|
- 1: I/O Space
|
||||||
|
- 2: 32-bit-address Memory Space
|
||||||
|
- 3: 64-bit-address Memory Space
|
||||||
|
*/
|
||||||
|
UINT8 SpaceCode;
|
||||||
|
|
||||||
|
/// PCI address
|
||||||
|
UINT64 PciAddress;
|
||||||
|
|
||||||
|
/// Cpu address
|
||||||
|
UINT64 CpuAddress;
|
||||||
|
|
||||||
|
/// Address size
|
||||||
|
UINT64 AddressSize;
|
||||||
|
} CM_ARM_PCI_ADDRESS_MAP_INFO;
|
||||||
|
|
||||||
|
/** A structure that describes a PCI Interrupt Map.
|
||||||
|
|
||||||
|
The legacy PCI interrupts used by PCI devices are described by this object.
|
||||||
|
|
||||||
|
Cf Devicetree Specification - Release v0.3
|
||||||
|
s2.4.3 "Interrupt Nexus Properties"
|
||||||
|
|
||||||
|
ID: EArmObjPciInterruptMapInfo
|
||||||
|
*/
|
||||||
|
typedef struct CmArmPciInterruptMapInfo {
|
||||||
|
/// Pci Bus.
|
||||||
|
/// Value on 8 bits (max 255).
|
||||||
|
UINT8 PciBus;
|
||||||
|
|
||||||
|
/// Pci Bus.
|
||||||
|
/// Value on 5 bits (max 31).
|
||||||
|
UINT8 PciDevice;
|
||||||
|
|
||||||
|
/** PCI interrupt
|
||||||
|
|
||||||
|
ACPI bindings are used:
|
||||||
|
Cf. ACPI 6.4, s6.2.13 _PRT (PCI Routing Table):
|
||||||
|
"0-INTA, 1-INTB, 2-INTC, 3-INTD"
|
||||||
|
|
||||||
|
Device-tree bindings are shifted by 1:
|
||||||
|
"INTA=1, INTB=2, INTC=3, INTD=4"
|
||||||
|
*/
|
||||||
|
UINT8 PciInterrupt;
|
||||||
|
|
||||||
|
/** Interrupt controller interrupt.
|
||||||
|
|
||||||
|
Cf Devicetree Specification - Release v0.3
|
||||||
|
s2.4.3 "Interrupt Nexus Properties": "parent interrupt specifier"
|
||||||
|
*/
|
||||||
|
CM_ARM_GENERIC_INTERRUPT IntcInterrupt;
|
||||||
|
} CM_ARM_PCI_INTERRUPT_MAP_INFO;
|
||||||
|
|
||||||
#pragma pack()
|
#pragma pack()
|
||||||
|
|
||||||
#endif // ARM_NAMESPACE_OBJECTS_H_
|
#endif // ARM_NAMESPACE_OBJECTS_H_
|
||||||
|
|
|
@ -149,10 +149,12 @@ STATIC CONST CM_OBJ_PARSER CmArmGenericWatchdogInfoParser[] = {
|
||||||
/** A parser for EArmObjPciConfigSpaceInfo.
|
/** A parser for EArmObjPciConfigSpaceInfo.
|
||||||
*/
|
*/
|
||||||
STATIC CONST CM_OBJ_PARSER CmArmPciConfigSpaceInfoParser[] = {
|
STATIC CONST CM_OBJ_PARSER CmArmPciConfigSpaceInfoParser[] = {
|
||||||
{ "BaseAddress", 8, "0x%llx", NULL },
|
{ "BaseAddress", 8, "0x%llx", NULL },
|
||||||
{ "PciSegmentGroupNumber", 2, "0x%x", NULL },
|
{ "PciSegmentGroupNumber", 2, "0x%x", NULL },
|
||||||
{ "StartBusNumber", 1, "0x%x", NULL },
|
{ "StartBusNumber", 1, "0x%x", NULL },
|
||||||
{ "EndBusNumber", 1, "0x%x", NULL }
|
{ "EndBusNumber", 1, "0x%x", NULL },
|
||||||
|
{ "AddressMapToken", sizeof (CM_OBJECT_TOKEN), "0x%p", NULL },
|
||||||
|
{ "InterruptMapToken", sizeof (CM_OBJECT_TOKEN), "0x%p", NULL },
|
||||||
};
|
};
|
||||||
|
|
||||||
/** A parser for EArmObjHypervisorVendorIdentity.
|
/** A parser for EArmObjHypervisorVendorIdentity.
|
||||||
|
@ -401,6 +403,26 @@ STATIC CONST CM_OBJ_PARSER CmArmLpiInfoParser[] = {
|
||||||
{ "StateName", 16, "0x%a", NULL },
|
{ "StateName", 16, "0x%a", NULL },
|
||||||
};
|
};
|
||||||
|
|
||||||
|
/** A parser for EArmObjPciAddressMapInfo.
|
||||||
|
*/
|
||||||
|
STATIC CONST CM_OBJ_PARSER CmArmPciAddressMapInfoParser[] = {
|
||||||
|
{ "SpaceCode", 1, "%d", NULL },
|
||||||
|
{ "PciAddress", 8, "0x%llx", NULL },
|
||||||
|
{ "CpuAddress", 8, "0x%llx", NULL },
|
||||||
|
{ "AddressSize", 8, "0x%llx", NULL },
|
||||||
|
};
|
||||||
|
|
||||||
|
/** A parser for EArmObjPciInterruptMapInfo.
|
||||||
|
*/
|
||||||
|
STATIC CONST CM_OBJ_PARSER CmPciInterruptMapInfoParser[] = {
|
||||||
|
{ "PciBus", 1, "0x%x", NULL },
|
||||||
|
{ "PciDevice", 1, "0x%x", NULL },
|
||||||
|
{ "PciInterrupt", 1, "0x%x", NULL },
|
||||||
|
{ "IntcInterrupt", sizeof (CM_ARM_GENERIC_INTERRUPT),
|
||||||
|
NULL, NULL, CmArmGenericInterruptParser,
|
||||||
|
ARRAY_SIZE (CmArmGenericInterruptParser) },
|
||||||
|
};
|
||||||
|
|
||||||
/** A parser for Arm namespace objects.
|
/** A parser for Arm namespace objects.
|
||||||
*/
|
*/
|
||||||
STATIC CONST CM_OBJ_PARSER_ARRAY ArmNamespaceObjectParser[] = {
|
STATIC CONST CM_OBJ_PARSER_ARRAY ArmNamespaceObjectParser[] = {
|
||||||
|
@ -475,6 +497,10 @@ STATIC CONST CM_OBJ_PARSER_ARRAY ArmNamespaceObjectParser[] = {
|
||||||
ARRAY_SIZE (CmArmCmn600InfoParser) },
|
ARRAY_SIZE (CmArmCmn600InfoParser) },
|
||||||
{ "EArmObjLpiInfo", CmArmLpiInfoParser,
|
{ "EArmObjLpiInfo", CmArmLpiInfoParser,
|
||||||
ARRAY_SIZE (CmArmLpiInfoParser) },
|
ARRAY_SIZE (CmArmLpiInfoParser) },
|
||||||
|
{ "EArmObjPciAddressMapInfo", CmArmPciAddressMapInfoParser,
|
||||||
|
ARRAY_SIZE (CmArmPciAddressMapInfoParser) },
|
||||||
|
{ "EArmObjPciInterruptMapInfo", CmPciInterruptMapInfoParser,
|
||||||
|
ARRAY_SIZE (CmPciInterruptMapInfoParser) },
|
||||||
{ "EArmObjMax", NULL, 0 },
|
{ "EArmObjMax", NULL, 0 },
|
||||||
};
|
};
|
||||||
|
|
||||||
|
|
Loading…
Reference in New Issue