mirror of https://github.com/acidanthera/audk.git
DynamicTablesPkg: Add Pci related objects
Introduce the following CmObj in the ArmNameSpaceObjects: - CM_ARM_PCI_ADDRESS_MAP_INFO - CM_ARM_PCI_INTERRUPT_MAP_INFO These objects allow to describe address range mapping of Pci busses and interrupt mapping of Pci devices. To: Sami Mujawar <sami.mujawar@arm.com> To: Alexei Fedorov <Alexei.Fedorov@arm.com> Signed-off-by: Pierre Gondois <Pierre.Gondois@arm.com> Reviewed-by: Sami Mujawar <sami.mujawar@arm.com>
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@ -59,6 +59,8 @@ typedef enum ArmObjectID {
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EArmObjSerialPortInfo, ///< 35 - Generic Serial Port Info
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EArmObjCmn600Info, ///< 36 - CMN-600 Info
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EArmObjLpiInfo, ///< 37 - Lpi Info
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EArmObjPciAddressMapInfo, ///< 38 - Pci Address Map Info
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EArmObjPciInterruptMapInfo, ///< 39 - Pci Interrupt Map Info
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EArmObjMax
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} EARM_OBJECT_ID;
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@ -423,16 +425,24 @@ typedef struct CmArmGenericWatchdogInfo {
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*/
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typedef struct CmArmPciConfigSpaceInfo {
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/// The physical base address for the PCI segment
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UINT64 BaseAddress;
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UINT64 BaseAddress;
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/// The PCI segment group number
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UINT16 PciSegmentGroupNumber;
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UINT16 PciSegmentGroupNumber;
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/// The start bus number
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UINT8 StartBusNumber;
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UINT8 StartBusNumber;
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/// The end bus number
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UINT8 EndBusNumber;
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UINT8 EndBusNumber;
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/// Optional field: Reference Token for address mapping.
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/// Token identifying a CM_ARM_OBJ_REF structure.
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CM_OBJECT_TOKEN AddressMapToken;
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/// Optional field: Reference Token for interrupt mapping.
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/// Token identifying a CM_ARM_OBJ_REF structure.
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CM_OBJECT_TOKEN InterruptMapToken;
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} CM_ARM_PCI_CONFIG_SPACE_INFO;
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/** A structure that describes the
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@ -667,6 +677,10 @@ typedef struct CmArmGenericInterrupt {
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UINT32 Interrupt;
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/// Flags
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/// BIT0: 0: Interrupt is Level triggered
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/// 1: Interrupt is Edge triggered
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/// BIT1: 0: Interrupt is Active high
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/// 1: Interrupt is Active low
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UINT32 Flags;
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} CM_ARM_GENERIC_INTERRUPT;
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@ -928,6 +942,70 @@ typedef struct CmArmLpiInfo {
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CHAR8 StateName[16];
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} CM_ARM_LPI_INFO;
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/** A structure that describes a PCI Address Map.
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The memory-ranges used by the PCI bus are described by this object.
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ID: EArmObjPciAddressMapInfo
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*/
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typedef struct CmArmPciAddressMapInfo {
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/** Pci address space code
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Available values are:
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- 0: Configuration Space
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- 1: I/O Space
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- 2: 32-bit-address Memory Space
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- 3: 64-bit-address Memory Space
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*/
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UINT8 SpaceCode;
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/// PCI address
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UINT64 PciAddress;
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/// Cpu address
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UINT64 CpuAddress;
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/// Address size
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UINT64 AddressSize;
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} CM_ARM_PCI_ADDRESS_MAP_INFO;
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/** A structure that describes a PCI Interrupt Map.
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The legacy PCI interrupts used by PCI devices are described by this object.
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Cf Devicetree Specification - Release v0.3
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s2.4.3 "Interrupt Nexus Properties"
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ID: EArmObjPciInterruptMapInfo
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*/
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typedef struct CmArmPciInterruptMapInfo {
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/// Pci Bus.
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/// Value on 8 bits (max 255).
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UINT8 PciBus;
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/// Pci Bus.
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/// Value on 5 bits (max 31).
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UINT8 PciDevice;
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/** PCI interrupt
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ACPI bindings are used:
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Cf. ACPI 6.4, s6.2.13 _PRT (PCI Routing Table):
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"0-INTA, 1-INTB, 2-INTC, 3-INTD"
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Device-tree bindings are shifted by 1:
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"INTA=1, INTB=2, INTC=3, INTD=4"
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*/
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UINT8 PciInterrupt;
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/** Interrupt controller interrupt.
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Cf Devicetree Specification - Release v0.3
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s2.4.3 "Interrupt Nexus Properties": "parent interrupt specifier"
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*/
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CM_ARM_GENERIC_INTERRUPT IntcInterrupt;
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} CM_ARM_PCI_INTERRUPT_MAP_INFO;
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#pragma pack()
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#endif // ARM_NAMESPACE_OBJECTS_H_
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@ -149,10 +149,12 @@ STATIC CONST CM_OBJ_PARSER CmArmGenericWatchdogInfoParser[] = {
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/** A parser for EArmObjPciConfigSpaceInfo.
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*/
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STATIC CONST CM_OBJ_PARSER CmArmPciConfigSpaceInfoParser[] = {
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{ "BaseAddress", 8, "0x%llx", NULL },
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{ "PciSegmentGroupNumber", 2, "0x%x", NULL },
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{ "StartBusNumber", 1, "0x%x", NULL },
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{ "EndBusNumber", 1, "0x%x", NULL }
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{ "BaseAddress", 8, "0x%llx", NULL },
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{ "PciSegmentGroupNumber", 2, "0x%x", NULL },
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{ "StartBusNumber", 1, "0x%x", NULL },
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{ "EndBusNumber", 1, "0x%x", NULL },
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{ "AddressMapToken", sizeof (CM_OBJECT_TOKEN), "0x%p", NULL },
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{ "InterruptMapToken", sizeof (CM_OBJECT_TOKEN), "0x%p", NULL },
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};
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/** A parser for EArmObjHypervisorVendorIdentity.
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@ -401,6 +403,26 @@ STATIC CONST CM_OBJ_PARSER CmArmLpiInfoParser[] = {
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{ "StateName", 16, "0x%a", NULL },
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};
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/** A parser for EArmObjPciAddressMapInfo.
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*/
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STATIC CONST CM_OBJ_PARSER CmArmPciAddressMapInfoParser[] = {
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{ "SpaceCode", 1, "%d", NULL },
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{ "PciAddress", 8, "0x%llx", NULL },
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{ "CpuAddress", 8, "0x%llx", NULL },
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{ "AddressSize", 8, "0x%llx", NULL },
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};
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/** A parser for EArmObjPciInterruptMapInfo.
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*/
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STATIC CONST CM_OBJ_PARSER CmPciInterruptMapInfoParser[] = {
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{ "PciBus", 1, "0x%x", NULL },
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{ "PciDevice", 1, "0x%x", NULL },
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{ "PciInterrupt", 1, "0x%x", NULL },
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{ "IntcInterrupt", sizeof (CM_ARM_GENERIC_INTERRUPT),
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NULL, NULL, CmArmGenericInterruptParser,
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ARRAY_SIZE (CmArmGenericInterruptParser) },
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};
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/** A parser for Arm namespace objects.
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*/
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STATIC CONST CM_OBJ_PARSER_ARRAY ArmNamespaceObjectParser[] = {
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@ -475,6 +497,10 @@ STATIC CONST CM_OBJ_PARSER_ARRAY ArmNamespaceObjectParser[] = {
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ARRAY_SIZE (CmArmCmn600InfoParser) },
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{ "EArmObjLpiInfo", CmArmLpiInfoParser,
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ARRAY_SIZE (CmArmLpiInfoParser) },
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{ "EArmObjPciAddressMapInfo", CmArmPciAddressMapInfoParser,
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ARRAY_SIZE (CmArmPciAddressMapInfoParser) },
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{ "EArmObjPciInterruptMapInfo", CmPciInterruptMapInfoParser,
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ARRAY_SIZE (CmPciInterruptMapInfoParser) },
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{ "EArmObjMax", NULL, 0 },
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};
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