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ArmPlatformPkg/PrePi: Drop MPCore variant

Browse Source 
The PrePi SEC driver can be built in unicore and MPcore versions
from [mostly] the same source. The latter is obsolete, so remove it and
simplyify the remaining code accordingly.

Signed-off-by: Ard Biesheuvel <ardb@kernel.org>
This commit is contained in:
Ard Biesheuvel 2024-07-29 14:55:28 +02:00 committed by mergify[bot]
parent 4fc1c513f8
commit cee49c82d5
7 changed files with 8 additions and 295 deletions
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1
ArmPlatformPkg/ArmPlatformPkg.dsc
View File

@ -123,7 +123,6 @@
ArmPlatformPkg/PrePeiCore/PrePeiCoreMPCore.inf ArmPlatformPkg/PrePeiCore/PrePeiCoreMPCore.inf
ArmPlatformPkg/PrePeiCore/PrePeiCoreUniCore.inf ArmPlatformPkg/PrePeiCore/PrePeiCoreUniCore.inf
ArmPlatformPkg/PrePi/PeiMPCore.inf
ArmPlatformPkg/PrePi/PeiUniCore.inf ArmPlatformPkg/PrePi/PeiUniCore.inf
ArmPlatformPkg/Library/ArmMaliDp/ArmMaliDp.inf ArmPlatformPkg/Library/ArmMaliDp/ArmMaliDp.inf

104
ArmPlatformPkg/PrePi/MainMPCore.c
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@ -1,104 +0,0 @@
/** @file
Copyright (c) 2011-2014, ARM Limited. All rights reserved.
SPDX-License-Identifier: BSD-2-Clause-Patent
**/
#include "PrePi.h"
#include <Library/ArmGicLib.h>
#include <Ppi/ArmMpCoreInfo.h>
VOID
PrimaryMain (
IN UINTN UefiMemoryBase,
IN UINTN StacksBase,
IN UINT64 StartTimeStamp
)
{
// Enable the GIC Distributor
ArmGicEnableDistributor (PcdGet64 (PcdGicDistributorBase));
// In some cases, the secondary cores are waiting for an SGI from the next stage boot loader to resume their initialization
if (!FixedPcdGet32 (PcdSendSgiToBringUpSecondaryCores)) {
// Sending SGI to all the Secondary CPU interfaces
ArmGicSendSgiTo (PcdGet64 (PcdGicDistributorBase), ARM_GIC_ICDSGIR_FILTER_EVERYONEELSE, 0x0E, PcdGet32 (PcdGicSgiIntId));
}
PrePiMain (UefiMemoryBase, StacksBase, StartTimeStamp);
// We must never return
ASSERT (FALSE);
}
VOID
SecondaryMain (
IN UINTN MpId
)
{
EFI_STATUS Status;
ARM_MP_CORE_INFO_PPI *ArmMpCoreInfoPpi;
UINTN Index;
UINTN ArmCoreCount;
ARM_CORE_INFO *ArmCoreInfoTable;
UINT32 ClusterId;
UINT32 CoreId;
VOID (*SecondaryStart)(
VOID
);
UINTN SecondaryEntryAddr;
UINTN AcknowledgeInterrupt;
UINTN InterruptId;
ClusterId = GET_CLUSTER_ID (MpId);
CoreId = GET_CORE_ID (MpId);
// On MP Core Platform we must implement the ARM MP Core Info PPI (gArmMpCoreInfoPpiGuid)
Status = GetPlatformPpi (&gArmMpCoreInfoPpiGuid, (VOID **)&ArmMpCoreInfoPpi);
ASSERT_EFI_ERROR (Status);
ArmCoreCount = 0;
Status = ArmMpCoreInfoPpi->GetMpCoreInfo (&ArmCoreCount, &ArmCoreInfoTable);
ASSERT_EFI_ERROR (Status);
// Find the core in the ArmCoreTable
for (Index = 0; Index < ArmCoreCount; Index++) {
if ((GET_MPIDR_AFF1 (ArmCoreInfoTable[Index].Mpidr) == ClusterId) &&
(GET_MPIDR_AFF0 (ArmCoreInfoTable[Index].Mpidr) == CoreId))
{
break;
}
}
// The ARM Core Info Table must define every core
ASSERT (Index != ArmCoreCount);
// Clear Secondary cores MailBox
MmioWrite32 (ArmCoreInfoTable[Index].MailboxClearAddress, ArmCoreInfoTable[Index].MailboxClearValue);
do {
ArmCallWFI ();
// Read the Mailbox
SecondaryEntryAddr = MmioRead32 (ArmCoreInfoTable[Index].MailboxGetAddress);
// Acknowledge the interrupt and send End of Interrupt signal.
AcknowledgeInterrupt = ArmGicAcknowledgeInterrupt (PcdGet64 (PcdGicInterruptInterfaceBase), &InterruptId);
// Check if it is a valid interrupt ID
if (InterruptId < ArmGicGetMaxNumInterrupts (PcdGet64 (PcdGicDistributorBase))) {
// Got a valid SGI number hence signal End of Interrupt
ArmGicEndOfInterrupt (PcdGet64 (PcdGicInterruptInterfaceBase), AcknowledgeInterrupt);
}
} while (SecondaryEntryAddr == 0);
// Jump to secondary core entry point.
SecondaryStart = (VOID (*)()) SecondaryEntryAddr;
SecondaryStart ();
// The secondaries shouldn't reach here
ASSERT (FALSE);
}

31
ArmPlatformPkg/PrePi/MainUniCore.c
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@ -1,31 +0,0 @@
/** @file
Copyright (c) 2011, ARM Limited. All rights reserved.
SPDX-License-Identifier: BSD-2-Clause-Patent
**/
#include "PrePi.h"
VOID
PrimaryMain (
IN UINTN UefiMemoryBase,
IN UINTN StacksBase,
IN UINT64 StartTimeStamp
)
{
PrePiMain (UefiMemoryBase, StacksBase, StartTimeStamp);
// We must never return
ASSERT (FALSE);
}
VOID
SecondaryMain (
IN UINTN MpId
)
{
// We must never get into this function on UniCore system
ASSERT (FALSE);
}

106
ArmPlatformPkg/PrePi/PeiMPCore.inf
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@ -1,106 +0,0 @@
#/** @file
#
# (C) Copyright 2015 Hewlett-Packard Development Company, L.P.<BR>
# Copyright (c) 2011-2017, ARM Ltd. All rights reserved.<BR>
#
# SPDX-License-Identifier: BSD-2-Clause-Patent
#
#**/
[Defines]
INF_VERSION = 1.30
BASE_NAME = ArmPlatformPrePiMPCore
FILE_GUID = d959e387-7b91-452c-90e0-a1dbac90ddb8
MODULE_TYPE = SEC
VERSION_STRING = 1.0
[Sources]
PrePi.h
PrePi.c
MainMPCore.c
[Sources.ARM]
Arm/ArchPrePi.c
Arm/ModuleEntryPoint.S | GCC
[Sources.AArch64]
AArch64/ArchPrePi.c
AArch64/ModuleEntryPoint.S
[Packages]
MdePkg/MdePkg.dec
MdeModulePkg/MdeModulePkg.dec
EmbeddedPkg/EmbeddedPkg.dec
ArmPkg/ArmPkg.dec
ArmPlatformPkg/ArmPlatformPkg.dec
[LibraryClasses]
BaseLib
CacheMaintenanceLib
DebugLib
DebugAgentLib
ArmLib
ArmGicLib
IoLib
TimerLib
SerialPortLib
ExtractGuidedSectionLib
LzmaDecompressLib
DebugAgentLib
PrePiLib
ArmPlatformLib
ArmPlatformStackLib
MemoryAllocationLib
HobLib
PrePiHobListPointerLib
PlatformPeiLib
MemoryInitPeiLib
[Ppis]
gArmMpCoreInfoPpiGuid
[Guids]
gArmMpCoreInfoGuid
gEfiFirmwarePerformanceGuid
[FeaturePcd]
gEmbeddedTokenSpaceGuid.PcdPrePiProduceMemoryTypeInformationHob
gArmPlatformTokenSpaceGuid.PcdSendSgiToBringUpSecondaryCores
[Pcd]
gEfiMdeModulePkgTokenSpaceGuid.PcdFirmwareVersionString
[FixedPcd]
gArmTokenSpaceGuid.PcdVFPEnabled
gArmTokenSpaceGuid.PcdFdBaseAddress
gArmTokenSpaceGuid.PcdFdSize
gArmTokenSpaceGuid.PcdFvBaseAddress
gArmTokenSpaceGuid.PcdFvSize
gArmPlatformTokenSpaceGuid.PcdCPUCorePrimaryStackSize
gArmPlatformTokenSpaceGuid.PcdCPUCoreSecondaryStackSize
gArmTokenSpaceGuid.PcdGicDistributorBase
gArmTokenSpaceGuid.PcdGicInterruptInterfaceBase
gArmTokenSpaceGuid.PcdGicSgiIntId
gArmTokenSpaceGuid.PcdSystemMemoryBase
gArmTokenSpaceGuid.PcdSystemMemorySize
gArmPlatformTokenSpaceGuid.PcdSystemMemoryUefiRegionSize
gArmPlatformTokenSpaceGuid.PcdCoreCount
gEmbeddedTokenSpaceGuid.PcdPrePiCpuIoSize
gEmbeddedTokenSpaceGuid.PcdMemoryTypeEfiACPIReclaimMemory
gEmbeddedTokenSpaceGuid.PcdMemoryTypeEfiACPIMemoryNVS
gEmbeddedTokenSpaceGuid.PcdMemoryTypeEfiReservedMemoryType
gEmbeddedTokenSpaceGuid.PcdMemoryTypeEfiRuntimeServicesData
gEmbeddedTokenSpaceGuid.PcdMemoryTypeEfiRuntimeServicesCode
gEmbeddedTokenSpaceGuid.PcdMemoryTypeEfiBootServicesCode
gEmbeddedTokenSpaceGuid.PcdMemoryTypeEfiBootServicesData
gEmbeddedTokenSpaceGuid.PcdMemoryTypeEfiLoaderCode
gEmbeddedTokenSpaceGuid.PcdMemoryTypeEfiLoaderData

1
ArmPlatformPkg/PrePi/PeiUniCore.inf
View File

@ -18,7 +18,6 @@
[Sources] [Sources]
PrePi.h PrePi.h
PrePi.c PrePi.c
MainUniCore.c
[Sources.ARM] [Sources.ARM]
Arm/ArchPrePi.c Arm/ArchPrePi.c

31
ArmPlatformPkg/PrePi/PrePi.c
View File

@ -108,14 +108,8 @@ PrePiMain (
Status = MemoryPeim (UefiMemoryBase, FixedPcdGet32 (PcdSystemMemoryUefiRegionSize)); Status = MemoryPeim (UefiMemoryBase, FixedPcdGet32 (PcdSystemMemoryUefiRegionSize));
ASSERT_EFI_ERROR (Status); ASSERT_EFI_ERROR (Status);
// Create the Stacks HOB (reserve the memory for all stacks) // Create the Stacks HOB
if (ArmIsMpCore ()) {
StacksSize = PcdGet32 (PcdCPUCorePrimaryStackSize) +
((FixedPcdGet32 (PcdCoreCount) - 1) * FixedPcdGet32 (PcdCPUCoreSecondaryStackSize));
} else {
StacksSize = PcdGet32 (PcdCPUCorePrimaryStackSize); StacksSize = PcdGet32 (PcdCPUCorePrimaryStackSize);
}
BuildStackHob (StacksBase, StacksSize); BuildStackHob (StacksBase, StacksSize);
// TODO: Call CpuPei as a library // TODO: Call CpuPei as a library
@ -177,7 +171,7 @@ CEntryPoint (
// Initialize the platform specific controllers // Initialize the platform specific controllers
ArmPlatformInitialize (MpId); ArmPlatformInitialize (MpId);
if (ArmPlatformIsPrimaryCore (MpId) && PerformanceMeasurementEnabled ()) { if (PerformanceMeasurementEnabled ()) {
// Initialize the Timer Library to setup the Timer HW controller // Initialize the Timer Library to setup the Timer HW controller
TimerConstructor (); TimerConstructor ();
// We cannot call yet the PerformanceLib because the HOB List has not been initialized // We cannot call yet the PerformanceLib because the HOB List has not been initialized
@ -193,31 +187,12 @@ CEntryPoint (
// Enable Instruction Caches on all cores. // Enable Instruction Caches on all cores.
ArmEnableInstructionCache (); ArmEnableInstructionCache ();
// Define the Global Variable region when we are not running in XIP
if (!IS_XIP ()) {
if (ArmPlatformIsPrimaryCore (MpId)) {
if (ArmIsMpCore ()) {
// Signal the Global Variable Region is defined (event: ARM_CPU_EVENT_DEFAULT)
ArmCallSEV ();
}
} else {
// Wait the Primary core has defined the address of the Global Variable region (event: ARM_CPU_EVENT_DEFAULT)
ArmCallWFE ();
}
}
// If not primary Jump to Secondary Main
if (ArmPlatformIsPrimaryCore (MpId)) {
InvalidateDataCacheRange ( InvalidateDataCacheRange (
(VOID *)UefiMemoryBase, (VOID *)UefiMemoryBase,
FixedPcdGet32 (PcdSystemMemoryUefiRegionSize) FixedPcdGet32 (PcdSystemMemoryUefiRegionSize)
); );
// Goto primary Main. PrePiMain (UefiMemoryBase, StacksBase, StartTimeStamp);
PrimaryMain (UefiMemoryBase, StacksBase, StartTimeStamp);
} else {
SecondaryMain (MpId);
}
// DXE Core should always load and never return // DXE Core should always load and never return
ASSERT (FALSE); ASSERT (FALSE);

19
ArmPlatformPkg/PrePi/PrePi.h
View File

@ -29,13 +29,6 @@ TimerConstructor (
VOID VOID
); );
VOID
PrePiMain (
IN UINTN UefiMemoryBase,
IN UINTN StacksBase,
IN UINT64 StartTimeStamp
);
EFI_STATUS EFI_STATUS
EFIAPI EFIAPI
MemoryPeim ( MemoryPeim (
@ -49,18 +42,6 @@ PlatformPeim (
VOID VOID
); );
VOID
PrimaryMain (
IN UINTN UefiMemoryBase,
IN UINTN StacksBase,
IN UINT64 StartTimeStamp
);
VOID
SecondaryMain (
IN UINTN MpId
);
// Either implemented by PrePiLib or by MemoryInitPei // Either implemented by PrePiLib or by MemoryInitPei
VOID VOID
BuildMemoryTypeInformationHob ( BuildMemoryTypeInformationHob (