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Introduce one PCD PcdCpuInitIpiDelayInMicroSeconds to specify the delay value after sending out INIT IPI instead of hard code 10 MicroSeconds. 

Its default value is 10 millisecond per IA32 manual.
Platform could customize this PCD value for performance requirement.

Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Jeff Fan <jeff.fan@intel.com>
Reviewed-by: Kinney, Michael <michael.d.kinney@intel.com>
 

git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@15650 6f19259b-4bc3-4df7-8a09-765794883524
This commit is contained in:
Jeff Fan 2014-07-10 02:12:27 +00:00 committed by vanjeff
parent 5039b444fe
commit cf1eb6e6f8
5 changed files with 15 additions and 8 deletions
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6
UefiCpuPkg/Library/BaseXApicLib/BaseXApicLib.c
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@ -3,7 +3,7 @@
This local APIC library instance supports xAPIC mode only. This local APIC library instance supports xAPIC mode only.
Copyright (c) 2010 - 2013, Intel Corporation. All rights reserved.<BR> Copyright (c) 2010 - 2014, Intel Corporation. All rights reserved.<BR>
This program and the accompanying materials This program and the accompanying materials
are licensed and made available under the terms and conditions of the BSD License are licensed and made available under the terms and conditions of the BSD License
which accompanies this distribution. The full text of the license may be found at which accompanies this distribution. The full text of the license may be found at
@ -438,7 +438,7 @@ SendInitSipiSipi (
ASSERT ((StartupRoutine & 0xfff) == 0); ASSERT ((StartupRoutine & 0xfff) == 0);
SendInitIpi (ApicId); SendInitIpi (ApicId);
MicroSecondDelay (10); MicroSecondDelay (PcdGet32(PcdCpuInitIpiDelayInMicroSeconds));
IcrLow.Uint32 = 0; IcrLow.Uint32 = 0;
IcrLow.Bits.Vector = (StartupRoutine >> 12); IcrLow.Bits.Vector = (StartupRoutine >> 12);
IcrLow.Bits.DeliveryMode = LOCAL_APIC_DELIVERY_MODE_STARTUP; IcrLow.Bits.DeliveryMode = LOCAL_APIC_DELIVERY_MODE_STARTUP;
@ -471,7 +471,7 @@ SendInitSipiSipiAllExcludingSelf (
ASSERT ((StartupRoutine & 0xfff) == 0); ASSERT ((StartupRoutine & 0xfff) == 0);
SendInitIpiAllExcludingSelf (); SendInitIpiAllExcludingSelf ();
MicroSecondDelay (10); MicroSecondDelay (PcdGet32(PcdCpuInitIpiDelayInMicroSeconds));
IcrLow.Uint32 = 0; IcrLow.Uint32 = 0;
IcrLow.Bits.Vector = (StartupRoutine >> 12); IcrLow.Bits.Vector = (StartupRoutine >> 12);
IcrLow.Bits.DeliveryMode = LOCAL_APIC_DELIVERY_MODE_STARTUP; IcrLow.Bits.DeliveryMode = LOCAL_APIC_DELIVERY_MODE_STARTUP;

4
UefiCpuPkg/Library/BaseXApicLib/BaseXApicLib.inf
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@ -3,7 +3,7 @@
# #
# This library instance supports xAPIC mode only. # This library instance supports xAPIC mode only.
# #
# Copyright (c) 2010 - 2012, Intel Corporation. All rights reserved.<BR> # Copyright (c) 2010 - 2014, Intel Corporation. All rights reserved.<BR>
# This program and the accompanying materials # This program and the accompanying materials
# are licensed and made available under the terms and conditions of the BSD License # are licensed and made available under the terms and conditions of the BSD License
# which accompanies this distribution. The full text of the license may be found at # which accompanies this distribution. The full text of the license may be found at
@ -41,3 +41,5 @@
TimerLib TimerLib
IoLib IoLib
[Pcd]
gUefiCpuPkgTokenSpaceGuid.PcdCpuInitIpiDelayInMicroSeconds

6
UefiCpuPkg/Library/BaseXApicX2ApicLib/BaseXApicX2ApicLib.c
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@ -4,7 +4,7 @@
This local APIC library instance supports x2APIC capable processors This local APIC library instance supports x2APIC capable processors
which have xAPIC and x2APIC modes. which have xAPIC and x2APIC modes.
Copyright (c) 2010 - 2013, Intel Corporation. All rights reserved.<BR> Copyright (c) 2010 - 2014, Intel Corporation. All rights reserved.<BR>
This program and the accompanying materials This program and the accompanying materials
are licensed and made available under the terms and conditions of the BSD License are licensed and made available under the terms and conditions of the BSD License
which accompanies this distribution. The full text of the license may be found at which accompanies this distribution. The full text of the license may be found at
@ -517,7 +517,7 @@ SendInitSipiSipi (
ASSERT ((StartupRoutine & 0xfff) == 0); ASSERT ((StartupRoutine & 0xfff) == 0);
SendInitIpi (ApicId); SendInitIpi (ApicId);
MicroSecondDelay (10); MicroSecondDelay (PcdGet32(PcdCpuInitIpiDelayInMicroSeconds));
IcrLow.Uint32 = 0; IcrLow.Uint32 = 0;
IcrLow.Bits.Vector = (StartupRoutine >> 12); IcrLow.Bits.Vector = (StartupRoutine >> 12);
IcrLow.Bits.DeliveryMode = LOCAL_APIC_DELIVERY_MODE_STARTUP; IcrLow.Bits.DeliveryMode = LOCAL_APIC_DELIVERY_MODE_STARTUP;
@ -550,7 +550,7 @@ SendInitSipiSipiAllExcludingSelf (
ASSERT ((StartupRoutine & 0xfff) == 0); ASSERT ((StartupRoutine & 0xfff) == 0);
SendInitIpiAllExcludingSelf (); SendInitIpiAllExcludingSelf ();
MicroSecondDelay (10); MicroSecondDelay (PcdGet32(PcdCpuInitIpiDelayInMicroSeconds));
IcrLow.Uint32 = 0; IcrLow.Uint32 = 0;
IcrLow.Bits.Vector = (StartupRoutine >> 12); IcrLow.Bits.Vector = (StartupRoutine >> 12);
IcrLow.Bits.DeliveryMode = LOCAL_APIC_DELIVERY_MODE_STARTUP; IcrLow.Bits.DeliveryMode = LOCAL_APIC_DELIVERY_MODE_STARTUP;

5
UefiCpuPkg/Library/BaseXApicX2ApicLib/BaseXApicX2ApicLib.inf
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@ -4,7 +4,7 @@
# This library instance supports x2APIC capable processors # This library instance supports x2APIC capable processors
# which have xAPIC and x2APIC modes. # which have xAPIC and x2APIC modes.
# #
# Copyright (c) 2010 - 2012, Intel Corporation. All rights reserved.<BR> # Copyright (c) 2010 - 2014, Intel Corporation. All rights reserved.<BR>
# This program and the accompanying materials # This program and the accompanying materials
# are licensed and made available under the terms and conditions of the BSD License # are licensed and made available under the terms and conditions of the BSD License
# which accompanies this distribution. The full text of the license may be found at # which accompanies this distribution. The full text of the license may be found at
@ -42,3 +42,6 @@
TimerLib TimerLib
IoLib IoLib
[Pcd]
gUefiCpuPkgTokenSpaceGuid.PcdCpuInitIpiDelayInMicroSeconds

2
UefiCpuPkg/UefiCpuPkg.dec
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@ -43,4 +43,6 @@
[PcdsFixedAtBuild, PcdsPatchableInModule] [PcdsFixedAtBuild, PcdsPatchableInModule]
gUefiCpuPkgTokenSpaceGuid.PcdCpuLocalApicBaseAddress|0xfee00000|UINT32|0x00000001 gUefiCpuPkgTokenSpaceGuid.PcdCpuLocalApicBaseAddress|0xfee00000|UINT32|0x00000001
## Specifies delay value in microseconds after sending out an INIT IPI
gUefiCpuPkgTokenSpaceGuid.PcdCpuInitIpiDelayInMicroSeconds|10000|UINT32|0x30000002