diff --git a/MdeModulePkg/Core/DxeIplPeim/X64/VirtualMemory.c b/MdeModulePkg/Core/DxeIplPeim/X64/VirtualMemory.c
index b0b814a780..5da703641e 100644
--- a/MdeModulePkg/Core/DxeIplPeim/X64/VirtualMemory.c
+++ b/MdeModulePkg/Core/DxeIplPeim/X64/VirtualMemory.c
@@ -377,7 +377,7 @@ Split2MPageTo4K (
   //
   // Fill in 2M page entry.
   //
-  *PageEntry2M = (UINT64)(UINTN)PageTableEntry | AddressEncMask | IA32_PG_P | IA32_PG_RW;
+  *PageEntry2M = (UINT64)(UINTN)PageTableEntry | AddressEncMask | IA32_PG_P | IA32_PG_RW | IA32_PG_U;
 
   PhysicalAddress4K = PhysicalAddress;
   for (IndexOfPageTableEntries = 0; IndexOfPageTableEntries < 512; IndexOfPageTableEntries++, PageTableEntry++, PhysicalAddress4K += SIZE_4KB) {
@@ -459,7 +459,7 @@ Split1GPageTo2M (
   //
   // Fill in 1G page entry.
   //
-  *PageEntry1G = (UINT64)(UINTN)PageDirectoryEntry | AddressEncMask | IA32_PG_P | IA32_PG_RW;
+  *PageEntry1G = (UINT64)(UINTN)PageDirectoryEntry | AddressEncMask | IA32_PG_P | IA32_PG_RW | IA32_PG_U;
 
   PhysicalAddress2M = PhysicalAddress;
   for (IndexOfPageDirectoryEntries = 0; IndexOfPageDirectoryEntries < 512; IndexOfPageDirectoryEntries++, PageDirectoryEntry++, PhysicalAddress2M += SIZE_2MB) {
@@ -591,6 +591,8 @@ SetPageTablePoolReadOnly (
                                    IA32_PG_P | IA32_PG_RW;
         if (Level > 2) {
           NewPageTable[EntryIndex] |= IA32_PG_PS;
+        } else {
+          NewPageTable[EntryIndex] |= IA32_PG_U;
         }
 
         PhysicalAddress += LevelSize[Level - 1];
@@ -861,9 +863,10 @@ CreateIdentityMappingPageTables (
       //
       // Make a PML5 Entry
       //
-      PageMapLevel5Entry->Uint64         = (UINT64)(UINTN)PageMapLevel4Entry | AddressEncMask;
-      PageMapLevel5Entry->Bits.ReadWrite = 1;
-      PageMapLevel5Entry->Bits.Present   = 1;
+      PageMapLevel5Entry->Uint64              = (UINT64)(UINTN)PageMapLevel4Entry | AddressEncMask;
+      PageMapLevel5Entry->Bits.ReadWrite      = 1;
+      PageMapLevel5Entry->Bits.UserSupervisor = 1;
+      PageMapLevel5Entry->Bits.Present        = 1;
       PageMapLevel5Entry++;
     }
 
@@ -881,9 +884,10 @@ CreateIdentityMappingPageTables (
       //
       // Make a PML4 Entry
       //
-      PageMapLevel4Entry->Uint64         = (UINT64)(UINTN)PageDirectoryPointerEntry | AddressEncMask;
-      PageMapLevel4Entry->Bits.ReadWrite = 1;
-      PageMapLevel4Entry->Bits.Present   = 1;
+      PageMapLevel4Entry->Uint64              = (UINT64)(UINTN)PageDirectoryPointerEntry | AddressEncMask;
+      PageMapLevel4Entry->Bits.ReadWrite      = 1;
+      PageMapLevel4Entry->Bits.UserSupervisor = 1;
+      PageMapLevel4Entry->Bits.Present        = 1;
 
       if (Page1GSupport) {
         PageDirectory1GEntry = (VOID *)PageDirectoryPointerEntry;
@@ -916,9 +920,10 @@ CreateIdentityMappingPageTables (
           //
           // Fill in a Page Directory Pointer Entries
           //
-          PageDirectoryPointerEntry->Uint64         = (UINT64)(UINTN)PageDirectoryEntry | AddressEncMask;
-          PageDirectoryPointerEntry->Bits.ReadWrite = 1;
-          PageDirectoryPointerEntry->Bits.Present   = 1;
+          PageDirectoryPointerEntry->Uint64              = (UINT64)(UINTN)PageDirectoryEntry | AddressEncMask;
+          PageDirectoryPointerEntry->Bits.ReadWrite      = 1;
+          PageDirectoryPointerEntry->Bits.UserSupervisor = 1;
+          PageDirectoryPointerEntry->Bits.Present        = 1;
 
           for (IndexOfPageDirectoryEntries = 0; IndexOfPageDirectoryEntries < 512; IndexOfPageDirectoryEntries++, PageDirectoryEntry++, PageAddress += SIZE_2MB) {
             if (ToSplitPageTable (PageAddress, SIZE_2MB, StackBase, StackSize, GhcbBase, GhcbSize)) {
diff --git a/MdeModulePkg/Core/DxeIplPeim/X64/VirtualMemory.h b/MdeModulePkg/Core/DxeIplPeim/X64/VirtualMemory.h
index 616ebe42b0..78f63cd623 100644
--- a/MdeModulePkg/Core/DxeIplPeim/X64/VirtualMemory.h
+++ b/MdeModulePkg/Core/DxeIplPeim/X64/VirtualMemory.h
@@ -145,6 +145,7 @@ typedef union {
 
 #define IA32_PG_P   BIT0
 #define IA32_PG_RW  BIT1
+#define IA32_PG_U   BIT2
 #define IA32_PG_PS  BIT7
 
 #define PAGING_PAE_INDEX_MASK  0x1FF
diff --git a/UefiCpuPkg/Library/CpuArchLib/CpuPageTable.c b/UefiCpuPkg/Library/CpuArchLib/CpuPageTable.c
index fb684de8a1..35ff6d9dbf 100644
--- a/UefiCpuPkg/Library/CpuArchLib/CpuPageTable.c
+++ b/UefiCpuPkg/Library/CpuArchLib/CpuPageTable.c
@@ -38,7 +38,7 @@
 #define IA32_PG_NX      BIT63
 
 #define PAGE_ATTRIBUTE_BITS             (IA32_PG_D | IA32_PG_A | IA32_PG_U | IA32_PG_RW | IA32_PG_P)
-#define PAGE_ATTRIBUTE_BITS_POST_SPLIT  (IA32_PG_RW | IA32_PG_P)
+#define PAGE_ATTRIBUTE_BITS_POST_SPLIT  (IA32_PG_RW | IA32_PG_P | IA32_PG_U)
 
 //
 // Bits 1, 2, 5, 6 are reserved in the IA32 PAE PDPTE
@@ -398,6 +398,10 @@ GetAttributesFromPageEntry (
     Attributes |= EFI_MEMORY_XP;
   }
 
+  if ((*PageEntry & IA32_PG_U) != 0) {
+    Attributes |= EFI_MEMORY_USER;
+  }
+
   return Attributes;
 }
 
@@ -1013,9 +1017,9 @@ RefreshGcdMemoryAttributesFromPaging (
   PageLength    = 0;
 
   if (IsExecuteDisableEnabled ()) {
-    Capabilities = EFI_MEMORY_RO | EFI_MEMORY_RP | EFI_MEMORY_XP;
+    Capabilities = EFI_MEMORY_RO | EFI_MEMORY_RP | EFI_MEMORY_XP | EFI_MEMORY_USER;
   } else {
-    Capabilities = EFI_MEMORY_RO | EFI_MEMORY_RP;
+    Capabilities = EFI_MEMORY_RO | EFI_MEMORY_RP | EFI_MEMORY_USER;
   }
 
   for (Index = 0; Index < NumberOfDescriptors; Index++) {