mirror of https://github.com/acidanthera/audk.git
OvmfPkg/AcpiTables/Dsdt.asl: report the PCI IO ranges set in FWDT
Based on SeaBIOS commit 2062f2ba by Gerd Hoffmann <kraxel@redhat.com>. v3: comments on FWDT fields Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Laszlo Ersek <lersek@redhat.com> Reviewed-by: Jordan Justen <jordan.l.justen@intel.com> git-svn-id: https://edk2.svn.sourceforge.net/svnroot/edk2/trunk/edk2@13576 6f19259b-4bc3-4df7-8a09-765794883524
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@ -36,7 +36,7 @@ DefinitionBlock ("Dsdt.aml", "DSDT", 1, "INTEL ", "OVMF ", 3) {
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//
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// BUS, I/O, and MMIO resources
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//
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Name (_CRS, ResourceTemplate () {
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Name (CRES, ResourceTemplate () {
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WORDBusNumber ( // Bus number resource (0); the bridge produces bus numbers for its subsequent buses
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ResourceProducer, // bit 0 of general flags is 1
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MinFixed, // Range is fixed
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@ -91,21 +91,102 @@ DefinitionBlock ("Dsdt.aml", "DSDT", 1, "INTEL ", "OVMF ", 3) {
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0x00020000 // Range Length
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)
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DWORDMEMORY ( // Descriptor for linear frame buffer video RAM
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DWORDMEMORY ( // Descriptor for 32-bit MMIO
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ResourceProducer, // bit 0 of general flags is 0
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PosDecode,
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MinFixed, // Range is fixed
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MaxFixed, // Range is Fixed
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Cacheable,
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NonCacheable,
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ReadWrite,
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0x00000000, // Granularity
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0xF8000000, // Min
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0xFFFBFFFF, // Max
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0x00000000, // Translation
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0x07FC0000 // Range Length
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0x07FC0000, // Range Length
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, // ResourceSourceIndex
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, // ResourceSource
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PW32 // DescriptorName
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)
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})
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Name (CR64, ResourceTemplate () {
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QWordMemory ( // Descriptor for 64-bit MMIO
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ResourceProducer, // bit 0 of general flags is 0
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PosDecode,
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MinFixed, // Range is fixed
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MaxFixed, // Range is Fixed
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Cacheable,
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ReadWrite,
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0x00000000, // Granularity
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0x8000000000, // Min
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0xFFFFFFFFFF, // Max
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0x00000000, // Translation
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0x8000000000, // Range Length
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, // ResourceSourceIndex
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, // ResourceSource
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PW64 // DescriptorName
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)
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})
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Method (_CRS, 0) {
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//
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// see the FIRMWARE_DATA structure in "OvmfPkg/AcpiPlatformDxe/Qemu.c"
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//
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External (FWDT, OpRegionObj)
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Field(FWDT, QWordAcc, NoLock, Preserve) {
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P0S, 64, // PciWindow32.Base
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P0E, 64, // PciWindow32.End
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P0L, 64, // PciWindow32.Length
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P1S, 64, // PciWindow64.Base
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P1E, 64, // PciWindow64.End
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P1L, 64 // PciWindow64.Length
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}
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Field(FWDT, DWordAcc, NoLock, Preserve) {
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P0SL, 32, // PciWindow32.Base, low 32 bits
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P0SH, 32, // PciWindow32.Base, high 32 bits
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P0EL, 32, // PciWindow32.End, low 32 bits
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P0EH, 32, // PciWindow32.End, high 32 bits
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P0LL, 32, // PciWindow32.Length, low 32 bits
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P0LH, 32, // PciWindow32.Length, high 32 bits
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P1SL, 32, // PciWindow64.Base, low 32 bits
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P1SH, 32, // PciWindow64.Base, high 32 bits
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P1EL, 32, // PciWindow64.End, low 32 bits
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P1EH, 32, // PciWindow64.End, high 32 bits
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P1LL, 32, // PciWindow64.Length, low 32 bits
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P1LH, 32 // PciWindow64.Length, high 32 bits
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}
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//
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// fixup 32-bit PCI IO window
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//
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CreateDWordField (CRES, \_SB.PCI0.PW32._MIN, PS32)
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CreateDWordField (CRES, \_SB.PCI0.PW32._MAX, PE32)
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CreateDWordField (CRES, \_SB.PCI0.PW32._LEN, PL32)
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Store (P0SL, PS32)
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Store (P0EL, PE32)
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Store (P0LL, PL32)
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If (LAnd (LEqual (P1SL, 0x00), LEqual (P1SH, 0x00))) {
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Return (CRES)
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} Else {
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//
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// fixup 64-bit PCI IO window
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//
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CreateQWordField (CR64, \_SB.PCI0.PW64._MIN, PS64)
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CreateQWordField (CR64, \_SB.PCI0.PW64._MAX, PE64)
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CreateQWordField (CR64, \_SB.PCI0.PW64._LEN, PL64)
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Store (P1S, PS64)
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Store (P1E, PE64)
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Store (P1L, PL64)
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//
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// add window and return result
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//
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ConcatenateResTemplate (CRES, CR64, Local0)
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Return (Local0)
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}
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}
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//
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// PCI Interrupt Routing Table - PIC Mode Only
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//
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