mirror of https://github.com/acidanthera/audk.git
MdePkg SmBios.h: Add SMBIOS 3.2.0 definitions
REF: https://bugzilla.tianocore.org/show_bug.cgi?id=1099 Add SMBIOS 3.2.0 definitions according to www.dmtf.org/sites/default/files/standards/documents/DSP0134_3.2.0.pdf. Processor Information (Type 4): - SMBIOSCR00163: add socket LGA2066 - SMBIOSCR00173: add Intel Core i9 - SMBIOSCR00176: add new processor sockets Port Connector Information (Type 8): - SMBIOSCR00168: add USB Type-C System Slots (Type 9): - SMBIOSCR00164: add "unavailable" to current usage field - SMBIOSCR00167: add support for PCIe bifurcation Memory Device (Type 17): - SMBIOSCR00162: add support for NVDIMMs - SMBIOSCR00166: extend support for NVDIMMs and add support for logical memory type - SMBIOSCR00172: rename "Configured Memory Clock Speed" to "Configured Memory Speed" - SMBIOSCR00174: add new memory technology value (Intel Persistent Memory, 3D XPoint) IPMI Device Information (Type 38): - SMBIOSCR00171: add SSIF Management Controller Host Interface (Type 42) - SMBIOSCR00175: fix structure data parsing issue V2: Add missing update to MISC_PORT_TYPE and SMBIOS_TABLE_TYPE9. Cc: Liming Gao <liming.gao@intel.com> Cc: Dandan Bi <dandan.bi@intel.com> Cc: Michael D Kinney <michael.d.kinney@intel.com> Contributed-under: TianoCore Contribution Agreement 1.1 Signed-off-by: Star Zeng <star.zeng@intel.com> Reviewed-by: Dandan Bi <dandan.bi@intel.com> Reviewed-by: Liming Gao <liming.gao@intel.com>
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@ -1,5 +1,5 @@
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/** @file
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Industry Standard Definitions of SMBIOS Table Specification v3.1.1.
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Industry Standard Definitions of SMBIOS Table Specification v3.2.0.
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Copyright (c) 2006 - 2018, Intel Corporation. All rights reserved.<BR>
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(C) Copyright 2015-2017 Hewlett Packard Enterprise Development LP<BR>
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@ -685,6 +685,7 @@ typedef enum {
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ProcessorFamilyzArchitecture = 0xCC,
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ProcessorFamilyIntelCoreI5 = 0xCD,
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ProcessorFamilyIntelCoreI3 = 0xCE,
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ProcessorFamilyIntelCoreI9 = 0xCF,
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ProcessorFamilyViaC7M = 0xD2,
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ProcessorFamilyViaC7D = 0xD3,
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ProcessorFamilyViaC7 = 0xD4,
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@ -806,7 +807,11 @@ typedef enum {
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ProcessorUpgradeSocketBGA1515 = 0x35,
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ProcessorUpgradeSocketLGA3647_1 = 0x36,
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ProcessorUpgradeSocketSP3 = 0x37,
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ProcessorUpgradeSocketSP3r2 = 0x38
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ProcessorUpgradeSocketSP3r2 = 0x38,
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ProcessorUpgradeSocketLGA2066 = 0x39,
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ProcessorUpgradeSocketBGA1392 = 0x3A,
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ProcessorUpgradeSocketBGA1510 = 0x3B,
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ProcessorUpgradeSocketBGA1528 = 0x3C
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} PROCESSOR_UPGRADE;
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///
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@ -1159,6 +1164,7 @@ typedef enum {
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PortConnectorTypeBNC = 0x20,
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PortConnectorType1394 = 0x21,
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PortConnectorTypeSasSata = 0x22,
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PortConnectorTypeUsbTypeC = 0x23,
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PortConnectorTypePC98 = 0xA0,
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PortConnectorTypePC98Hireso = 0xA1,
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PortConnectorTypePCH98 = 0xA2,
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@ -1205,6 +1211,8 @@ typedef enum {
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PortTypeNetworkPort = 0x1F,
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PortTypeSata = 0x20,
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PortTypeSas = 0x21,
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PortTypeMfdp = 0x22, ///< Multi-Function Display Port
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PortTypeThunderbolt = 0x23,
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PortType8251Compatible = 0xA0,
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PortType8251FifoCompatible = 0xA1,
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PortTypeOther = 0xFF
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@ -1314,10 +1322,11 @@ typedef enum {
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/// System Slots - Current Usage.
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///
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typedef enum {
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SlotUsageOther = 0x01,
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SlotUsageUnknown = 0x02,
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SlotUsageAvailable = 0x03,
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SlotUsageInUse = 0x04
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SlotUsageOther = 0x01,
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SlotUsageUnknown = 0x02,
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SlotUsageAvailable = 0x03,
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SlotUsageInUse = 0x04,
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SlotUsageUnavailable = 0x05
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} MISC_SLOT_USAGE;
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///
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@ -1350,9 +1359,20 @@ typedef struct {
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UINT8 PmeSignalSupported :1;
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UINT8 HotPlugDevicesSupported :1;
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UINT8 SmbusSignalSupported :1;
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UINT8 Reserved :5; ///< Set to 0.
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UINT8 BifurcationSupported :1;
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UINT8 Reserved :4; ///< Set to 0.
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} MISC_SLOT_CHARACTERISTICS2;
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///
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/// System Slots - Peer Segment/Bus/Device/Function/Width Groups
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///
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typedef struct {
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UINT16 SegmentGroupNum;
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UINT8 BusNum;
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UINT8 DevFuncNum;
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UINT8 DataBusWidth;
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} MISC_SLOT_PEER_GROUP;
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///
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/// System Slots (Type 9)
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///
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@ -1376,6 +1396,12 @@ typedef struct {
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UINT16 SegmentGroupNum;
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UINT8 BusNum;
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UINT8 DevFuncNum;
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//
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// Add for smbios 3.2
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//
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UINT8 DataBusWidth;
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UINT8 PeerGroupingCount;
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MISC_SLOT_PEER_GROUP PeerGroups[1];
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} SMBIOS_TABLE_TYPE9;
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///
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@ -1668,9 +1694,13 @@ typedef enum {
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MemoryTypeLpddr = 0x1B,
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MemoryTypeLpddr2 = 0x1C,
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MemoryTypeLpddr3 = 0x1D,
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MemoryTypeLpddr4 = 0x1E
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MemoryTypeLpddr4 = 0x1E,
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MemoryTypeLogicalNonVolatileDevice = 0x1F
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} MEMORY_DEVICE_TYPE;
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///
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/// Memory Device - Type Detail
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///
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typedef struct {
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UINT16 Reserved :1;
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UINT16 Other :1;
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@ -1690,6 +1720,41 @@ typedef struct {
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UINT16 LrDimm :1;
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} MEMORY_DEVICE_TYPE_DETAIL;
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///
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/// Memory Device - Memory Technology
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///
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typedef enum {
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MemoryTechnologyOther = 0x01,
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MemoryTechnologyUnknown = 0x02,
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MemoryTechnologyDram = 0x03,
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MemoryTechnologyNvdimmN = 0x04,
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MemoryTechnologyNvdimmF = 0x05,
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MemoryTechnologyNvdimmP = 0x06,
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MemoryTechnologyIntelPersistentMemory = 0x07
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} MEMORY_DEVICE_TECHNOLOGY;
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///
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/// Memory Device - Memory Operating Mode Capability
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///
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typedef union {
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///
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/// Individual bit fields
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///
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struct {
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UINT16 Reserved :1; ///< Set to 0.
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UINT16 Other :1;
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UINT16 Unknown :1;
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UINT16 VolatileMemory :1;
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UINT16 ByteAccessiblePersistentMemory :1;
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UINT16 BlockAccessiblePersistentMemory :1;
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UINT16 Reserved2 :10; ///< Set to 0.
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} Bits;
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///
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/// All bit fields as a 16-bit value
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///
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UINT16 Uint16;
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} MEMORY_DEVICE_OPERATING_MODE_CAPABILITY;
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///
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/// Memory Device (Type 17).
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///
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@ -1700,38 +1765,57 @@ typedef struct {
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/// socket is currently populated.
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///
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typedef struct {
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SMBIOS_STRUCTURE Hdr;
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UINT16 MemoryArrayHandle;
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UINT16 MemoryErrorInformationHandle;
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UINT16 TotalWidth;
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UINT16 DataWidth;
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UINT16 Size;
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UINT8 FormFactor; ///< The enumeration value from MEMORY_FORM_FACTOR.
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UINT8 DeviceSet;
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SMBIOS_TABLE_STRING DeviceLocator;
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SMBIOS_TABLE_STRING BankLocator;
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UINT8 MemoryType; ///< The enumeration value from MEMORY_DEVICE_TYPE.
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MEMORY_DEVICE_TYPE_DETAIL TypeDetail;
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UINT16 Speed;
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SMBIOS_TABLE_STRING Manufacturer;
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SMBIOS_TABLE_STRING SerialNumber;
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SMBIOS_TABLE_STRING AssetTag;
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SMBIOS_TABLE_STRING PartNumber;
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SMBIOS_STRUCTURE Hdr;
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UINT16 MemoryArrayHandle;
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UINT16 MemoryErrorInformationHandle;
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UINT16 TotalWidth;
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UINT16 DataWidth;
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UINT16 Size;
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UINT8 FormFactor; ///< The enumeration value from MEMORY_FORM_FACTOR.
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UINT8 DeviceSet;
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SMBIOS_TABLE_STRING DeviceLocator;
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SMBIOS_TABLE_STRING BankLocator;
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UINT8 MemoryType; ///< The enumeration value from MEMORY_DEVICE_TYPE.
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MEMORY_DEVICE_TYPE_DETAIL TypeDetail;
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UINT16 Speed;
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SMBIOS_TABLE_STRING Manufacturer;
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SMBIOS_TABLE_STRING SerialNumber;
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SMBIOS_TABLE_STRING AssetTag;
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SMBIOS_TABLE_STRING PartNumber;
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//
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// Add for smbios 2.6
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//
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UINT8 Attributes;
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UINT8 Attributes;
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//
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// Add for smbios 2.7
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//
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UINT32 ExtendedSize;
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UINT16 ConfiguredMemoryClockSpeed;
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UINT32 ExtendedSize;
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//
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// Keep using name "ConfiguredMemoryClockSpeed" for compatibility
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// although this field is renamed from "Configured Memory Clock Speed"
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// to "Configured Memory Speed" in smbios 3.2.0.
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//
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UINT16 ConfiguredMemoryClockSpeed;
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//
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// Add for smbios 2.8.0
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//
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UINT16 MinimumVoltage;
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UINT16 MaximumVoltage;
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UINT16 ConfiguredVoltage;
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UINT16 MinimumVoltage;
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UINT16 MaximumVoltage;
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UINT16 ConfiguredVoltage;
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//
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// Add for smbios 3.2.0
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//
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UINT8 MemoryTechnology; ///< The enumeration value from MEMORY_DEVICE_TECHNOLOGY
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MEMORY_DEVICE_OPERATING_MODE_CAPABILITY MemoryOperatingModeCapability;
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SMBIOS_TABLE_STRING FirwareVersion;
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UINT16 ModuleManufacturerID;
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UINT16 ModuleProductID;
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UINT16 MemorySubsystemControllerManufacturerID;
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UINT16 MemorySubsystemControllerProductID;
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UINT64 NonVolatileSize;
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UINT64 VolatileSize;
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UINT64 CacheSize;
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UINT64 LogicalSize;
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} SMBIOS_TABLE_TYPE17;
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///
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@ -2269,7 +2353,7 @@ typedef enum {
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IPMIDeviceInfoInterfaceTypeKCS = 0x01, ///< The Keyboard Controller Style.
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IPMIDeviceInfoInterfaceTypeSMIC = 0x02, ///< The Server Management Interface Chip.
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IPMIDeviceInfoInterfaceTypeBT = 0x03, ///< The Block Transfer
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IPMIDeviceInfoInterfaceTypeReserved = 0x04
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IPMIDeviceInfoInterfaceTypeSSIF = 0x04 ///< SMBus System Interface
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} BMC_INTERFACE_TYPE;
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///
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@ -2339,7 +2423,7 @@ typedef struct {
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UINT8 ReferencedOffset;
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SMBIOS_TABLE_STRING EntryString;
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UINT8 Value[1];
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}ADDITIONAL_INFORMATION_ENTRY;
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} ADDITIONAL_INFORMATION_ENTRY;
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///
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/// Additional Information (Type 40).
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@ -2425,8 +2509,9 @@ typedef enum{
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///
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typedef struct {
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SMBIOS_STRUCTURE Hdr;
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UINT8 InterfaceType; ///< The enumeration value from MC_HOST_INTERFACE_TYPE
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UINT8 MCHostInterfaceData[1]; ///< This field has a minimum of four bytes
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UINT8 InterfaceType; ///< The enumeration value from MC_HOST_INTERFACE_TYPE
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UINT8 InterfaceTypeSpecificDataLength;
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UINT8 InterfaceTypeSpecificData[4]; ///< This field has a minimum of four bytes
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} SMBIOS_TABLE_TYPE42;
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///
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