mirror of https://github.com/acidanthera/audk.git
Add new adding ATA related status code in PI 1.3 to definition and ATA modules.
Signed-off-by: Elvin Li <elvin.li@intel.com> Reviewed-by: Feng Tian <feng.tian@intel.com> git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@14535 6f19259b-4bc3-4df7-8a09-765794883524
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@ -1,7 +1,7 @@
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/** @file
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The file for AHCI mode of ATA host controller.
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Copyright (c) 2010 - 2012, Intel Corporation. All rights reserved.<BR>
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Copyright (c) 2010 - 2013, Intel Corporation. All rights reserved.<BR>
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This program and the accompanying materials
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are licensed and made available under the terms and conditions of the BSD License
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which accompanies this distribution. The full text of the license may be found at
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@ -1487,9 +1487,18 @@ AhciAtaSmartReturnStatusCheck (
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);
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if (EFI_ERROR (Status)) {
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REPORT_STATUS_CODE (
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EFI_ERROR_CODE | EFI_ERROR_MINOR,
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(EFI_IO_BUS_ATA_ATAPI | EFI_IOB_ATA_BUS_SMART_DISABLED)
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);
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return EFI_DEVICE_ERROR;
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}
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REPORT_STATUS_CODE (
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EFI_PROGRESS_CODE,
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(EFI_IO_BUS_ATA_ATAPI | EFI_IOB_ATA_BUS_SMART_ENABLE)
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);
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FisBaseAddr = (UINTN)AhciRegisters->AhciRFis + Port * sizeof (EFI_AHCI_RECEIVED_FIS);
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Value = *(UINT32 *) (FisBaseAddr + EFI_AHCI_D2H_FIS_OFFSET);
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@ -1503,12 +1512,19 @@ AhciAtaSmartReturnStatusCheck (
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// The threshold exceeded condition is not detected by the device
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//
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DEBUG ((EFI_D_INFO, "The S.M.A.R.T threshold exceeded condition is not detected\n"));
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REPORT_STATUS_CODE (
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EFI_PROGRESS_CODE,
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(EFI_IO_BUS_ATA_ATAPI | EFI_IOB_ATA_BUS_SMART_UNDERTHRESHOLD)
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);
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} else if ((LBAMid == 0xf4) && (LBAHigh == 0x2c)) {
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//
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// The threshold exceeded condition is detected by the device
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//
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DEBUG ((EFI_D_INFO, "The S.M.A.R.T threshold exceeded condition is detected\n"));
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REPORT_STATUS_CODE (
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EFI_PROGRESS_CODE,
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(EFI_IO_BUS_ATA_ATAPI | EFI_IOB_ATA_BUS_SMART_OVERTHRESHOLD)
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);
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}
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}
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@ -1549,11 +1565,21 @@ AhciAtaSmartSupport (
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//
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DEBUG ((EFI_D_INFO, "S.M.A.R.T feature is not supported at port [%d] PortMultiplier [%d]!\n",
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Port, PortMultiplier));
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REPORT_STATUS_CODE (
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EFI_ERROR_CODE | EFI_ERROR_MINOR,
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(EFI_IO_BUS_ATA_ATAPI | EFI_IOB_ATA_BUS_SMART_NOTSUPPORTED)
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);
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} else {
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//
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// Check if the feature is enabled. If not, then enable S.M.A.R.T.
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//
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if ((IdentifyData->AtaData.command_set_feature_enb_85 & 0x0001) != 0x0001) {
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REPORT_STATUS_CODE (
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EFI_PROGRESS_CODE,
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(EFI_IO_BUS_ATA_ATAPI | EFI_IOB_ATA_BUS_SMART_DISABLE)
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);
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ZeroMem (&AtaCommandBlock, sizeof (EFI_ATA_COMMAND_BLOCK));
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AtaCommandBlock.AtaCommand = ATA_CMD_SMART;
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@ -1,7 +1,7 @@
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/** @file
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Header file for AHCI mode of ATA host controller.
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Copyright (c) 2010 - 2012, Intel Corporation. All rights reserved.<BR>
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Copyright (c) 2010 - 2013, Intel Corporation. All rights reserved.<BR>
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This program and the accompanying materials
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are licensed and made available under the terms and conditions of the BSD License
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which accompanies this distribution. The full text of the license may be found at
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@ -2296,9 +2296,18 @@ IdeAtaSmartReturnStatusCheck (
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);
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if (EFI_ERROR (Status)) {
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REPORT_STATUS_CODE (
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EFI_ERROR_CODE | EFI_ERROR_MINOR,
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(EFI_IO_BUS_ATA_ATAPI | EFI_IOB_ATA_BUS_SMART_DISABLED)
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);
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return EFI_DEVICE_ERROR;
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}
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REPORT_STATUS_CODE (
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EFI_PROGRESS_CODE,
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(EFI_IO_BUS_ATA_ATAPI | EFI_IOB_ATA_BUS_SMART_ENABLE)
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);
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LBAMid = IdeReadPortB (Instance->PciIo, Instance->IdeRegisters[Channel].CylinderLsb);
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LBAHigh = IdeReadPortB (Instance->PciIo, Instance->IdeRegisters[Channel].CylinderMsb);
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@ -2307,12 +2316,19 @@ IdeAtaSmartReturnStatusCheck (
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// The threshold exceeded condition is not detected by the device
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//
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DEBUG ((EFI_D_INFO, "The S.M.A.R.T threshold exceeded condition is not detected\n"));
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REPORT_STATUS_CODE (
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EFI_PROGRESS_CODE,
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(EFI_IO_BUS_ATA_ATAPI | EFI_IOB_ATA_BUS_SMART_UNDERTHRESHOLD)
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);
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} else if ((LBAMid == 0xf4) && (LBAHigh == 0x2c)) {
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//
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// The threshold exceeded condition is detected by the device
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//
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DEBUG ((EFI_D_INFO, "The S.M.A.R.T threshold exceeded condition is detected\n"));
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REPORT_STATUS_CODE (
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EFI_PROGRESS_CODE,
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(EFI_IO_BUS_ATA_ATAPI | EFI_IOB_ATA_BUS_SMART_OVERTHRESHOLD)
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);
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}
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return EFI_SUCCESS;
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@ -2350,12 +2366,21 @@ IdeAtaSmartSupport (
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//
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DEBUG ((EFI_D_INFO, "S.M.A.R.T feature is not supported at [%a] channel [%a] device!\n",
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(Channel == 1) ? "secondary" : "primary", (Device == 1) ? "slave" : "master"));
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REPORT_STATUS_CODE (
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EFI_ERROR_CODE | EFI_ERROR_MINOR,
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(EFI_IO_BUS_ATA_ATAPI | EFI_IOB_ATA_BUS_SMART_NOTSUPPORTED)
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);
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} else {
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//
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// Check if the feature is enabled. If not, then enable S.M.A.R.T.
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//
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if ((IdentifyData->AtaData.command_set_feature_enb_85 & 0x0001) != 0x0001) {
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REPORT_STATUS_CODE (
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EFI_PROGRESS_CODE,
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(EFI_IO_BUS_ATA_ATAPI | EFI_IOB_ATA_BUS_SMART_DISABLE)
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);
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ZeroMem (&AtaCommandBlock, sizeof (EFI_ATA_COMMAND_BLOCK));
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AtaCommandBlock.AtaCommand = ATA_CMD_SMART;
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@ -1,7 +1,7 @@
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/** @file
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StatusCode related definitions in PI.
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Copyright (c) 2009 - 2011, Intel Corporation. All rights reserved.<BR>
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Copyright (c) 2009 - 2013, Intel Corporation. All rights reserved.<BR>
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This program and the accompanying materials are licensed and made available under
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the terms and conditions of the BSD License that accompanies this distribution.
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The full text of the license may be found at
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@ -596,7 +596,10 @@ typedef struct {
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//
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// IO Bus Class ATA/ATAPI Subclass Progress Code definitions.
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//
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#define EFI_IOB_ATA_BUS_SMART_ENABLE (EFI_SUBCLASS_SPECIFIC | 0x00000000)
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#define EFI_IOB_ATA_BUS_SMART_DISABLE (EFI_SUBCLASS_SPECIFIC | 0x00000001)
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#define EFI_IOB_ATA_BUS_SMART_OVERTHRESHOLD (EFI_SUBCLASS_SPECIFIC | 0x00000002)
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#define EFI_IOB_ATA_BUS_SMART_UNDERTHRESHOLD (EFI_SUBCLASS_SPECIFIC | 0x00000003)
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//
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// IO Bus Class FC Subclass Progress Code definitions.
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//
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@ -669,6 +672,8 @@ typedef struct {
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//
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// IO Bus Class ATA/ATAPI Subclass Error Code definitions.
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//
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#define EFI_IOB_ATA_BUS_SMART_NOTSUPPORTED (EFI_SUBCLASS_SPECIFIC | 0x00000000)
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#define EFI_IOB_ATA_BUS_SMART_DISABLED (EFI_SUBCLASS_SPECIFIC | 0x00000001)
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//
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// IO Bus Class FC Subclass Error Code definitions.
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