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UefiCpuPkg/CpuMpPei: Load microcode on BSP and APs
Add DetectMicrocode() to load microcode on BSP and APs. Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Jeff Fan <jeff.fan@intel.com> Reviewed-by: Feng Tian <feng.tian@intel.com> Reviewed-by: Jiewen Yao <jiewen.yao@intel.com> git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@18002 6f19259b-4bc3-4df7-8a09-765794883524
This commit is contained in:
Jeff Fan
vanjeff
parent
d32c7f6cab
commit
d1cf93333f
@ -119,9 +119,10 @@ ApCFunction (
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PeiCpuMpData->CpuData[NumApsExecuting].ApicId = GetInitialApicId ();
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PeiCpuMpData->CpuData[NumApsExecuting].Health.Uint32 = (UINT32) BistData;
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//
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// Sync BSP's Mtrr table to all wakeup APs
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// Sync BSP's Mtrr table to all wakeup APs and load microcode on APs.
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//
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MtrrSetAllMtrrs (&PeiCpuMpData->MtrrTable);
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MicrocodeDetect ();
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}
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//
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@ -288,7 +289,10 @@ CountProcessorNumber (
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IN PEI_CPU_MP_DATA *PeiCpuMpData
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)
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{
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//
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// Load Microcode on BSP
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//
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MicrocodeDetect ();
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//
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// Store BSP's MTRR setting
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//
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@ -19,6 +19,8 @@
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#include <Ppi/SecPlatformInformation.h>
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#include <Register/LocalApic.h>
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#include <Library/BaseLib.h>
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#include <Library/BaseMemoryLib.h>
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#include <Library/DebugLib.h>
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@ -31,6 +33,9 @@
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#include <Library/SynchronizationLib.h>
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#include <Library/TimerLib.h>
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#include <Library/UefiCpuLib.h>
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#include "Microcode.h"
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//
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// AP state
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//
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@ -30,6 +30,8 @@
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[Sources]
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CpuMpPei.h
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CpuMpPei.c
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Microcode.h
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Microcode.c
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[Sources.IA32]
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Ia32/MpEqu.inc
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@ -66,6 +68,8 @@
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gUefiCpuPkgTokenSpaceGuid.PcdCpuMaxLogicalProcessorNumber
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gUefiCpuPkgTokenSpaceGuid.PcdCpuApInitTimeOutInMicroSeconds
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gUefiCpuPkgTokenSpaceGuid.PcdCpuApStackSize
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gUefiCpuPkgTokenSpaceGuid.PcdCpuMicrocodePatchAddress
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gUefiCpuPkgTokenSpaceGuid.PcdCpuMicrocodePatchRegionSize
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[Depex]
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gEfiPeiMemoryDiscoveredPpiGuid
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200
UefiCpuPkg/CpuMpPei/Microcode.c
Normal file
200
UefiCpuPkg/CpuMpPei/Microcode.c
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@ -0,0 +1,200 @@
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/** @file
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Implementation of loading microcode on processors.
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Copyright (c) 2015, Intel Corporation. All rights reserved.<BR>
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This program and the accompanying materials
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are licensed and made available under the terms and conditions of the BSD License
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which accompanies this distribution. The full text of the license may be found at
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http://opensource.org/licenses/bsd-license.php
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THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
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WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
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**/
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#include "CpuMpPei.h"
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/**
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Get microcode update signature of currently loaded microcode update.
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@return Microcode signature.
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**/
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UINT32
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GetCurrentMicrocodeSignature (
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VOID
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)
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{
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UINT64 Signature;
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AsmWriteMsr64 (EFI_MSR_IA32_BIOS_SIGN_ID, 0);
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AsmCpuid (CPUID_VERSION_INFO, NULL, NULL, NULL, NULL);
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Signature = AsmReadMsr64 (EFI_MSR_IA32_BIOS_SIGN_ID);
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return (UINT32) RShiftU64 (Signature, 32);
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}
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/**
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Detect whether specified processor can find matching microcode patch and load it.
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**/
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VOID
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MicrocodeDetect (
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VOID
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)
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{
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UINT64 MicrocodePatchAddress;
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UINT64 MicrocodePatchRegionSize;
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UINT32 ExtendedTableLength;
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UINT32 ExtendedTableCount;
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EFI_CPU_MICROCODE_EXTENDED_TABLE *ExtendedTable;
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EFI_CPU_MICROCODE_EXTENDED_TABLE_HEADER *ExtendedTableHeader;
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EFI_CPU_MICROCODE_HEADER *MicrocodeEntryPoint;
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UINTN MicrocodeEnd;
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UINTN Index;
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UINT8 PlatformId;
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UINT32 RegEax;
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UINT32 LatestRevision;
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UINTN TotalSize;
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UINT32 CheckSum32;
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BOOLEAN CorrectMicrocode;
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INT32 CurrentSignature;
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MICROCODE_INFO MicrocodeInfo;
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ZeroMem (&MicrocodeInfo, sizeof (MICROCODE_INFO));
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MicrocodePatchAddress = PcdGet64 (PcdCpuMicrocodePatchAddress);
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MicrocodePatchRegionSize = PcdGet64 (PcdCpuMicrocodePatchRegionSize);
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if (MicrocodePatchRegionSize == 0) {
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//
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// There is no microcode patches
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//
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return;
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}
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ExtendedTableLength = 0;
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//
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// Here data of CPUID leafs have not been collected into context buffer, so
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// GetProcessorCpuid() cannot be used here to retrieve CPUID data.
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//
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AsmCpuid (CPUID_VERSION_INFO, &RegEax, NULL, NULL, NULL);
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//
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// The index of platform information resides in bits 50:52 of MSR IA32_PLATFORM_ID
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//
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PlatformId = (UINT8) AsmMsrBitFieldRead64 (EFI_MSR_IA32_PLATFORM_ID, 50, 52);
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LatestRevision = 0;
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MicrocodeEnd = (UINTN) (MicrocodePatchAddress + MicrocodePatchRegionSize);
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MicrocodeEntryPoint = (EFI_CPU_MICROCODE_HEADER *) (UINTN) MicrocodePatchAddress;
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do {
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//
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// Check if the microcode is for the Cpu and the version is newer
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// and the update can be processed on the platform
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//
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CorrectMicrocode = FALSE;
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if (MicrocodeEntryPoint->HeaderVersion == 0x1) {
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//
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// It is the microcode header. It is not the padding data between microcode patches
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// becasue the padding data should not include 0x00000001 and it should be the repeated
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// byte format (like 0xXYXYXYXY....).
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//
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if (MicrocodeEntryPoint->ProcessorId == RegEax &&
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MicrocodeEntryPoint->UpdateRevision > LatestRevision &&
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(MicrocodeEntryPoint->ProcessorFlags & (1 << PlatformId))
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) {
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if (MicrocodeEntryPoint->DataSize == 0) {
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CheckSum32 = CalculateSum32 ((UINT32 *)MicrocodeEntryPoint, 2048);
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} else {
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CheckSum32 = CalculateSum32 ((UINT32 *)MicrocodeEntryPoint, MicrocodeEntryPoint->DataSize + sizeof(EFI_CPU_MICROCODE_HEADER));
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}
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if (CheckSum32 == 0) {
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CorrectMicrocode = TRUE;
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}
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} else if ((MicrocodeEntryPoint->DataSize != 0) &&
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(MicrocodeEntryPoint->UpdateRevision > LatestRevision)) {
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ExtendedTableLength = MicrocodeEntryPoint->TotalSize - (MicrocodeEntryPoint->DataSize + sizeof (EFI_CPU_MICROCODE_HEADER));
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if (ExtendedTableLength != 0) {
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//
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// Extended Table exist, check if the CPU in support list
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//
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ExtendedTableHeader = (EFI_CPU_MICROCODE_EXTENDED_TABLE_HEADER *)((UINT8 *)(MicrocodeEntryPoint) + MicrocodeEntryPoint->DataSize + sizeof (EFI_CPU_MICROCODE_HEADER));
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//
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// Calculate Extended Checksum
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//
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if ((ExtendedTableLength % 4) == 0) {
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CheckSum32 = CalculateSum32 ((UINT32 *)ExtendedTableHeader, ExtendedTableLength);
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if (CheckSum32 == 0) {
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//
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// Checksum correct
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//
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ExtendedTableCount = ExtendedTableHeader->ExtendedSignatureCount;
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ExtendedTable = (EFI_CPU_MICROCODE_EXTENDED_TABLE *)(ExtendedTableHeader + 1);
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for (Index = 0; Index < ExtendedTableCount; Index ++) {
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CheckSum32 = CalculateSum32 ((UINT32 *)ExtendedTable, sizeof(EFI_CPU_MICROCODE_EXTENDED_TABLE));
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if (CheckSum32 == 0) {
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//
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// Verify Header
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//
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if ((ExtendedTable->ProcessorSignature == RegEax) &&
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(ExtendedTable->ProcessorFlag & (1 << PlatformId)) ) {
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//
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// Find one
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//
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CorrectMicrocode = TRUE;
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break;
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}
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}
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ExtendedTable ++;
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}
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}
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}
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}
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}
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} else {
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//
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// It is the padding data between the microcode patches for microcode patches alignment.
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// Because the microcode patch is the multiple of 1-KByte, the padding data should not
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// exist if the microcode patch alignment value is not larger than 1-KByte. So, the microcode
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// alignment value should be larger than 1-KByte. We could skip SIZE_1KB padding data to
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// find the next possible microcode patch header.
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//
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MicrocodeEntryPoint = (EFI_CPU_MICROCODE_HEADER *) (((UINTN) MicrocodeEntryPoint) + SIZE_1KB);
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continue;
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}
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//
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// Get the next patch.
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//
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if (MicrocodeEntryPoint->DataSize == 0) {
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TotalSize = 2048;
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} else {
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TotalSize = MicrocodeEntryPoint->TotalSize;
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}
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if (CorrectMicrocode) {
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LatestRevision = MicrocodeEntryPoint->UpdateRevision;
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MicrocodeInfo.MicrocodeData = (VOID *)((UINTN)MicrocodeEntryPoint + sizeof (EFI_CPU_MICROCODE_HEADER));
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MicrocodeInfo.MicrocodeSize = TotalSize;
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MicrocodeInfo.ProcessorId = RegEax;
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}
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MicrocodeEntryPoint = (EFI_CPU_MICROCODE_HEADER *) (((UINTN) MicrocodeEntryPoint) + TotalSize);
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} while (((UINTN) MicrocodeEntryPoint < MicrocodeEnd));
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if (LatestRevision > 0) {
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//
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// Get microcode update signature of currently loaded microcode update
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//
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CurrentSignature = GetCurrentMicrocodeSignature ();
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//
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// If no microcode update has been loaded, then trigger microcode load.
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//
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if (CurrentSignature == 0) {
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AsmWriteMsr64 (
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EFI_MSR_IA32_BIOS_UPDT_TRIG,
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(UINT64) (UINTN) MicrocodeInfo.MicrocodeData
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);
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MicrocodeInfo.Load = TRUE;
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} else {
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MicrocodeInfo.Load = FALSE;
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}
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}
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}
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68
UefiCpuPkg/CpuMpPei/Microcode.h
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68
UefiCpuPkg/CpuMpPei/Microcode.h
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@ -0,0 +1,68 @@
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/** @file
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Definitions for loading microcode on processors.
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Copyright (c) 2015, Intel Corporation. All rights reserved.<BR>
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This program and the accompanying materials
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are licensed and made available under the terms and conditions of the BSD License
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which accompanies this distribution. The full text of the license may be found at
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http://opensource.org/licenses/bsd-license.php
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THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
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WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
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**/
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#ifndef _CPU_MICROCODE_H_
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#define _CPU_MICROCODE_H_
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#define EFI_MSR_IA32_PLATFORM_ID 0x17
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#define EFI_MSR_IA32_BIOS_UPDT_TRIG 0x79
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#define EFI_MSR_IA32_BIOS_SIGN_ID 0x8b
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#define MAX_MICROCODE_DESCRIPTOR_LENGTH 100
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typedef struct {
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VOID *MicrocodeData;
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UINTN MicrocodeSize;
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UINT32 ProcessorId;
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BOOLEAN Load;
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} MICROCODE_INFO;
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//
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// Definition for IA32 microcode format
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//
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typedef struct {
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UINT32 HeaderVersion;
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UINT32 UpdateRevision;
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UINT32 Date;
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UINT32 ProcessorId;
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UINT32 Checksum;
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UINT32 LoaderRevision;
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UINT32 ProcessorFlags;
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UINT32 DataSize;
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UINT32 TotalSize;
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UINT8 Reserved[12];
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} EFI_CPU_MICROCODE_HEADER;
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typedef struct {
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UINT32 ExtendedSignatureCount;
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UINT32 ExtendedTableChecksum;
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UINT8 Reserved[12];
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} EFI_CPU_MICROCODE_EXTENDED_TABLE_HEADER;
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typedef struct {
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UINT32 ProcessorSignature;
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UINT32 ProcessorFlag;
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UINT32 ProcessorChecksum;
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} EFI_CPU_MICROCODE_EXTENDED_TABLE;
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/**
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Detect whether specified processor can find matching microcode patch and load it.
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**/
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VOID
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MicrocodeDetect (
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VOID
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);
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#endif
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