diff --git a/UefiCpuPkg/PiSmmCpuDxeSmm/Ia32/SmiException.nasm b/UefiCpuPkg/PiSmmCpuDxeSmm/Ia32/SmiException.nasm index 7c80a6ae91..fa02c1016c 100644 --- a/UefiCpuPkg/PiSmmCpuDxeSmm/Ia32/SmiException.nasm +++ b/UefiCpuPkg/PiSmmCpuDxeSmm/Ia32/SmiException.nasm @@ -382,7 +382,7 @@ ASM_PFX(PageFaultIdtHandlerSmmProfile): ;; FX_SAVE_STATE_IA32 FxSaveState; sub esp, 512 mov edi, esp - db 0xf, 0xae, 0x7 ;fxsave [edi] + fxsave [edi] ; UEFI calling convention for IA32 requires that Direction flag in EFLAGs is clear cld @@ -410,7 +410,7 @@ ASM_PFX(PageFaultIdtHandlerSmmProfile): ;; FX_SAVE_STATE_IA32 FxSaveState; mov esi, esp - db 0xf, 0xae, 0xe ; fxrstor [esi] + fxrstor [esi] add esp, 512 ;; UINT32 Dr0, Dr1, Dr2, Dr3, Dr6, Dr7; @@ -582,7 +582,7 @@ PFHandlerEntry: clts sub esp, 512 mov edi, esp - db 0xf, 0xae, 0x7 ;fxsave [edi] + fxsave [edi] ; UEFI calling convention for IA32 requires that Direction flag in EFLAGs is clear cld @@ -612,7 +612,7 @@ PFHandlerEntry: ;; FX_SAVE_STATE_IA32 FxSaveState; mov esi, esp - db 0xf, 0xae, 0xe ; fxrstor [esi] + fxrstor [esi] add esp, 512 ;; UINT32 Dr0, Dr1, Dr2, Dr3, Dr6, Dr7; diff --git a/UefiCpuPkg/PiSmmCpuDxeSmm/X64/SmiEntry.nasm b/UefiCpuPkg/PiSmmCpuDxeSmm/X64/SmiEntry.nasm index 5d731e2280..97c7b01d0d 100644 --- a/UefiCpuPkg/PiSmmCpuDxeSmm/X64/SmiEntry.nasm +++ b/UefiCpuPkg/PiSmmCpuDxeSmm/X64/SmiEntry.nasm @@ -182,8 +182,7 @@ _SmiHandler: ; Save FP registers ; sub rsp, 0x200 - DB 0x48 ; FXSAVE64 - fxsave [rsp] + fxsave64 [rsp] add rsp, -0x20 @@ -201,8 +200,7 @@ _SmiHandler: ; ; Restore FP registers ; - DB 0x48 ; FXRSTOR64 - fxrstor [rsp] + fxrstor64 [rsp] add rsp, 0x200 diff --git a/UefiCpuPkg/PiSmmCpuDxeSmm/X64/SmiException.nasm b/UefiCpuPkg/PiSmmCpuDxeSmm/X64/SmiException.nasm index a8a9af3008..98c40949f5 100644 --- a/UefiCpuPkg/PiSmmCpuDxeSmm/X64/SmiException.nasm +++ b/UefiCpuPkg/PiSmmCpuDxeSmm/X64/SmiException.nasm @@ -279,7 +279,7 @@ ASM_PFX(PageFaultIdtHandlerSmmProfile): sub rsp, 512 mov rdi, rsp - db 0xf, 0xae, 00000111y ;fxsave [rdi] + fxsave [rdi] ; UEFI calling convention for x64 requires that Direction flag in EFLAGs is clear cld @@ -309,7 +309,7 @@ ASM_PFX(PageFaultIdtHandlerSmmProfile): ;; FX_SAVE_STATE_X64 FxSaveState; mov rsi, rsp - db 0xf, 0xae, 00001110y ; fxrstor [rsi] + fxrstor [rsi] add rsp, 512 ;; UINT64 Dr0, Dr1, Dr2, Dr3, Dr6, Dr7;