mirror of https://github.com/acidanthera/audk.git
ArmPkg/ArmMmuLib: use a pool allocation for the root table
Currently, we allocate a full page for the root translation table, even if the configured translation only requires two entries (16 bytes) for the root level, which happens to be the case for a 40 bit VA. Likewise, for a 36-bit VA space, the root table only needs 16 entries of 8 bytes each, adding up to 128 bytes. So switch to a pool allocation for the root table if we can, but take into account that the architecture requires it to be naturally aligned to its size, i.e., a 64 byte table requires 64 byte alignment, whereas pool allocations in general are only guaranteed to be aligned to 8 bytes. Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Ard Biesheuvel <ard.biesheuvel@linaro.org> Reviewed-by: Leif Lindholm <leif.lindholm@linaro.org>
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@ -553,12 +553,14 @@ ArmConfigureMmu (
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)
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{
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VOID* TranslationTable;
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VOID* TranslationTableBuffer;
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UINT32 TranslationTableAttribute;
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ARM_MEMORY_REGION_DESCRIPTOR *MemoryTableEntry;
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UINT64 MaxAddress;
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UINT64 TopAddress;
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UINTN T0SZ;
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UINTN RootTableEntryCount;
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UINTN RootTableEntrySize;
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UINT64 TCR;
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RETURN_STATUS Status;
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@ -638,8 +640,19 @@ ArmConfigureMmu (
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// Set TCR
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ArmSetTCR (TCR);
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// Allocate pages for translation table
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TranslationTable = AllocatePages (1);
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// Allocate pages for translation table. Pool allocations are 8 byte aligned,
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// but we may require a higher alignment based on the size of the root table.
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RootTableEntrySize = RootTableEntryCount * sizeof(UINT64);
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if (RootTableEntrySize < EFI_PAGE_SIZE / 2) {
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TranslationTableBuffer = AllocatePool (2 * RootTableEntrySize - 8);
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//
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// Naturally align the root table. Preserves possible NULL value
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//
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TranslationTable = (VOID *)((UINTN)(TranslationTableBuffer - 1) | (RootTableEntrySize - 1)) + 1;
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} else {
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TranslationTable = AllocatePages (1);
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TranslationTableBuffer = NULL;
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}
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if (TranslationTable == NULL) {
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return RETURN_OUT_OF_RESOURCES;
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}
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@ -653,10 +666,10 @@ ArmConfigureMmu (
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}
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if (TranslationTableSize != NULL) {
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*TranslationTableSize = RootTableEntryCount * sizeof(UINT64);
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*TranslationTableSize = RootTableEntrySize;
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}
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ZeroMem (TranslationTable, RootTableEntryCount * sizeof(UINT64));
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ZeroMem (TranslationTable, RootTableEntrySize);
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// Disable MMU and caches. ArmDisableMmu() also invalidates the TLBs
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ArmDisableMmu ();
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@ -716,7 +729,11 @@ ArmConfigureMmu (
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return RETURN_SUCCESS;
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FREE_TRANSLATION_TABLE:
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FreePages (TranslationTable, 1);
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if (TranslationTableBuffer != NULL) {
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FreePool (TranslationTableBuffer);
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} else {
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FreePages (TranslationTable, 1);
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}
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return Status;
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}
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