mirror of https://github.com/acidanthera/audk.git
OvmfPkg/MemEncryptSevLib: add support to validate > 4GB memory in PEI phase
BZ: https://bugzilla.tianocore.org/show_bug.cgi?id=3275 The initial page built during the SEC phase is used by the MemEncryptSevSnpValidateSystemRam() for the system RAM validation. The page validation process requires using the PVALIDATE instruction; the instruction accepts a virtual address of the memory region that needs to be validated. If hardware encounters a page table walk failure (due to page-not-present) then it raises #GP. The initial page table built in SEC phase address up to 4GB. Add an internal function to extend the page table to cover > 4GB. The function builds 1GB entries in the page table for access > 4GB. This will provide the support to call PVALIDATE instruction for the virtual address > 4GB in PEI phase. Cc: Michael Roth <michael.roth@amd.com> Cc: James Bottomley <jejb@linux.ibm.com> Cc: Min Xu <min.m.xu@intel.com> Cc: Jiewen Yao <jiewen.yao@intel.com> Cc: Tom Lendacky <thomas.lendacky@amd.com> Cc: Jordan Justen <jordan.l.justen@intel.com> Cc: Ard Biesheuvel <ardb+tianocore@kernel.org> Cc: Erdem Aktas <erdemaktas@google.com> Cc: Gerd Hoffmann <kraxel@redhat.com> Acked-by: Jiewen Yao <Jiewen.yao@intel.com> Acked-by: Gerd Hoffmann <kraxel@redhat.com> Signed-off-by: Brijesh Singh <brijesh.singh@amd.com>
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@ -536,6 +536,120 @@ EnableReadOnlyPageWriteProtect (
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AsmWriteCr0 (AsmReadCr0 () | BIT16);
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}
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RETURN_STATUS
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EFIAPI
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InternalMemEncryptSevCreateIdentityMap1G (
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IN PHYSICAL_ADDRESS Cr3BaseAddress,
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IN PHYSICAL_ADDRESS PhysicalAddress,
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IN UINTN Length
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)
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{
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PAGE_MAP_AND_DIRECTORY_POINTER *PageMapLevel4Entry;
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PAGE_TABLE_1G_ENTRY *PageDirectory1GEntry;
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UINT64 PgTableMask;
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UINT64 AddressEncMask;
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BOOLEAN IsWpEnabled;
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RETURN_STATUS Status;
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//
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// Set PageMapLevel4Entry to suppress incorrect compiler/analyzer warnings.
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//
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PageMapLevel4Entry = NULL;
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DEBUG ((
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DEBUG_VERBOSE,
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"%a:%a: Cr3Base=0x%Lx Physical=0x%Lx Length=0x%Lx\n",
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gEfiCallerBaseName,
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__FUNCTION__,
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Cr3BaseAddress,
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PhysicalAddress,
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(UINT64)Length
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));
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if (Length == 0) {
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return RETURN_INVALID_PARAMETER;
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}
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//
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// Check if we have a valid memory encryption mask
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//
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AddressEncMask = InternalGetMemEncryptionAddressMask ();
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if (!AddressEncMask) {
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return RETURN_ACCESS_DENIED;
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}
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PgTableMask = AddressEncMask | EFI_PAGE_MASK;
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//
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// Make sure that the page table is changeable.
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//
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IsWpEnabled = IsReadOnlyPageWriteProtected ();
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if (IsWpEnabled) {
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DisableReadOnlyPageWriteProtect ();
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}
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Status = EFI_SUCCESS;
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while (Length) {
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//
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// If Cr3BaseAddress is not specified then read the current CR3
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//
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if (Cr3BaseAddress == 0) {
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Cr3BaseAddress = AsmReadCr3 ();
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}
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PageMapLevel4Entry = (VOID *)(Cr3BaseAddress & ~PgTableMask);
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PageMapLevel4Entry += PML4_OFFSET (PhysicalAddress);
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if (!PageMapLevel4Entry->Bits.Present) {
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DEBUG ((
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DEBUG_ERROR,
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"%a:%a: bad PML4 for Physical=0x%Lx\n",
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gEfiCallerBaseName,
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__FUNCTION__,
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PhysicalAddress
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));
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Status = RETURN_NO_MAPPING;
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goto Done;
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}
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PageDirectory1GEntry = (VOID *)(
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(PageMapLevel4Entry->Bits.PageTableBaseAddress <<
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12) & ~PgTableMask
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);
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PageDirectory1GEntry += PDP_OFFSET (PhysicalAddress);
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if (!PageDirectory1GEntry->Bits.Present) {
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PageDirectory1GEntry->Bits.Present = 1;
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PageDirectory1GEntry->Bits.MustBe1 = 1;
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PageDirectory1GEntry->Bits.MustBeZero = 0;
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PageDirectory1GEntry->Bits.ReadWrite = 1;
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PageDirectory1GEntry->Uint64 |= (UINT64)PhysicalAddress | AddressEncMask;
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}
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if (Length <= BIT30) {
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Length = 0;
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} else {
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Length -= BIT30;
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}
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PhysicalAddress += BIT30;
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}
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//
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// Flush TLB
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//
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CpuFlushTlb ();
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Done:
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//
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// Restore page table write protection, if any.
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//
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if (IsWpEnabled) {
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EnableReadOnlyPageWriteProtect ();
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}
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return Status;
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}
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/**
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This function either sets or clears memory encryption bit for the memory
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region specified by PhysicalAddress and Length from the current page table
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@ -10,9 +10,12 @@
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#include <Uefi/UefiBaseType.h>
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#include <Library/BaseLib.h>
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#include <Library/PcdLib.h>
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#include <Library/DebugLib.h>
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#include <Library/MemEncryptSevLib.h>
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#include "SnpPageStateChange.h"
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#include "VirtualMemory.h"
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typedef struct {
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UINT64 StartAddress;
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@ -70,6 +73,7 @@ MemEncryptSevSnpPreValidateSystemRam (
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{
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PHYSICAL_ADDRESS EndAddress;
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SNP_PRE_VALIDATED_RANGE OverlapRange;
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EFI_STATUS Status;
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if (!MemEncryptSevSnpIsEnabled ()) {
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return;
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@ -77,6 +81,24 @@ MemEncryptSevSnpPreValidateSystemRam (
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EndAddress = BaseAddress + EFI_PAGES_TO_SIZE (NumPages);
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//
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// The page table used in PEI can address up to 4GB memory. If we are asked to
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// validate a range above the 4GB, then create an identity mapping so that the
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// PVALIDATE instruction can execute correctly. If the page table entry is not
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// present then PVALIDATE will #GP.
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//
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if (BaseAddress >= SIZE_4GB) {
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Status = InternalMemEncryptSevCreateIdentityMap1G (
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0,
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BaseAddress,
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EFI_PAGES_TO_SIZE (NumPages)
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);
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if (EFI_ERROR (Status)) {
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ASSERT (FALSE);
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CpuDeadLoop ();
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}
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}
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while (BaseAddress < EndAddress) {
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//
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// Check if the range overlaps with the pre-validated ranges.
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@ -144,4 +144,28 @@ InternalMemEncryptSevClearMmioPageEncMask (
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IN UINTN Length
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);
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/**
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Create 1GB identity mapping for the specified virtual address range.
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The function is preliminary used by the SEV-SNP page state change
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APIs to build the page table required before issuing the PVALIDATE
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instruction. The function must be removed after the EDK2 core is
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enhanced to do the lazy validation.
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@param[in] Cr3BaseAddress Cr3 Base Address (if zero then use
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current CR3)
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@param[in] VirtualAddress Virtual address
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@param[in] Length Length of virtual address range
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@retval RETURN_INVALID_PARAMETER Number of pages is zero.
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**/
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RETURN_STATUS
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EFIAPI
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InternalMemEncryptSevCreateIdentityMap1G (
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IN PHYSICAL_ADDRESS Cr3BaseAddress,
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IN PHYSICAL_ADDRESS PhysicalAddress,
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IN UINTN Length
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);
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#endif
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