mirror of https://github.com/acidanthera/audk.git
MdePkg/Include: RISC-V definitions.
Add RISC-V processor related definitions. REF: https://bugzilla.tianocore.org/show_bug.cgi?id=2672 Signed-off-by: Abner Chang <abner.chang@hpe.com> Co-authored-by: Gilbert Chen <gilbert.chen@hpe.com> Reviewed-by: Leif Lindholm <leif.lindholm@linaro.org> Reviewed-by: Zhiguang Liu <zhiguang.liu@intel.com> Cc: Michael D Kinney <michael.d.kinney@intel.com> Cc: Liming Gao <liming.gao@intel.com> Cc: Leif Lindholm <leif.lindholm@linaro.org> Cc: Gilbert Chen <gilbert.chen@hpe.com>
This commit is contained in:
Abner Chang
mergify[bot]
parent
1510d6a391
commit
d3abb40d77
|
|
@ -9,6 +9,8 @@
|
|||
|
||||
Copyright (c) 2006 - 2018, Intel Corporation. All rights reserved.<BR>
|
||||
Portions copyright (c) 2008 - 2009, Apple Inc. All rights reserved.<BR>
|
||||
Portions Copyright (c) 2016 - 2020, Hewlett Packard Enterprise Development LP. All rights reserved.<BR>
|
||||
|
||||
SPDX-License-Identifier: BSD-2-Clause-Patent
|
||||
|
||||
**/
|
||||
|
|
@ -34,6 +36,9 @@ SPDX-License-Identifier: BSD-2-Clause-Patent
|
|||
#define IMAGE_FILE_MACHINE_X64 0x8664
|
||||
#define IMAGE_FILE_MACHINE_ARMTHUMB_MIXED 0x01c2
|
||||
#define IMAGE_FILE_MACHINE_ARM64 0xAA64
|
||||
#define IMAGE_FILE_MACHINE_RISCV32 0x5032
|
||||
#define IMAGE_FILE_MACHINE_RISCV64 0x5064
|
||||
#define IMAGE_FILE_MACHINE_RISCV128 0x5128
|
||||
|
||||
//
|
||||
// EXE file formats
|
||||
|
|
@ -493,6 +498,13 @@ typedef struct {
|
|||
#define EFI_IMAGE_REL_BASED_MIPS_JMPADDR16 9
|
||||
#define EFI_IMAGE_REL_BASED_DIR64 10
|
||||
|
||||
///
|
||||
/// Relocation types of RISC-V processor.
|
||||
///
|
||||
#define EFI_IMAGE_REL_BASED_RISCV_HI20 5
|
||||
#define EFI_IMAGE_REL_BASED_RISCV_LOW12I 7
|
||||
#define EFI_IMAGE_REL_BASED_RISCV_LOW12S 8
|
||||
|
||||
///
|
||||
/// Line number format.
|
||||
///
|
||||
|
|
|
|||
|
|
@ -7,6 +7,7 @@
|
|||
|
||||
Copyright (c) 2006 - 2018, Intel Corporation. All rights reserved.<BR>
|
||||
Portions copyright (c) 2011 - 2013, ARM Ltd. All rights reserved.<BR>
|
||||
Copyright (c) 2020, Hewlett Packard Enterprise Development LP. All rights reserved.<BR>
|
||||
|
||||
SPDX-License-Identifier: BSD-2-Clause-Patent
|
||||
|
||||
|
|
@ -603,6 +604,59 @@ typedef struct {
|
|||
UINT64 FAR; // Fault Address Register
|
||||
} EFI_SYSTEM_CONTEXT_AARCH64;
|
||||
|
||||
///
|
||||
/// RISC-V processor exception types.
|
||||
///
|
||||
#define EXCEPT_RISCV_INST_MISALIGNED 0
|
||||
#define EXCEPT_RISCV_INST_ACCESS_FAULT 1
|
||||
#define EXCEPT_RISCV_ILLEGAL_INST 2
|
||||
#define EXCEPT_RISCV_BREAKPOINT 3
|
||||
#define EXCEPT_RISCV_LOAD_ADDRESS_MISALIGNED 4
|
||||
#define EXCEPT_RISCV_LOAD_ACCESS_FAULT 5
|
||||
#define EXCEPT_RISCV_STORE_AMO_ADDRESS_MISALIGNED 6
|
||||
#define EXCEPT_RISCV_STORE_AMO_ACCESS_FAULT 7
|
||||
#define EXCEPT_RISCV_ENV_CALL_FROM_UMODE 8
|
||||
#define EXCEPT_RISCV_ENV_CALL_FROM_SMODE 9
|
||||
#define EXCEPT_RISCV_ENV_CALL_FROM_HMODE 10
|
||||
#define EXCEPT_RISCV_ENV_CALL_FROM_MMODE 11
|
||||
|
||||
#define EXCEPT_RISCV_SOFTWARE_INT 0x0
|
||||
#define EXCEPT_RISCV_TIMER_INT 0x1
|
||||
|
||||
typedef struct {
|
||||
UINT64 X0;
|
||||
UINT64 X1;
|
||||
UINT64 X2;
|
||||
UINT64 X3;
|
||||
UINT64 X4;
|
||||
UINT64 X5;
|
||||
UINT64 X6;
|
||||
UINT64 X7;
|
||||
UINT64 X8;
|
||||
UINT64 X9;
|
||||
UINT64 X10;
|
||||
UINT64 X11;
|
||||
UINT64 X12;
|
||||
UINT64 X13;
|
||||
UINT64 X14;
|
||||
UINT64 X15;
|
||||
UINT64 X16;
|
||||
UINT64 X17;
|
||||
UINT64 X18;
|
||||
UINT64 X19;
|
||||
UINT64 X20;
|
||||
UINT64 X21;
|
||||
UINT64 X22;
|
||||
UINT64 X23;
|
||||
UINT64 X24;
|
||||
UINT64 X25;
|
||||
UINT64 X26;
|
||||
UINT64 X27;
|
||||
UINT64 X28;
|
||||
UINT64 X29;
|
||||
UINT64 X30;
|
||||
UINT64 X31;
|
||||
} EFI_SYSTEM_CONTEXT_RISCV64;
|
||||
|
||||
///
|
||||
/// Universal EFI_SYSTEM_CONTEXT definition.
|
||||
|
|
@ -614,6 +668,7 @@ typedef union {
|
|||
EFI_SYSTEM_CONTEXT_IPF *SystemContextIpf;
|
||||
EFI_SYSTEM_CONTEXT_ARM *SystemContextArm;
|
||||
EFI_SYSTEM_CONTEXT_AARCH64 *SystemContextAArch64;
|
||||
EFI_SYSTEM_CONTEXT_RISCV64 *SystemContextRiscV64;
|
||||
} EFI_SYSTEM_CONTEXT;
|
||||
|
||||
//
|
||||
|
|
|
|||
|
|
@ -3,6 +3,8 @@
|
|||
devices for network access and network booting.
|
||||
|
||||
Copyright (c) 2006 - 2018, Intel Corporation. All rights reserved.<BR>
|
||||
Copyright (c) 2020, Hewlett Packard Enterprise Development LP. All rights reserved.<BR>
|
||||
|
||||
SPDX-License-Identifier: BSD-2-Clause-Patent
|
||||
|
||||
@par Revision Reference:
|
||||
|
|
@ -153,6 +155,8 @@ typedef UINT16 EFI_PXE_BASE_CODE_UDP_PORT;
|
|||
#define EFI_PXE_CLIENT_SYSTEM_ARCHITECTURE 0x000A
|
||||
#elif defined (MDE_CPU_AARCH64)
|
||||
#define EFI_PXE_CLIENT_SYSTEM_ARCHITECTURE 0x000B
|
||||
#elif defined (MDE_CPU_RISCV64)
|
||||
#define EFI_PXE_CLIENT_SYSTEM_ARCHITECTURE 0x001B
|
||||
#endif
|
||||
|
||||
|
||||
|
|
|
|||
|
|
@ -3,6 +3,7 @@
|
|||
|
||||
Copyright (c) 2006 - 2018, Intel Corporation. All rights reserved.<BR>
|
||||
Portions copyright (c) 2011 - 2016, ARM Ltd. All rights reserved.<BR>
|
||||
Copyright (c) 2020, Hewlett Packard Enterprise Development LP. All rights reserved.<BR>
|
||||
|
||||
SPDX-License-Identifier: BSD-2-Clause-Patent
|
||||
|
||||
|
|
@ -240,6 +241,12 @@ typedef union {
|
|||
///
|
||||
#define EFI_IMAGE_MACHINE_AARCH64 0xAA64
|
||||
|
||||
///
|
||||
/// PE32+ Machine type for RISC-V 32/64/128
|
||||
///
|
||||
#define EFI_IMAGE_MACHINE_RISCV32 0x5032
|
||||
#define EFI_IMAGE_MACHINE_RISCV64 0x5064
|
||||
#define EFI_IMAGE_MACHINE_RISCV128 0x5128
|
||||
|
||||
#if defined (MDE_CPU_IA32)
|
||||
|
||||
|
|
@ -268,6 +275,12 @@ typedef union {
|
|||
|
||||
#define EFI_IMAGE_MACHINE_CROSS_TYPE_SUPPORTED(Machine) (FALSE)
|
||||
|
||||
#elif defined (MDE_CPU_RISCV64)
|
||||
#define EFI_IMAGE_MACHINE_TYPE_SUPPORTED(Machine) \
|
||||
((Machine) == EFI_IMAGE_MACHINE_RISCV64)
|
||||
|
||||
#define EFI_IMAGE_MACHINE_CROSS_TYPE_SUPPORTED(Machine) (FALSE)
|
||||
|
||||
#elif defined (MDE_CPU_EBC)
|
||||
|
||||
///
|
||||
|
|
|
|||
|
|
@ -6,6 +6,8 @@
|
|||
by this include file.
|
||||
|
||||
Copyright (c) 2006 - 2019, Intel Corporation. All rights reserved.<BR>
|
||||
Portions Copyright (c) 2020, Hewlett Packard Enterprise Development LP. All rights reserved.<BR>
|
||||
|
||||
SPDX-License-Identifier: BSD-2-Clause-Patent
|
||||
|
||||
**/
|
||||
|
|
@ -2198,6 +2200,7 @@ typedef struct {
|
|||
#define EFI_REMOVABLE_MEDIA_FILE_NAME_X64 L"\\EFI\\BOOT\\BOOTX64.EFI"
|
||||
#define EFI_REMOVABLE_MEDIA_FILE_NAME_ARM L"\\EFI\\BOOT\\BOOTARM.EFI"
|
||||
#define EFI_REMOVABLE_MEDIA_FILE_NAME_AARCH64 L"\\EFI\\BOOT\\BOOTAA64.EFI"
|
||||
#define EFI_REMOVABLE_MEDIA_FILE_NAME_RISCV64 L"\\EFI\\BOOT\\BOOTRISCV64.EFI"
|
||||
|
||||
#if defined (MDE_CPU_IA32)
|
||||
#define EFI_REMOVABLE_MEDIA_FILE_NAME EFI_REMOVABLE_MEDIA_FILE_NAME_IA32
|
||||
|
|
@ -2208,6 +2211,8 @@ typedef struct {
|
|||
#define EFI_REMOVABLE_MEDIA_FILE_NAME EFI_REMOVABLE_MEDIA_FILE_NAME_ARM
|
||||
#elif defined (MDE_CPU_AARCH64)
|
||||
#define EFI_REMOVABLE_MEDIA_FILE_NAME EFI_REMOVABLE_MEDIA_FILE_NAME_AARCH64
|
||||
#elif defined (MDE_CPU_RISCV64)
|
||||
#define EFI_REMOVABLE_MEDIA_FILE_NAME EFI_REMOVABLE_MEDIA_FILE_NAME_RISCV64
|
||||
#else
|
||||
#error Unknown Processor Type
|
||||
#endif
|
||||
|
|
|
|||
Loading…
Reference in New Issue