MdePkg: Replace Opcode with the corresponding instructions.

REF: https://bugzilla.tianocore.org/show_bug.cgi?id=3790

Replace Opcode with the corresponding instructions.
The code changes have been verified with CompareBuild.py tool, which
can be used to compare the results of two different EDK II builds to
determine if they generate the same binaries.
(tool link: https://github.com/mdkinney/edk2/tree/sandbox/CompareBuild)

Signed-off-by: Jason Lou <yun.lou@intel.com>
Cc: Michael D Kinney <michael.d.kinney@intel.com>
Reviewed-by: Liming Gao <gaoliming@byosoft.com.cn>
Cc: Zhiguang Liu <zhiguang.liu@intel.com>
This commit is contained in:
Jason 2022-01-10 21:46:27 +08:00 committed by mergify[bot]
parent 84338c0d49
commit d3febfd9ad
42 changed files with 116 additions and 175 deletions

View File

@ -1,6 +1,6 @@
;------------------------------------------------------------------------------
;
; Copyright (c) 2006, Intel Corporation. All rights reserved.<BR>
; Copyright (c) 2006 - 2022, Intel Corporation. All rights reserved.<BR>
; SPDX-License-Identifier: BSD-2-Clause-Patent
;
; Module Name:
@ -44,16 +44,12 @@ ASM_PFX(InternalX86EnablePaging64):
mov cr0, eax ; enable paging
retf ; topmost 2 dwords hold the address
.0:
DB 0x67, 0x48 ; 32-bit address size, 64-bit operand size
mov ebx, [esp] ; mov rbx, [esp]
DB 0x67, 0x48
mov ecx, [esp + 8] ; mov rcx, [esp + 8]
DB 0x67, 0x48
mov edx, [esp + 0x10] ; mov rdx, [esp + 10h]
DB 0x67, 0x48
mov esp, [esp + 0x18] ; mov rsp, [esp + 18h]
DB 0x48
add esp, -0x20 ; add rsp, -20h
call ebx ; call rbx
BITS 64
mov rbx, [esp]
mov rcx, [esp + 8]
mov rdx, [esp + 0x10]
mov rsp, [esp + 0x18]
add rsp, -0x20
call rbx
hlt ; no one should get here

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@ -1,6 +1,6 @@
;------------------------------------------------------------------------------
;
; Copyright (c) 2006 - 2019, Intel Corporation. All rights reserved.<BR>
; Copyright (c) 2006 - 2022, Intel Corporation. All rights reserved.<BR>
; SPDX-License-Identifier: BSD-2-Clause-Patent
;
; Module Name:
@ -39,12 +39,12 @@ ASM_PFX(InternalLongJump):
mov edx, [esp + 4] ; edx = JumpBuffer
mov edx, [edx + 24] ; edx = target SSP
READSSP_EAX
rdsspd eax
sub edx, eax ; edx = delta
mov eax, edx ; eax = delta
shr eax, 2 ; eax = delta/sizeof(UINT32)
INCSSP_EAX
incsspd eax
CetDone:

View File

@ -1,6 +1,6 @@
;------------------------------------------------------------------------------
;
; Copyright (c) 2006, Intel Corporation. All rights reserved.<BR>
; Copyright (c) 2006 - 2022, Intel Corporation. All rights reserved.<BR>
; SPDX-License-Identifier: BSD-2-Clause-Patent
;
; Module Name:
@ -31,6 +31,6 @@ ASM_PFX(AsmMonitor):
mov eax, [esp + 4]
mov ecx, [esp + 8]
mov edx, [esp + 12]
DB 0xf, 1, 0xc8 ; monitor
monitor
ret

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@ -1,6 +1,6 @@
;------------------------------------------------------------------------------
;
; Copyright (c) 2006, Intel Corporation. All rights reserved.<BR>
; Copyright (c) 2006 - 2022, Intel Corporation. All rights reserved.<BR>
; SPDX-License-Identifier: BSD-2-Clause-Patent
;
; Module Name:
@ -29,6 +29,6 @@ global ASM_PFX(AsmMwait)
ASM_PFX(AsmMwait):
mov eax, [esp + 4]
mov ecx, [esp + 8]
DB 0xf, 1, 0xc9 ; mwait
mwait
ret

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@ -1,6 +1,6 @@
;------------------------------------------------------------------------------
;
; Copyright (c) 2015 - 2016, Intel Corporation. All rights reserved.<BR>
; Copyright (c) 2015 - 2022, Intel Corporation. All rights reserved.<BR>
; SPDX-License-Identifier: BSD-2-Clause-Patent
;
; Module Name:
@ -25,9 +25,8 @@ SECTION .text
;------------------------------------------------------------------------------
global ASM_PFX(InternalX86RdRand16)
ASM_PFX(InternalX86RdRand16):
; rdrand ax ; generate a 16 bit RN into ax
rdrand eax ; generate a 16 bit RN into ax
; CF=1 if RN generated ok, otherwise CF=0
db 0xf, 0xc7, 0xf0 ; rdrand r16: "0f c7 /6 ModRM:r/m(w)"
jc rn16_ok ; jmp if CF=1
xor eax, eax ; reg=0 if CF=0
ret ; return with failure status
@ -45,9 +44,8 @@ rn16_ok:
;------------------------------------------------------------------------------
global ASM_PFX(InternalX86RdRand32)
ASM_PFX(InternalX86RdRand32):
; rdrand eax ; generate a 32 bit RN into eax
rdrand eax ; generate a 32 bit RN into eax
; CF=1 if RN generated ok, otherwise CF=0
db 0xf, 0xc7, 0xf0 ; rdrand r32: "0f c7 /6 ModRM:r/m(w)"
jc rn32_ok ; jmp if CF=1
xor eax, eax ; reg=0 if CF=0
ret ; return with failure status
@ -65,14 +63,13 @@ rn32_ok:
;------------------------------------------------------------------------------
global ASM_PFX(InternalX86RdRand64)
ASM_PFX(InternalX86RdRand64):
; rdrand eax ; generate a 32 bit RN into eax
rdrand eax ; generate a 32 bit RN into eax
; CF=1 if RN generated ok, otherwise CF=0
db 0xf, 0xc7, 0xf0 ; rdrand r32: "0f c7 /6 ModRM:r/m(w)"
jnc rn64_ret ; jmp if CF=0
mov edx, dword [esp + 4]
mov [edx], eax
db 0xf, 0xc7, 0xf0 ; generate another 32 bit RN
rdrand eax ; generate another 32 bit RN
jnc rn64_ret ; jmp if CF=0
mov [edx + 4], eax

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@ -1,6 +1,6 @@
;------------------------------------------------------------------------------
;
; Copyright (c) 2006, Intel Corporation. All rights reserved.<BR>
; Copyright (c) 2006 - 2022, Intel Corporation. All rights reserved.<BR>
; SPDX-License-Identifier: BSD-2-Clause-Patent
;
; Module Name:
@ -31,8 +31,8 @@ ASM_PFX(AsmReadDr4):
; this register will cause a #UD exception.
;
; MS assembler doesn't support this instruction since no one would use it
; under normal circustances. Here opcode is used.
; under normal circustances.
;
DB 0xf, 0x21, 0xe0
mov eax, dr4
ret

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@ -1,6 +1,6 @@
;------------------------------------------------------------------------------
;
; Copyright (c) 2006, Intel Corporation. All rights reserved.<BR>
; Copyright (c) 2006 - 2022, Intel Corporation. All rights reserved.<BR>
; SPDX-License-Identifier: BSD-2-Clause-Patent
;
; Module Name:
@ -31,8 +31,8 @@ ASM_PFX(AsmReadDr5):
; this register will cause a #UD exception.
;
; MS assembler doesn't support this instruction since no one would use it
; under normal circustances. Here opcode is used.
; under normal circustances.
;
DB 0xf, 0x21, 0xe8
mov eax, dr5
ret

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@ -1,6 +1,6 @@
;------------------------------------------------------------------------------
;
; Copyright (c) 2006 - 2019, Intel Corporation. All rights reserved.<BR>
; Copyright (c) 2006 - 2022, Intel Corporation. All rights reserved.<BR>
; SPDX-License-Identifier: BSD-2-Clause-Patent
;
; Module Name:
@ -46,8 +46,8 @@ ASM_PFX(SetJump):
jnc CetDone
mov eax, 1
INCSSP_EAX ; to read original SSP
READSSP_EAX
incsspd eax ; to read original SSP
rdsspd eax
mov [edx + 0x24], eax ; save SSP
CetDone:

View File

@ -1,6 +1,6 @@
;------------------------------------------------------------------------------
;
; Copyright (c) 2006, Intel Corporation. All rights reserved.<BR>
; Copyright (c) 2006 - 2022, Intel Corporation. All rights reserved.<BR>
; SPDX-License-Identifier: BSD-2-Clause-Patent
;
; Module Name:
@ -32,8 +32,8 @@ ASM_PFX(AsmWriteDr4):
; this register will cause a #UD exception.
;
; MS assembler doesn't support this instruction since no one would use it
; under normal circustances. Here opcode is used.
; under normal circustances.
;
DB 0xf, 0x23, 0xe0
mov dr4, eax
ret

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@ -1,6 +1,6 @@
;------------------------------------------------------------------------------
;
; Copyright (c) 2006, Intel Corporation. All rights reserved.<BR>
; Copyright (c) 2006 - 2022, Intel Corporation. All rights reserved.<BR>
; SPDX-License-Identifier: BSD-2-Clause-Patent
;
; Module Name:
@ -32,8 +32,8 @@ ASM_PFX(AsmWriteDr5):
; this register will cause a #UD exception.
;
; MS assembler doesn't support this instruction since no one would use it
; under normal circustances. Here opcode is used.
; under normal circustances.
;
DB 0xf, 0x23, 0xe8
mov dr5, eax
ret

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@ -1,6 +1,6 @@
;------------------------------------------------------------------------------
;
; Copyright (c) 2006 - 2008, Intel Corporation. All rights reserved.<BR>
; Copyright (c) 2006 - 2022, Intel Corporation. All rights reserved.<BR>
; SPDX-License-Identifier: BSD-2-Clause-Patent
;
; Module Name:
@ -51,8 +51,7 @@ ASM_PFX(InternalX86DisablePaging64):
sub eax, 4 ; eax <- One slot below transition code on the stack
push rcx ; push Cs to stack
push r10 ; push address of tansition code on stack
DB 0x48 ; prefix to composite "retq" with next "retf"
retf ; Use far return to load CS register from stack
retfq
; Start of transition code
.0:

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@ -1,6 +1,6 @@
;------------------------------------------------------------------------------
;
; Copyright (c) 2006 - 2019, Intel Corporation. All rights reserved.<BR>
; Copyright (c) 2006 - 2022, Intel Corporation. All rights reserved.<BR>
; SPDX-License-Identifier: BSD-2-Clause-Patent
;
; Module Name:
@ -41,12 +41,12 @@ ASM_PFX(InternalLongJump):
push rdx ; save rdx
mov rdx, [rcx + 0xF8] ; rdx = target SSP
READSSP_RAX
rdsspq rax
sub rdx, rax ; rdx = delta
mov rax, rdx ; rax = delta
shr rax, 3 ; rax = delta/sizeof(UINT64)
INCSSP_RAX
incsspq rax
pop rdx ; restore rdx
CetDone:

View File

@ -1,6 +1,6 @@
;------------------------------------------------------------------------------
;
; Copyright (c) 2006, Intel Corporation. All rights reserved.<BR>
; Copyright (c) 2006 - 2022, Intel Corporation. All rights reserved.<BR>
; SPDX-License-Identifier: BSD-2-Clause-Patent
;
; Module Name:
@ -32,6 +32,6 @@ ASM_PFX(AsmMonitor):
mov eax, ecx
mov ecx, edx
mov edx, r8d
DB 0xf, 1, 0xc8 ; monitor
monitor
ret

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@ -1,6 +1,6 @@
;------------------------------------------------------------------------------
;
; Copyright (c) 2006, Intel Corporation. All rights reserved.<BR>
; Copyright (c) 2006 - 2022, Intel Corporation. All rights reserved.<BR>
; SPDX-License-Identifier: BSD-2-Clause-Patent
;
; Module Name:
@ -30,6 +30,6 @@ global ASM_PFX(AsmMwait)
ASM_PFX(AsmMwait):
mov eax, ecx
mov ecx, edx
DB 0xf, 1, 0xc9 ; mwait
mwait
ret

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@ -1,6 +1,6 @@
;------------------------------------------------------------------------------
;
; Copyright (c) 2015 - 2016, Intel Corporation. All rights reserved.<BR>
; Copyright (c) 2015 - 2022, Intel Corporation. All rights reserved.<BR>
; SPDX-License-Identifier: BSD-2-Clause-Patent
;
; Module Name:
@ -26,9 +26,8 @@
;------------------------------------------------------------------------------
global ASM_PFX(InternalX86RdRand16)
ASM_PFX(InternalX86RdRand16):
; rdrand ax ; generate a 16 bit RN into eax,
rdrand eax ; generate a 16 bit RN into eax,
; CF=1 if RN generated ok, otherwise CF=0
db 0xf, 0xc7, 0xf0 ; rdrand r16: "0f c7 /6 ModRM:r/m(w)"
jc rn16_ok ; jmp if CF=1
xor rax, rax ; reg=0 if CF=0
ret ; return with failure status
@ -45,9 +44,8 @@ rn16_ok:
;------------------------------------------------------------------------------
global ASM_PFX(InternalX86RdRand32)
ASM_PFX(InternalX86RdRand32):
; rdrand eax ; generate a 32 bit RN into eax,
rdrand eax ; generate a 32 bit RN into eax,
; CF=1 if RN generated ok, otherwise CF=0
db 0xf, 0xc7, 0xf0 ; rdrand r32: "0f c7 /6 ModRM:r/m(w)"
jc rn32_ok ; jmp if CF=1
xor rax, rax ; reg=0 if CF=0
ret ; return with failure status
@ -64,9 +62,8 @@ rn32_ok:
;------------------------------------------------------------------------------
global ASM_PFX(InternalX86RdRand64)
ASM_PFX(InternalX86RdRand64):
; rdrand rax ; generate a 64 bit RN into rax,
rdrand rax ; generate a 64 bit RN into rax,
; CF=1 if RN generated ok, otherwise CF=0
db 0x48, 0xf, 0xc7, 0xf0 ; rdrand r64: "REX.W + 0f c7 /6 ModRM:r/m(w)"
jc rn64_ok ; jmp if CF=1
xor rax, rax ; reg=0 if CF=0
ret ; return with failure status

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@ -1,6 +1,6 @@
;------------------------------------------------------------------------------
;
; Copyright (c) 2006, Intel Corporation. All rights reserved.<BR>
; Copyright (c) 2006 - 2022, Intel Corporation. All rights reserved.<BR>
; SPDX-License-Identifier: BSD-2-Clause-Patent
;
; Module Name:
@ -31,6 +31,6 @@ ASM_PFX(AsmReadDr4):
; There's no obvious reason to access this register, since it's aliased to
; DR7 when DE=0 or an exception generated when DE=1
;
DB 0xf, 0x21, 0xe0
mov rax, dr4
ret

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@ -1,6 +1,6 @@
;------------------------------------------------------------------------------
;
; Copyright (c) 2006, Intel Corporation. All rights reserved.<BR>
; Copyright (c) 2006 - 2022, Intel Corporation. All rights reserved.<BR>
; SPDX-License-Identifier: BSD-2-Clause-Patent
;
; Module Name:
@ -31,6 +31,6 @@ ASM_PFX(AsmReadDr5):
; There's no obvious reason to access this register, since it's aliased to
; DR7 when DE=0 or an exception generated when DE=1
;
DB 0xf, 0x21, 0xe8
mov rax, dr5
ret

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@ -1,6 +1,6 @@
;------------------------------------------------------------------------------
;
; Copyright (c) 2006, Intel Corporation. All rights reserved.<BR>
; Copyright (c) 2006 - 2022, Intel Corporation. All rights reserved.<BR>
; SPDX-License-Identifier: BSD-2-Clause-Patent
;
; Module Name:
@ -27,9 +27,6 @@
;------------------------------------------------------------------------------
global ASM_PFX(AsmReadMm0)
ASM_PFX(AsmReadMm0):
;
; 64-bit MASM doesn't support MMX instructions, so use opcode here
;
DB 0x48, 0xf, 0x7e, 0xc0
movq rax, mm0
ret

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@ -1,6 +1,6 @@
;------------------------------------------------------------------------------
;
; Copyright (c) 2006, Intel Corporation. All rights reserved.<BR>
; Copyright (c) 2006 - 2022, Intel Corporation. All rights reserved.<BR>
; SPDX-License-Identifier: BSD-2-Clause-Patent
;
; Module Name:
@ -27,9 +27,6 @@
;------------------------------------------------------------------------------
global ASM_PFX(AsmReadMm1)
ASM_PFX(AsmReadMm1):
;
; 64-bit MASM doesn't support MMX instructions, so use opcode here
;
DB 0x48, 0xf, 0x7e, 0xc8
movq rax, mm1
ret

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@ -1,6 +1,6 @@
;------------------------------------------------------------------------------
;
; Copyright (c) 2006, Intel Corporation. All rights reserved.<BR>
; Copyright (c) 2006 - 2022, Intel Corporation. All rights reserved.<BR>
; SPDX-License-Identifier: BSD-2-Clause-Patent
;
; Module Name:
@ -27,9 +27,6 @@
;------------------------------------------------------------------------------
global ASM_PFX(AsmReadMm2)
ASM_PFX(AsmReadMm2):
;
; 64-bit MASM doesn't support MMX instructions, so use opcode here
;
DB 0x48, 0xf, 0x7e, 0xd0
movq rax, mm2
ret

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@ -1,6 +1,6 @@
;------------------------------------------------------------------------------
;
; Copyright (c) 2006, Intel Corporation. All rights reserved.<BR>
; Copyright (c) 2006 - 2022, Intel Corporation. All rights reserved.<BR>
; SPDX-License-Identifier: BSD-2-Clause-Patent
;
; Module Name:
@ -27,9 +27,6 @@
;------------------------------------------------------------------------------
global ASM_PFX(AsmReadMm3)
ASM_PFX(AsmReadMm3):
;
; 64-bit MASM doesn't support MMX instructions, so use opcode here
;
DB 0x48, 0xf, 0x7e, 0xd8
movq rax, mm3
ret

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@ -1,6 +1,6 @@
;------------------------------------------------------------------------------
;
; Copyright (c) 2006, Intel Corporation. All rights reserved.<BR>
; Copyright (c) 2006 - 2022, Intel Corporation. All rights reserved.<BR>
; SPDX-License-Identifier: BSD-2-Clause-Patent
;
; Module Name:
@ -27,9 +27,6 @@
;------------------------------------------------------------------------------
global ASM_PFX(AsmReadMm4)
ASM_PFX(AsmReadMm4):
;
; 64-bit MASM doesn't support MMX instructions, so use opcode here
;
DB 0x48, 0xf, 0x7e, 0xe0
movq rax, mm4
ret

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@ -1,6 +1,6 @@
;------------------------------------------------------------------------------
;
; Copyright (c) 2006, Intel Corporation. All rights reserved.<BR>
; Copyright (c) 2006 - 2022, Intel Corporation. All rights reserved.<BR>
; SPDX-License-Identifier: BSD-2-Clause-Patent
;
; Module Name:
@ -27,9 +27,6 @@
;------------------------------------------------------------------------------
global ASM_PFX(AsmReadMm5)
ASM_PFX(AsmReadMm5):
;
; 64-bit MASM doesn't support MMX instructions, so use opcode here
;
DB 0x48, 0xf, 0x7e, 0xe8
movq rax, mm5
ret

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@ -1,6 +1,6 @@
;------------------------------------------------------------------------------
;
; Copyright (c) 2006, Intel Corporation. All rights reserved.<BR>
; Copyright (c) 2006 - 2022, Intel Corporation. All rights reserved.<BR>
; SPDX-License-Identifier: BSD-2-Clause-Patent
;
; Module Name:
@ -27,9 +27,6 @@
;------------------------------------------------------------------------------
global ASM_PFX(AsmReadMm6)
ASM_PFX(AsmReadMm6):
;
; 64-bit MASM doesn't support MMX instructions, so use opcode here
;
DB 0x48, 0xf, 0x7e, 0xf0
movq rax, mm6
ret

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@ -1,6 +1,6 @@
;------------------------------------------------------------------------------
;
; Copyright (c) 2006, Intel Corporation. All rights reserved.<BR>
; Copyright (c) 2006 - 2022, Intel Corporation. All rights reserved.<BR>
; SPDX-License-Identifier: BSD-2-Clause-Patent
;
; Module Name:
@ -27,9 +27,6 @@
;------------------------------------------------------------------------------
global ASM_PFX(AsmReadMm7)
ASM_PFX(AsmReadMm7):
;
; 64-bit MASM doesn't support MMX instructions, so use opcode here
;
DB 0x48, 0xf, 0x7e, 0xf8
movq rax, mm7
ret

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@ -1,6 +1,6 @@
;------------------------------------------------------------------------------
;
; Copyright (c) 2006 - 2019, Intel Corporation. All rights reserved.<BR>
; Copyright (c) 2006 - 2022, Intel Corporation. All rights reserved.<BR>
; SPDX-License-Identifier: BSD-2-Clause-Patent
;
; Module Name:
@ -48,8 +48,8 @@ ASM_PFX(SetJump):
jnc CetDone
mov rax, 1
INCSSP_RAX ; to read original SSP
READSSP_RAX
incsspq rax ; to read original SSP
rdsspq rax
mov [rcx + 0xF8], rax ; save SSP
CetDone:

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@ -1,6 +1,6 @@
;------------------------------------------------------------------------------
;
; Copyright (c) 2006, Intel Corporation. All rights reserved.<BR>
; Copyright (c) 2006 - 2022, Intel Corporation. All rights reserved.<BR>
; SPDX-License-Identifier: BSD-2-Clause-Patent
;
; Module Name:
@ -31,7 +31,7 @@ ASM_PFX(AsmWriteDr4):
; There's no obvious reason to access this register, since it's aliased to
; DR6 when DE=0 or an exception generated when DE=1
;
DB 0xf, 0x23, 0xe1
mov dr4, rcx
mov rax, rcx
ret

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@ -1,6 +1,6 @@
;------------------------------------------------------------------------------
;
; Copyright (c) 2006 - 2008, Intel Corporation. All rights reserved.<BR>
; Copyright (c) 2006 - 2022, Intel Corporation. All rights reserved.<BR>
; SPDX-License-Identifier: BSD-2-Clause-Patent
;
; Module Name:
@ -31,7 +31,7 @@ ASM_PFX(AsmWriteDr5):
; There's no obvious reason to access this register, since it's aliased to
; DR7 when DE=0 or an exception generated when DE=1
;
DB 0xf, 0x23, 0xe9
mov dr5, rcx
mov rax, rcx
ret

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@ -1,6 +1,6 @@
;------------------------------------------------------------------------------
;
; Copyright (c) 2006, Intel Corporation. All rights reserved.<BR>
; Copyright (c) 2006 - 2022, Intel Corporation. All rights reserved.<BR>
; SPDX-License-Identifier: BSD-2-Clause-Patent
;
; Module Name:
@ -27,9 +27,6 @@
;------------------------------------------------------------------------------
global ASM_PFX(AsmWriteMm0)
ASM_PFX(AsmWriteMm0):
;
; 64-bit MASM doesn't support MMX instructions, so use opcode here
;
DB 0x48, 0xf, 0x6e, 0xc1
movq mm0, rcx
ret

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@ -1,6 +1,6 @@
;------------------------------------------------------------------------------
;
; Copyright (c) 2006, Intel Corporation. All rights reserved.<BR>
; Copyright (c) 2006 - 2022, Intel Corporation. All rights reserved.<BR>
; SPDX-License-Identifier: BSD-2-Clause-Patent
;
; Module Name:
@ -27,9 +27,6 @@
;------------------------------------------------------------------------------
global ASM_PFX(AsmWriteMm1)
ASM_PFX(AsmWriteMm1):
;
; 64-bit MASM doesn't support MMX instructions, so use opcode here
;
DB 0x48, 0xf, 0x6e, 0xc9
movq mm1, rcx
ret

View File

@ -1,6 +1,6 @@
;------------------------------------------------------------------------------
;
; Copyright (c) 2006, Intel Corporation. All rights reserved.<BR>
; Copyright (c) 2006 - 2022, Intel Corporation. All rights reserved.<BR>
; SPDX-License-Identifier: BSD-2-Clause-Patent
;
; Module Name:
@ -27,9 +27,6 @@
;------------------------------------------------------------------------------
global ASM_PFX(AsmWriteMm2)
ASM_PFX(AsmWriteMm2):
;
; 64-bit MASM doesn't support MMX instructions, so use opcode here
;
DB 0x48, 0xf, 0x6e, 0xd1
movq mm2, rcx
ret

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@ -1,6 +1,6 @@
;------------------------------------------------------------------------------
;
; Copyright (c) 2006, Intel Corporation. All rights reserved.<BR>
; Copyright (c) 2006 - 2022, Intel Corporation. All rights reserved.<BR>
; SPDX-License-Identifier: BSD-2-Clause-Patent
;
; Module Name:
@ -27,9 +27,6 @@
;------------------------------------------------------------------------------
global ASM_PFX(AsmWriteMm3)
ASM_PFX(AsmWriteMm3):
;
; 64-bit MASM doesn't support MMX instructions, so use opcode here
;
DB 0x48, 0xf, 0x6e, 0xd9
movq mm3, rcx
ret

View File

@ -1,6 +1,6 @@
;------------------------------------------------------------------------------
;
; Copyright (c) 2006, Intel Corporation. All rights reserved.<BR>
; Copyright (c) 2006 - 2022, Intel Corporation. All rights reserved.<BR>
; SPDX-License-Identifier: BSD-2-Clause-Patent
;
; Module Name:
@ -27,9 +27,6 @@
;------------------------------------------------------------------------------
global ASM_PFX(AsmWriteMm4)
ASM_PFX(AsmWriteMm4):
;
; 64-bit MASM doesn't support MMX instructions, so use opcode here
;
DB 0x48, 0xf, 0x6e, 0xe1
movq mm4, rcx
ret

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@ -1,6 +1,6 @@
;------------------------------------------------------------------------------
;
; Copyright (c) 2006, Intel Corporation. All rights reserved.<BR>
; Copyright (c) 2006 - 2022, Intel Corporation. All rights reserved.<BR>
; SPDX-License-Identifier: BSD-2-Clause-Patent
;
; Module Name:
@ -27,9 +27,6 @@
;------------------------------------------------------------------------------
global ASM_PFX(AsmWriteMm5)
ASM_PFX(AsmWriteMm5):
;
; 64-bit MASM doesn't support MMX instructions, so use opcode here
;
DB 0x48, 0xf, 0x6e, 0xe9
movq mm5, rcx
ret

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@ -1,6 +1,6 @@
;------------------------------------------------------------------------------
;
; Copyright (c) 2006, Intel Corporation. All rights reserved.<BR>
; Copyright (c) 2006 - 2022, Intel Corporation. All rights reserved.<BR>
; SPDX-License-Identifier: BSD-2-Clause-Patent
;
; Module Name:
@ -27,9 +27,6 @@
;------------------------------------------------------------------------------
global ASM_PFX(AsmWriteMm6)
ASM_PFX(AsmWriteMm6):
;
; 64-bit MASM doesn't support MMX instructions, so use opcode here
;
DB 0x48, 0xf, 0x6e, 0xf1
movq mm6, rcx
ret

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@ -1,6 +1,6 @@
;------------------------------------------------------------------------------
;
; Copyright (c) 2006, Intel Corporation. All rights reserved.<BR>
; Copyright (c) 2006 - 2022, Intel Corporation. All rights reserved.<BR>
; SPDX-License-Identifier: BSD-2-Clause-Patent
;
; Module Name:
@ -27,9 +27,6 @@
;------------------------------------------------------------------------------
global ASM_PFX(AsmWriteMm7)
ASM_PFX(AsmWriteMm7):
;
; 64-bit MASM doesn't support MMX instructions, so use opcode here
;
DB 0x48, 0xf, 0x6e, 0xf9
movq mm7, rcx
ret

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@ -1,6 +1,6 @@
;------------------------------------------------------------------------------
;
; Copyright (c) 2006, Intel Corporation. All rights reserved.<BR>
; Copyright (c) 2006 - 2022, Intel Corporation. All rights reserved.<BR>
; SPDX-License-Identifier: BSD-2-Clause-Patent
;
; Module Name:
@ -44,15 +44,15 @@ ASM_PFX(InternalMemCopyMem):
and r8, 7
shr rcx, 3 ; rcx <- # of Qwords to copy
jz @CopyBytes
DB 0x49, 0xf, 0x7e, 0xc2 ; movd r10, mm0 (Save mm0 in r10)
movq r10, mm0
.1:
DB 0xf, 0x6f, 0x6 ; movd mm0, [rsi]
DB 0xf, 0xe7, 0x7 ; movntq [rdi], mm0
movq mm0, [rsi]
movntq [rdi], mm0
add rsi, 8
add rdi, 8
loop .1
mfence
DB 0x49, 0xf, 0x6e, 0xc2 ; movd mm0, r10 (Restore mm0)
movq mm0, r10
jmp @CopyBytes
@CopyBackward:
mov rsi, r9 ; rsi <- End of Source

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@ -1,6 +1,6 @@
;------------------------------------------------------------------------------
;
; Copyright (c) 2006, Intel Corporation. All rights reserved.<BR>
; Copyright (c) 2006 - 2022, Intel Corporation. All rights reserved.<BR>
; SPDX-License-Identifier: BSD-2-Clause-Patent
;
; Module Name:
@ -32,16 +32,16 @@ ASM_PFX(InternalMemSetMem):
push rdi
mov rax, r8
mov ah, al
DB 0x48, 0xf, 0x6e, 0xc0 ; movd mm0, rax
movq mm0, rax
mov r8, rcx
mov rdi, r8 ; rdi <- Buffer
mov rcx, rdx
and edx, 7
shr rcx, 3
jz @SetBytes
DB 0xf, 0x70, 0xC0, 0x0 ; pshufw mm0, mm0, 0h
pshufw mm0, mm0, 0
.0:
DB 0xf, 0xe7, 0x7 ; movntq [rdi], mm0
movntq [rdi], mm0
add rdi, 8
loop .0
mfence

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@ -1,6 +1,6 @@
;------------------------------------------------------------------------------
;
; Copyright (c) 2006, Intel Corporation. All rights reserved.<BR>
; Copyright (c) 2006 - 2022, Intel Corporation. All rights reserved.<BR>
; SPDX-License-Identifier: BSD-2-Clause-Patent
;
; Module Name:
@ -31,16 +31,16 @@ global ASM_PFX(InternalMemSetMem16)
ASM_PFX(InternalMemSetMem16):
push rdi
mov rax, r8
DB 0x48, 0xf, 0x6e, 0xc0 ; movd mm0, rax
movq mm0, rax
mov r8, rcx
mov rdi, r8
mov rcx, rdx
and edx, 3
shr rcx, 2
jz @SetWords
DB 0xf, 0x70, 0xC0, 0x0 ; pshufw mm0, mm0, 0h
pshufw mm0, mm0, 0
.0:
DB 0xf, 0xe7, 0x7 ; movntq [rdi], mm0
movntq [rdi], mm0
add rdi, 8
loop .0
mfence

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@ -1,6 +1,6 @@
;------------------------------------------------------------------------------
;
; Copyright (c) 2006, Intel Corporation. All rights reserved.<BR>
; Copyright (c) 2006 - 2022, Intel Corporation. All rights reserved.<BR>
; SPDX-License-Identifier: BSD-2-Clause-Patent
;
; Module Name:
@ -28,20 +28,20 @@
;------------------------------------------------------------------------------
global ASM_PFX(InternalMemSetMem32)
ASM_PFX(InternalMemSetMem32):
DB 0x49, 0xf, 0x6e, 0xc0 ; movd mm0, r8 (Value)
movq mm0, r8
mov rax, rcx ; rax <- Buffer
xchg rcx, rdx ; rcx <- Count rdx <- Buffer
shr rcx, 1 ; rcx <- # of qwords to set
jz @SetDwords
DB 0xf, 0x70, 0xC0, 0x44 ; pshufw mm0, mm0, 44h
pshufw mm0, mm0, 44h
.0:
DB 0xf, 0xe7, 0x2 ; movntq [rdx], mm0
movntq [rdx], mm0
lea rdx, [rdx + 8] ; use "lea" to avoid flag changes
loop .0
mfence
@SetDwords:
jnc .1
DB 0xf, 0x7e, 0x2 ; movd [rdx], mm0
movd [rdx], mm0
.1:
ret

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@ -1,6 +1,6 @@
;------------------------------------------------------------------------------
;
; Copyright (c) 2006, Intel Corporation. All rights reserved.<BR>
; Copyright (c) 2006 - 2022, Intel Corporation. All rights reserved.<BR>
; SPDX-License-Identifier: BSD-2-Clause-Patent
;
; Module Name:
@ -28,11 +28,11 @@
;------------------------------------------------------------------------------
global ASM_PFX(InternalMemSetMem64)
ASM_PFX(InternalMemSetMem64):
DB 0x49, 0xf, 0x6e, 0xc0 ; movd mm0, r8 (Value)
movq mm0, r8
mov rax, rcx ; rax <- Buffer
xchg rcx, rdx ; rcx <- Count
.0:
DB 0xf, 0xe7, 0x2 ; movntq [rdx], mm0
movntq [rdx], mm0
add rdx, 8
loop .0
mfence

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@ -1,6 +1,6 @@
;------------------------------------------------------------------------------
;
; Copyright (c) 2006, Intel Corporation. All rights reserved.<BR>
; Copyright (c) 2006 - 2022, Intel Corporation. All rights reserved.<BR>
; SPDX-License-Identifier: BSD-2-Clause-Patent
;
; Module Name:
@ -34,12 +34,12 @@ ASM_PFX(InternalMemZeroMem):
and edx, 7
shr rcx, 3
jz @ZeroBytes
DB 0xf, 0xef, 0xc0 ; pxor mm0, mm0
pxor mm0, mm0
.0:
DB 0xf, 0xe7, 7 ; movntq [rdi], mm0
movntq [rdi], mm0
add rdi, 8
loop .0
DB 0xf, 0xae, 0xf0 ; mfence
mfence
@ZeroBytes:
xor eax, eax
mov ecx, edx