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1. Impl PI 1.2 PCI part. Major changes include:

Browse Source 
a. Update PciBusDxe module, and move it from IntelFrameworkModulePkg to MdeModulePkg
  b. Move IncompatiblePciDeviceSupportDxe module from IntelFrameworkModulePkg to MdeModulePkg
  c. Update the related consumes in inf/dsc/fdf

git-svn-id: https://edk2.svn.sourceforge.net/svnroot/edk2/trunk/edk2@9346 6f19259b-4bc3-4df7-8a09-765794883524
This commit is contained in:
davidhuang 2009-10-20 03:43:09 +00:00
parent f8a1c229b3
commit d47bdf8499
33 changed files with 0 additions and 17995 deletions

388
IntelFrameworkModulePkg/Bus/Pci/IncompatiblePciDeviceSupportDxe/IncompatiblePciDeviceSupport.c

@ -1,388 +0,0 @@
/** @file
This module is one template module for Incompatible PCI Device Support protocol.
It includes one incompatile pci devices list template.
Incompatible PCI Device Support protocol allows the PCI bus driver to support
resource allocation for some PCI devices that do not comply with the PCI Specification.
Copyright (c) 2009, Intel Corporation
All rights reserved. This program and the accompanying materials
are licensed and made available under the terms and conditions of the BSD License
which accompanies this distribution. The full text of the license may be found at
http://opensource.org/licenses/bsd-license.php
THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
**/
#include <FrameworkDxe.h>
#include <Protocol/IncompatiblePciDeviceSupport.h>
#include <Library/UefiBootServicesTableLib.h>
#include <Library/MemoryAllocationLib.h>
#include <Library/DebugLib.h>
#include <IndustryStandard/Pci.h>
#include <IndustryStandard/Acpi.h>
typedef struct {
UINT64 VendorId;
UINT64 DeviceId;
UINT64 RevisionId;
UINT64 SubsystemVendorId;
UINT64 SubsystemDeviceId;
} EFI_PCI_DEVICE_HEADER_INFO;
typedef struct {
UINT64 ResType;
UINT64 GenFlag;
UINT64 SpecificFlag;
UINT64 AddrSpaceGranularity;
UINT64 AddrRangeMin;
UINT64 AddrRangeMax;
UINT64 AddrTranslationOffset;
UINT64 AddrLen;
} EFI_PCI_RESOUCE_DESCRIPTOR;
#define PCI_DEVICE_ID(VendorId, DeviceId, Revision, SubVendorId, SubDeviceId) \
VendorId, DeviceId, Revision, SubVendorId, SubDeviceId
#define PCI_BAR_TYPE_IO ACPI_ADDRESS_SPACE_TYPE_IO
#define PCI_BAR_TYPE_MEM ACPI_ADDRESS_SPACE_TYPE_MEM
#define DEVICE_INF_TAG 0xFFF2
#define DEVICE_RES_TAG 0xFFF1
#define LIST_END_TAG 0x0000
/**
Returns a list of ACPI resource descriptors that detail the special
resource configuration requirements for an incompatible PCI device.
@param This Pointer to the EFI_INCOMPATIBLE_PCI_DEVICE_SUPPORT_PROTOCOL instance.
@param VendorId A unique ID to identify the manufacturer of the PCI device.
@param DeviceId A unique ID to identify the particular PCI device.
@param RevisionId A PCI device-specific revision identifier.
@param SubsystemVendorId Specifies the subsystem vendor ID.
@param SubsystemDeviceId Specifies the subsystem device ID.
@param Configuration A list of ACPI resource descriptors returned that detail
the configuration requirement.
@retval EFI_SUCCESS Successfully got ACPI resource for specified PCI device.
@retval EFI_INVALID_PARAMETER Configuration is NULL.
@retval EFI_OUT_OF_RESOURCES No memory available.
@retval EFI_UNSUPPORTED The specified PCI device wasn't supported.
**/
EFI_STATUS
EFIAPI
PCheckDevice (
IN EFI_INCOMPATIBLE_PCI_DEVICE_SUPPORT_PROTOCOL *This,
IN UINTN VendorId,
IN UINTN DeviceId,
IN UINTN RevisionId,
IN UINTN SubsystemVendorId,
IN UINTN SubsystemDeviceId,
OUT VOID **Configuration
);
//
// Handle onto which the Incompatible PCI Device List is installed
//
EFI_HANDLE mIncompatiblePciDeviceSupportHandle = NULL;
//
// The Incompatible PCI Device Support Protocol instance produced by this driver
//
EFI_INCOMPATIBLE_PCI_DEVICE_SUPPORT_PROTOCOL mIncompatiblePciDeviceSupport = {
PCheckDevice
};
//
// The incompatible PCI devices list template
//
GLOBAL_REMOVE_IF_UNREFERENCED UINT64 mIncompatiblePciDeviceList[] = {
//
// DEVICE_INF_TAG,
// PCI_DEVICE_ID (VendorID, DeviceID, Revision, SubVendorId, SubDeviceId),
// DEVICE_RES_TAG,
// ResType, GFlag , SFlag, Granularity, RangeMin,
// RangeMax, Offset, AddrLen
//
//
// Device Adaptec 9004
//
DEVICE_INF_TAG,
PCI_DEVICE_ID(0x9004, DEVICE_ID_NOCARE, DEVICE_ID_NOCARE, DEVICE_ID_NOCARE, DEVICE_ID_NOCARE),
DEVICE_RES_TAG,
PCI_BAR_TYPE_IO,
PCI_ACPI_UNUSED,
PCI_ACPI_UNUSED,
PCI_ACPI_UNUSED,
PCI_ACPI_UNUSED,
PCI_BAR_EVEN_ALIGN,
PCI_BAR_ALL,
PCI_BAR_NOCHANGE,
//
// Device Adaptec 9005
//
DEVICE_INF_TAG,
PCI_DEVICE_ID(0x9005, DEVICE_ID_NOCARE, DEVICE_ID_NOCARE, DEVICE_ID_NOCARE, DEVICE_ID_NOCARE),
DEVICE_RES_TAG,
PCI_BAR_TYPE_IO,
PCI_ACPI_UNUSED,
PCI_ACPI_UNUSED,
PCI_ACPI_UNUSED,
PCI_ACPI_UNUSED,
PCI_BAR_EVEN_ALIGN,
PCI_BAR_ALL,
PCI_BAR_NOCHANGE,
//
// Device QLogic 1007
//
DEVICE_INF_TAG,
PCI_DEVICE_ID(0x1077, DEVICE_ID_NOCARE, DEVICE_ID_NOCARE, DEVICE_ID_NOCARE, DEVICE_ID_NOCARE),
DEVICE_RES_TAG,
PCI_BAR_TYPE_IO,
PCI_ACPI_UNUSED,
PCI_ACPI_UNUSED,
PCI_ACPI_UNUSED,
PCI_ACPI_UNUSED,
PCI_BAR_EVEN_ALIGN,
PCI_BAR_ALL,
PCI_BAR_NOCHANGE,
//
// Device Agilent 103C
//
DEVICE_INF_TAG,
PCI_DEVICE_ID(0x103C, DEVICE_ID_NOCARE, DEVICE_ID_NOCARE, DEVICE_ID_NOCARE, DEVICE_ID_NOCARE),
DEVICE_RES_TAG,
PCI_BAR_TYPE_IO,
PCI_ACPI_UNUSED,
PCI_ACPI_UNUSED,
PCI_ACPI_UNUSED,
PCI_ACPI_UNUSED,
PCI_BAR_EVEN_ALIGN,
PCI_BAR_ALL,
PCI_BAR_NOCHANGE,
//
// Device Agilent 15BC
//
DEVICE_INF_TAG,
PCI_DEVICE_ID(0x15BC, DEVICE_ID_NOCARE, DEVICE_ID_NOCARE, DEVICE_ID_NOCARE, DEVICE_ID_NOCARE),
DEVICE_RES_TAG,
PCI_BAR_TYPE_IO,
PCI_ACPI_UNUSED,
PCI_ACPI_UNUSED,
PCI_ACPI_UNUSED,
PCI_ACPI_UNUSED,
PCI_BAR_EVEN_ALIGN,
PCI_BAR_ALL,
PCI_BAR_NOCHANGE,
//
// The end of the list
//
LIST_END_TAG
};
/**
Entry point of the incompatible pci device support code. Setup an incompatible device list template
and install EFI Incompatible PCI Device Support protocol.
@param ImageHandle A handle for the image that is initializing this driver.
@param SystemTable A pointer to the EFI system table.
@retval EFI_SUCCESS Installed EFI Incompatible PCI Device Support Protocol successfully.
@retval others Failed to install protocol.
**/
EFI_STATUS
EFIAPI
IncompatiblePciDeviceSupportEntryPoint (
IN EFI_HANDLE ImageHandle,
IN EFI_SYSTEM_TABLE *SystemTable
)
{
EFI_STATUS Status;
//
// Install EFI Incompatible PCI Device Support Protocol on a new handle
//
Status = gBS->InstallProtocolInterface (
&mIncompatiblePciDeviceSupportHandle,
&gEfiIncompatiblePciDeviceSupportProtocolGuid,
EFI_NATIVE_INTERFACE,
&mIncompatiblePciDeviceSupport
);
ASSERT_EFI_ERROR (Status);
return Status;
}
/**
Returns a list of ACPI resource descriptors that detail the special
resource configuration requirements for an incompatible PCI device.
@param This Pointer to the EFI_INCOMPATIBLE_PCI_DEVICE_SUPPORT_PROTOCOL instance.
@param VendorId A unique ID to identify the manufacturer of the PCI device.
@param DeviceId A unique ID to identify the particular PCI device.
@param RevisionId A PCI device-specific revision identifier.
@param SubsystemVendorId Specifies the subsystem vendor ID.
@param SubsystemDeviceId Specifies the subsystem device ID.
@param Configuration A list of ACPI resource descriptors returned that detail
the configuration requirement.
@retval EFI_SUCCESS Successfully got ACPI resource for specified PCI device.
@retval EFI_INVALID_PARAMETER Configuration is NULL.
@retval EFI_OUT_OF_RESOURCES No memory available.
@retval EFI_UNSUPPORTED The specified PCI device wasn't supported.
**/
EFI_STATUS
EFIAPI
PCheckDevice (
IN EFI_INCOMPATIBLE_PCI_DEVICE_SUPPORT_PROTOCOL *This,
IN UINTN VendorId,
IN UINTN DeviceId,
IN UINTN RevisionId,
IN UINTN SubsystemVendorId,
IN UINTN SubsystemDeviceId,
OUT VOID **Configuration
)
{
UINT64 Tag;
UINT64 *ListPtr;
UINT64 *TempListPtr;
EFI_PCI_DEVICE_HEADER_INFO *Header;
EFI_ACPI_ADDRESS_SPACE_DESCRIPTOR *AcpiPtr;
EFI_ACPI_ADDRESS_SPACE_DESCRIPTOR *OldAcpiPtr;
EFI_PCI_RESOUCE_DESCRIPTOR *Dsc;
EFI_ACPI_END_TAG_DESCRIPTOR *PtrEnd;
UINTN Index;
//
// Validate the parameters
//
if (Configuration == NULL) {
return EFI_INVALID_PARAMETER;
}
//
// Initialize the return value to NULL
//
* (VOID **) Configuration = NULL;
ListPtr = mIncompatiblePciDeviceList;
while (*ListPtr != LIST_END_TAG) {
Tag = *ListPtr;
switch (Tag) {
case DEVICE_INF_TAG:
Header = (EFI_PCI_DEVICE_HEADER_INFO *) (ListPtr + 1);
ListPtr = ListPtr + 1 + sizeof (EFI_PCI_DEVICE_HEADER_INFO) / sizeof (UINT64);
//
// See if the Header matches the parameters passed in
//
if (Header->VendorId != DEVICE_ID_NOCARE) {
if (Header->VendorId != VendorId) {
continue;
}
}
if (Header->DeviceId != DEVICE_ID_NOCARE) {
if (DeviceId != Header->DeviceId) {
continue;
}
}
if (Header->RevisionId != DEVICE_ID_NOCARE) {
if (RevisionId != Header->RevisionId) {
continue;
}
}
if (Header->SubsystemVendorId != DEVICE_ID_NOCARE) {
if (SubsystemVendorId != Header->SubsystemVendorId) {
continue;
}
}
if (Header->SubsystemDeviceId != DEVICE_ID_NOCARE) {
if (SubsystemDeviceId != Header->SubsystemDeviceId) {
continue;
}
}
//
// Matched an item, so construct the ACPI descriptor for the resource.
//
//
// Count the resource items so that to allocate space
//
for (Index = 0, TempListPtr = ListPtr; *TempListPtr == DEVICE_RES_TAG; Index++) {
TempListPtr = TempListPtr + 1 + ((sizeof (EFI_PCI_RESOUCE_DESCRIPTOR)) / sizeof (UINT64));
}
//
// If there is at least one type of resource request,
// allocate an acpi resource node
//
if (Index == 0) {
return EFI_UNSUPPORTED;
}
AcpiPtr = AllocateZeroPool (sizeof (EFI_ACPI_ADDRESS_SPACE_DESCRIPTOR) * Index + sizeof (EFI_ACPI_END_TAG_DESCRIPTOR));
if (AcpiPtr == NULL) {
return EFI_OUT_OF_RESOURCES;
}
OldAcpiPtr = AcpiPtr;
//
// Fill the EFI_ACPI_ADDRESS_SPACE_DESCRIPTOR structure
// according to the EFI_PCI_RESOUCE_DESCRIPTOR structure
//
for (; *ListPtr == DEVICE_RES_TAG;) {
Dsc = (EFI_PCI_RESOUCE_DESCRIPTOR *) (ListPtr + 1);
AcpiPtr->Desc = ACPI_ADDRESS_SPACE_DESCRIPTOR;
AcpiPtr->Len = sizeof (EFI_ACPI_ADDRESS_SPACE_DESCRIPTOR);
AcpiPtr->ResType = (UINT8) Dsc->ResType;
AcpiPtr->GenFlag = (UINT8) Dsc->GenFlag;
AcpiPtr->SpecificFlag = (UINT8) Dsc->SpecificFlag;
AcpiPtr->AddrSpaceGranularity = Dsc->AddrSpaceGranularity;;
AcpiPtr->AddrRangeMin = Dsc->AddrRangeMin;
AcpiPtr->AddrRangeMax = Dsc->AddrRangeMax;
AcpiPtr->AddrTranslationOffset = Dsc->AddrTranslationOffset;
AcpiPtr->AddrLen = Dsc->AddrLen;
ListPtr = ListPtr + 1 + ((sizeof (EFI_PCI_RESOUCE_DESCRIPTOR)) / sizeof (UINT64));
AcpiPtr++;
}
//
// Put the checksum
//
PtrEnd = (EFI_ACPI_END_TAG_DESCRIPTOR *) (AcpiPtr);
PtrEnd->Desc = ACPI_END_TAG_DESCRIPTOR;
PtrEnd->Checksum = 0;
*(VOID **) Configuration = OldAcpiPtr;
return EFI_SUCCESS;
case DEVICE_RES_TAG:
//
// Adjust the pointer to the next PCI resource descriptor item
//
ListPtr = ListPtr + 1 + ((sizeof (EFI_PCI_RESOUCE_DESCRIPTOR)) / sizeof (UINT64));
break;
default:
return EFI_UNSUPPORTED;
}
}
return EFI_UNSUPPORTED;
}

50
IntelFrameworkModulePkg/Bus/Pci/IncompatiblePciDeviceSupportDxe/IncompatiblePciDeviceSupportDxe.inf

@ -1,50 +0,0 @@
#/** @file
# PCI Incompatible device support module template.
#
# Installs EFI PCI Incompatible Device Support protocol and includes one incompatile
# pci devices list template.
#
# Copyright (c) 2009, Intel Corporation.
#
# All rights reserved. This program and the accompanying materials
# are licensed and made available under the terms and conditions of the BSD License
# which accompanies this distribution. The full text of the license may be found at
# http://opensource.org/licenses/bsd-license.php
# THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
# WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
#
#
#**/
[Defines]
INF_VERSION = 0x00010005
BASE_NAME = IncompatiblePciDeviceSupport
FILE_GUID = AD70855E-0CC5-4abf-8979-BE762A949EA3
MODULE_TYPE = DXE_DRIVER
VERSION_STRING = 1.0
ENTRY_POINT = IncompatiblePciDeviceSupportEntryPoint
#
# The following information is for reference only and not required by the build tools.
#
# VALID_ARCHITECTURES = IA32 X64 IPF EBC
#
[Sources.common]
IncompatiblePciDeviceSupport.c
[Packages]
MdePkg/MdePkg.dec
IntelFrameworkPkg/IntelFrameworkPkg.dec
[LibraryClasses]
UefiDriverEntryPoint
UefiBootServicesTableLib
MemoryAllocationLib
DebugLib
[Protocols]
gEfiIncompatiblePciDeviceSupportProtocolGuid ## PRODUCEDS
[Depex]
TRUE

176
IntelFrameworkModulePkg/Bus/Pci/PciBusDxe/ComponentName.c

@ -1,176 +0,0 @@
/** @file
EFI Component Name functions implementation for PCI Bus module.
Copyright (c) 2006 - 2009, Intel Corporation
All rights reserved. This program and the accompanying materials
are licensed and made available under the terms and conditions of the BSD License
which accompanies this distribution. The full text of the license may be found at
http://opensource.org/licenses/bsd-license.php
THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
**/
#include "PciBus.h"
//
// EFI Component Name Protocol
//
GLOBAL_REMOVE_IF_UNREFERENCED EFI_COMPONENT_NAME_PROTOCOL gPciBusComponentName = {
PciBusComponentNameGetDriverName,
PciBusComponentNameGetControllerName,
"eng"
};
//
// EFI Component Name 2 Protocol
//
GLOBAL_REMOVE_IF_UNREFERENCED EFI_COMPONENT_NAME2_PROTOCOL gPciBusComponentName2 = {
(EFI_COMPONENT_NAME2_GET_DRIVER_NAME) PciBusComponentNameGetDriverName,
(EFI_COMPONENT_NAME2_GET_CONTROLLER_NAME) PciBusComponentNameGetControllerName,
"en"
};
GLOBAL_REMOVE_IF_UNREFERENCED EFI_UNICODE_STRING_TABLE mPciBusDriverNameTable[] = {
{ "eng;en", (CHAR16 *) L"PCI Bus Driver" },
{ NULL , NULL }
};
/**
Retrieves a Unicode string that is the user readable name of the driver.
This function retrieves the user readable name of a driver in the form of a
Unicode string. If the driver specified by This has a user readable name in
the language specified by Language, then a pointer to the driver name is
returned in DriverName, and EFI_SUCCESS is returned. If the driver specified
by This does not support the language specified by Language,
then EFI_UNSUPPORTED is returned.
@param This[in] A pointer to the EFI_COMPONENT_NAME2_PROTOCOL or
EFI_COMPONENT_NAME_PROTOCOL instance.
@param Language[in] A pointer to a Null-terminated ASCII string
array indicating the language. This is the
language of the driver name that the caller is
requesting, and it must match one of the
languages specified in SupportedLanguages. The
number of languages supported by a driver is up
to the driver writer. Language is specified
in RFC 4646 or ISO 639-2 language code format.
@param DriverName[out] A pointer to the Unicode string to return.
This Unicode string is the name of the
driver specified by This in the language
specified by Language.
@retval EFI_SUCCESS The Unicode string for the Driver specified by
This and the language specified by Language was
returned in DriverName.
@retval EFI_INVALID_PARAMETER Language is NULL.
@retval EFI_INVALID_PARAMETER DriverName is NULL.
@retval EFI_UNSUPPORTED The driver specified by This does not support
the language specified by Language.
**/
EFI_STATUS
EFIAPI
PciBusComponentNameGetDriverName (
IN EFI_COMPONENT_NAME_PROTOCOL *This,
IN CHAR8 *Language,
OUT CHAR16 **DriverName
)
{
return LookupUnicodeString2 (
Language,
This->SupportedLanguages,
mPciBusDriverNameTable,
DriverName,
(BOOLEAN)(This == &gPciBusComponentName)
);
}
/**
Retrieves a Unicode string that is the user readable name of the controller
that is being managed by a driver.
This function retrieves the user readable name of the controller specified by
ControllerHandle and ChildHandle in the form of a Unicode string. If the
driver specified by This has a user readable name in the language specified by
Language, then a pointer to the controller name is returned in ControllerName,
and EFI_SUCCESS is returned. If the driver specified by This is not currently
managing the controller specified by ControllerHandle and ChildHandle,
then EFI_UNSUPPORTED is returned. If the driver specified by This does not
support the language specified by Language, then EFI_UNSUPPORTED is returned.
@param This[in] A pointer to the EFI_COMPONENT_NAME2_PROTOCOL or
EFI_COMPONENT_NAME_PROTOCOL instance.
@param ControllerHandle[in] The handle of a controller that the driver
specified by This is managing. This handle
specifies the controller whose name is to be
returned.
@param ChildHandle[in] The handle of the child controller to retrieve
the name of. This is an optional parameter that
may be NULL. It will be NULL for device
drivers. It will also be NULL for a bus drivers
that wish to retrieve the name of the bus
controller. It will not be NULL for a bus
driver that wishes to retrieve the name of a
child controller.
@param Language[in] A pointer to a Null-terminated ASCII string
array indicating the language. This is the
language of the driver name that the caller is
requesting, and it must match one of the
languages specified in SupportedLanguages. The
number of languages supported by a driver is up
to the driver writer. Language is specified in
RFC 4646 or ISO 639-2 language code format.
@param ControllerName[out] A pointer to the Unicode string to return.
This Unicode string is the name of the
controller specified by ControllerHandle and
ChildHandle in the language specified by
Language from the point of view of the driver
specified by This.
@retval EFI_SUCCESS The Unicode string for the user readable name in
the language specified by Language for the
driver specified by This was returned in
DriverName.
@retval EFI_INVALID_PARAMETER ControllerHandle is not a valid EFI_HANDLE.
@retval EFI_INVALID_PARAMETER ChildHandle is not NULL and it is not a valid
EFI_HANDLE.
@retval EFI_INVALID_PARAMETER Language is NULL.
@retval EFI_INVALID_PARAMETER ControllerName is NULL.
@retval EFI_UNSUPPORTED The driver specified by This is not currently
managing the controller specified by
ControllerHandle and ChildHandle.
@retval EFI_UNSUPPORTED The driver specified by This does not support
the language specified by Language.
**/
EFI_STATUS
EFIAPI
PciBusComponentNameGetControllerName (
IN EFI_COMPONENT_NAME_PROTOCOL *This,
IN EFI_HANDLE ControllerHandle,
IN EFI_HANDLE ChildHandle OPTIONAL,
IN CHAR8 *Language,
OUT CHAR16 **ControllerName
)
{
return EFI_UNSUPPORTED;
}

152
IntelFrameworkModulePkg/Bus/Pci/PciBusDxe/ComponentName.h

@ -1,152 +0,0 @@
/** @file
EFI Component Name functions declaration for PCI Bus module.
Copyright (c) 2006 - 2009, Intel Corporation
All rights reserved. This program and the accompanying materials
are licensed and made available under the terms and conditions of the BSD License
which accompanies this distribution. The full text of the license may be found at
http://opensource.org/licenses/bsd-license.php
THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
**/
#ifndef _EFI_PCI_BUS_COMPONENT_NAME_H_
#define _EFI_PCI_BUS_COMPONENT_NAME_H_
extern EFI_COMPONENT_NAME_PROTOCOL gPciBusComponentName;
extern EFI_COMPONENT_NAME2_PROTOCOL gPciBusComponentName2;
//
// EFI Component Name Functions
//
/**
Retrieves a Unicode string that is the user readable name of the driver.
This function retrieves the user readable name of a driver in the form of a
Unicode string. If the driver specified by This has a user readable name in
the language specified by Language, then a pointer to the driver name is
returned in DriverName, and EFI_SUCCESS is returned. If the driver specified
by This does not support the language specified by Language,
then EFI_UNSUPPORTED is returned.
@param This[in] A pointer to the EFI_COMPONENT_NAME2_PROTOCOL or
EFI_COMPONENT_NAME_PROTOCOL instance.
@param Language[in] A pointer to a Null-terminated ASCII string
array indicating the language. This is the
language of the driver name that the caller is
requesting, and it must match one of the
languages specified in SupportedLanguages. The
number of languages supported by a driver is up
to the driver writer. Language is specified
in RFC 4646 or ISO 639-2 language code format.
@param DriverName[out] A pointer to the Unicode string to return.
This Unicode string is the name of the
driver specified by This in the language
specified by Language.
@retval EFI_SUCCESS The Unicode string for the Driver specified by
This and the language specified by Language was
returned in DriverName.
@retval EFI_INVALID_PARAMETER Language is NULL.
@retval EFI_INVALID_PARAMETER DriverName is NULL.
@retval EFI_UNSUPPORTED The driver specified by This does not support
the language specified by Language.
**/
EFI_STATUS
EFIAPI
PciBusComponentNameGetDriverName (
IN EFI_COMPONENT_NAME_PROTOCOL *This,
IN CHAR8 *Language,
OUT CHAR16 **DriverName
);
/**
Retrieves a Unicode string that is the user readable name of the controller
that is being managed by a driver.
This function retrieves the user readable name of the controller specified by
ControllerHandle and ChildHandle in the form of a Unicode string. If the
driver specified by This has a user readable name in the language specified by
Language, then a pointer to the controller name is returned in ControllerName,
and EFI_SUCCESS is returned. If the driver specified by This is not currently
managing the controller specified by ControllerHandle and ChildHandle,
then EFI_UNSUPPORTED is returned. If the driver specified by This does not
support the language specified by Language, then EFI_UNSUPPORTED is returned.
@param This[in] A pointer to the EFI_COMPONENT_NAME2_PROTOCOL or
EFI_COMPONENT_NAME_PROTOCOL instance.
@param ControllerHandle[in] The handle of a controller that the driver
specified by This is managing. This handle
specifies the controller whose name is to be
returned.
@param ChildHandle[in] The handle of the child controller to retrieve
the name of. This is an optional parameter that
may be NULL. It will be NULL for device
drivers. It will also be NULL for a bus drivers
that wish to retrieve the name of the bus
controller. It will not be NULL for a bus
driver that wishes to retrieve the name of a
child controller.
@param Language[in] A pointer to a Null-terminated ASCII string
array indicating the language. This is the
language of the driver name that the caller is
requesting, and it must match one of the
languages specified in SupportedLanguages. The
number of languages supported by a driver is up
to the driver writer. Language is specified in
RFC 4646 or ISO 639-2 language code format.
@param ControllerName[out] A pointer to the Unicode string to return.
This Unicode string is the name of the
controller specified by ControllerHandle and
ChildHandle in the language specified by
Language from the point of view of the driver
specified by This.
@retval EFI_SUCCESS The Unicode string for the user readable name in
the language specified by Language for the
driver specified by This was returned in
DriverName.
@retval EFI_INVALID_PARAMETER ControllerHandle is not a valid EFI_HANDLE.
@retval EFI_INVALID_PARAMETER ChildHandle is not NULL and it is not a valid
EFI_HANDLE.
@retval EFI_INVALID_PARAMETER Language is NULL.
@retval EFI_INVALID_PARAMETER ControllerName is NULL.
@retval EFI_UNSUPPORTED The driver specified by This is not currently
managing the controller specified by
ControllerHandle and ChildHandle.
@retval EFI_UNSUPPORTED The driver specified by This does not support
the language specified by Language.
**/
EFI_STATUS
EFIAPI
PciBusComponentNameGetControllerName (
IN EFI_COMPONENT_NAME_PROTOCOL *This,
IN EFI_HANDLE ControllerHandle,
IN EFI_HANDLE ChildHandle OPTIONAL,
IN CHAR8 *Language,
OUT CHAR16 **ControllerName
);
#endif

368
IntelFrameworkModulePkg/Bus/Pci/PciBusDxe/PciBus.c

@ -1,368 +0,0 @@
/** @file
Driver Binding functions for PCI Bus module.
Single PCI bus driver instance will manager all PCI Root Bridges in one EFI based firmware,
since all PCI Root Bridges' resources need to be managed together.
Supported() function will try to get PCI Root Bridge IO Protocol.
Start() function will get PCI Host Bridge Resource Allocation Protocol to manage all
PCI Root Bridges. So it means platform needs install PCI Root Bridge IO protocol for each
PCI Root Bus and install PCI Host Bridge Resource Allocation Protocol.
Copyright (c) 2006 - 2009, Intel Corporation
All rights reserved. This program and the accompanying materials
are licensed and made available under the terms and conditions of the BSD License
which accompanies this distribution. The full text of the license may be found at
http://opensource.org/licenses/bsd-license.php
THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
**/
#include "PciBus.h"
//
// PCI Bus Driver Global Variables
//
EFI_DRIVER_BINDING_PROTOCOL gPciBusDriverBinding = {
PciBusDriverBindingSupported,
PciBusDriverBindingStart,
PciBusDriverBindingStop,
0xa,
NULL,
NULL
};
EFI_HANDLE gPciHostBrigeHandles[PCI_MAX_HOST_BRIDGE_NUM];
EFI_INCOMPATIBLE_PCI_DEVICE_SUPPORT_PROTOCOL *gEfiIncompatiblePciDeviceSupport = NULL;
UINTN gPciHostBridgeNumber = 0;
BOOLEAN gFullEnumeration = TRUE;
UINT64 gAllOne = 0xFFFFFFFFFFFFFFFFULL;
UINT64 gAllZero = 0;
EFI_PCI_PLATFORM_PROTOCOL *gPciPlatformProtocol;
GLOBAL_REMOVE_IF_UNREFERENCED EFI_PCI_HOTPLUG_REQUEST_PROTOCOL mPciHotPlugRequest = {
PciHotPlugRequestNotify
};
/**
The Entry Point for PCI Bus module. The user code starts with this function.
Installs driver module protocols and. Creates virtual device handles for ConIn,
ConOut, and StdErr. Installs Simple Text In protocol, Simple Text In Ex protocol,
Simple Pointer protocol, Absolute Pointer protocol on those virtual handlers.
Installs Graphics Output protocol and/or UGA Draw protocol if needed.
@param[in] ImageHandle The firmware allocated handle for the EFI image.
@param[in] SystemTable A pointer to the EFI System Table.
@retval EFI_SUCCESS The entry point is executed successfully.
@retval other Some error occurred when executing this entry point.
**/
EFI_STATUS
EFIAPI
PciBusEntryPoint (
IN EFI_HANDLE ImageHandle,
IN EFI_SYSTEM_TABLE *SystemTable
)
{
EFI_STATUS Status;
EFI_HANDLE Handle;
//
// Initializes PCI devices pool
//
InitializePciDevicePool ();
//
// Install driver model protocol(s).
//
Status = EfiLibInstallDriverBindingComponentName2 (
ImageHandle,
SystemTable,
&gPciBusDriverBinding,
ImageHandle,
&gPciBusComponentName,
&gPciBusComponentName2
);
ASSERT_EFI_ERROR (Status);
if (FeaturePcdGet (PcdPciBusHotplugDeviceSupport)) {
//
// If Hot Plug is supported, install EFI PCI Hot Plug Request protocol.
//
Handle = NULL;
Status = gBS->InstallProtocolInterface (
&Handle,
&gEfiPciHotPlugRequestProtocolGuid,
EFI_NATIVE_INTERFACE,
&mPciHotPlugRequest
);
}
return Status;
}
/**
Test to see if this driver supports ControllerHandle. Any ControllerHandle
than contains a gEfiPciRootBridgeIoProtocolGuid protocol can be supported.
@param This Protocol instance pointer.
@param Controller Handle of device to test.
@param RemainingDevicePath Optional parameter use to pick a specific child.
device to start.
@retval EFI_SUCCESS This driver supports this device.
@retval EFI_ALREADY_STARTED This driver is already running on this device.
@retval other This driver does not support this device.
**/
EFI_STATUS
EFIAPI
PciBusDriverBindingSupported (
IN EFI_DRIVER_BINDING_PROTOCOL *This,
IN EFI_HANDLE Controller,
IN EFI_DEVICE_PATH_PROTOCOL *RemainingDevicePath
)
{
EFI_STATUS Status;
EFI_DEVICE_PATH_PROTOCOL *ParentDevicePath;
EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL *PciRootBridgeIo;
EFI_DEV_PATH_PTR Node;
//
// Check RemainingDevicePath validation
//
if (RemainingDevicePath != NULL) {
//
// Check if RemainingDevicePath is the End of Device Path Node,
// if yes, go on checking other conditions
//
if (!IsDevicePathEnd (RemainingDevicePath)) {
//
// If RemainingDevicePath isn't the End of Device Path Node,
// check its validation
//
Node.DevPath = RemainingDevicePath;
if (Node.DevPath->Type != HARDWARE_DEVICE_PATH ||
Node.DevPath->SubType != HW_PCI_DP ||
DevicePathNodeLength(Node.DevPath) != sizeof(PCI_DEVICE_PATH)) {
return EFI_UNSUPPORTED;
}
}
}
//
// Check if Pci Root Bridge IO protocol is installed by platform
//
Status = gBS->OpenProtocol (
Controller,
&gEfiPciRootBridgeIoProtocolGuid,
(VOID **) &PciRootBridgeIo,
This->DriverBindingHandle,
Controller,
EFI_OPEN_PROTOCOL_BY_DRIVER
);
if (Status == EFI_ALREADY_STARTED) {
return EFI_SUCCESS;
}
if (EFI_ERROR (Status)) {
return Status;
}
//
// Close the I/O Abstraction(s) used to perform the supported test
//
gBS->CloseProtocol (
Controller,
&gEfiPciRootBridgeIoProtocolGuid,
This->DriverBindingHandle,
Controller
);
//
// Open the EFI Device Path protocol needed to perform the supported test
//
Status = gBS->OpenProtocol (
Controller,
&gEfiDevicePathProtocolGuid,
(VOID **) &ParentDevicePath,
This->DriverBindingHandle,
Controller,
EFI_OPEN_PROTOCOL_BY_DRIVER
);
if (Status == EFI_ALREADY_STARTED) {
return EFI_SUCCESS;
}
if (EFI_ERROR (Status)) {
return Status;
}
//
// Close protocol, don't use device path protocol in the Support() function
//
gBS->CloseProtocol (
Controller,
&gEfiDevicePathProtocolGuid,
This->DriverBindingHandle,
Controller
);
return EFI_SUCCESS;
}
/**
Start this driver on ControllerHandle and enumerate Pci bus and start
all device under PCI bus.
@param This Protocol instance pointer.
@param Controller Handle of device to bind driver to.
@param RemainingDevicePath Optional parameter use to pick a specific child.
device to start.
@retval EFI_SUCCESS This driver is added to ControllerHandle.
@retval EFI_ALREADY_STARTED This driver is already running on ControllerHandle.
@retval other This driver does not support this device.
**/
EFI_STATUS
EFIAPI
PciBusDriverBindingStart (
IN EFI_DRIVER_BINDING_PROTOCOL *This,
IN EFI_HANDLE Controller,
IN EFI_DEVICE_PATH_PROTOCOL *RemainingDevicePath
)
{
EFI_STATUS Status;
//
// Check RemainingDevicePath validation
//
if (RemainingDevicePath != NULL) {
//
// Check if RemainingDevicePath is the End of Device Path Node,
// if yes, return EFI_SUCCESS
//
if (IsDevicePathEnd (RemainingDevicePath)) {
return EFI_SUCCESS;
}
}
Status = gBS->LocateProtocol (
&gEfiIncompatiblePciDeviceSupportProtocolGuid,
NULL,
(VOID **) &gEfiIncompatiblePciDeviceSupport
);
//
// If PCI Platform protocol is available, get it now.
// If the platform implements this, it must be installed before BDS phase
//
gPciPlatformProtocol = NULL;
gBS->LocateProtocol (
&gEfiPciPlatformProtocolGuid,
NULL,
(VOID **) &gPciPlatformProtocol
);
gFullEnumeration = (BOOLEAN) ((SearchHostBridgeHandle (Controller) ? FALSE : TRUE));
//
// Enumerate the entire host bridge
// After enumeration, a database that records all the device information will be created
//
//
Status = PciEnumerator (Controller);
if (EFI_ERROR (Status)) {
return Status;
}
//
// Start all the devices under the entire host bridge.
//
StartPciDevices (Controller);
return EFI_SUCCESS;
}
/**
Stop this driver on ControllerHandle. Support stoping any child handles
created by this driver.
@param This Protocol instance pointer.
@param Controller Handle of device to stop driver on.
@param NumberOfChildren Number of Handles in ChildHandleBuffer. If number of
children is zero stop the entire bus driver.
@param ChildHandleBuffer List of Child Handles to Stop.
@retval EFI_SUCCESS This driver is removed ControllerHandle.
@retval other This driver was not removed from this device.
**/
EFI_STATUS
EFIAPI
PciBusDriverBindingStop (
IN EFI_DRIVER_BINDING_PROTOCOL *This,
IN EFI_HANDLE Controller,
IN UINTN NumberOfChildren,
IN EFI_HANDLE *ChildHandleBuffer
)
{
EFI_STATUS Status;
UINTN Index;
BOOLEAN AllChildrenStopped;
if (NumberOfChildren == 0) {
//
// Close the bus driver
//
gBS->CloseProtocol (
Controller,
&gEfiDevicePathProtocolGuid,
This->DriverBindingHandle,
Controller
);
gBS->CloseProtocol (
Controller,
&gEfiPciRootBridgeIoProtocolGuid,
This->DriverBindingHandle,
Controller
);
DestroyRootBridgeByHandle (
Controller
);
return EFI_SUCCESS;
}
//
// Stop all the children
//
AllChildrenStopped = TRUE;
for (Index = 0; Index < NumberOfChildren; Index++) {
//
// De register all the pci device
//
Status = DeRegisterPciDevice (Controller, ChildHandleBuffer[Index]);
if (EFI_ERROR (Status)) {
AllChildrenStopped = FALSE;
}
}
if (!AllChildrenStopped) {
return EFI_DEVICE_ERROR;
}
return EFI_SUCCESS;
}

378
IntelFrameworkModulePkg/Bus/Pci/PciBusDxe/PciBus.h

@ -1,378 +0,0 @@
/** @file
Header files and data structures needed by PCI Bus module.
Copyright (c) 2006 - 2009, Intel Corporation
All rights reserved. This program and the accompanying materials
are licensed and made available under the terms and conditions of the BSD License
which accompanies this distribution. The full text of the license may be found at
http://opensource.org/licenses/bsd-license.php
THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
**/
#ifndef _EFI_PCI_BUS_H_
#define _EFI_PCI_BUS_H_
#include <FrameworkDxe.h>
#include <Protocol/LoadedImage.h>
#include <Protocol/PciHostBridgeResourceAllocation.h>
#include <Protocol/PciIo.h>
#include <Protocol/LoadFile2.h>
#include <Protocol/PciRootBridgeIo.h>
#include <Protocol/PciHotPlugRequest.h>
#include <Protocol/DevicePath.h>
#include <Protocol/PciPlatform.h>
#include <Protocol/PciHotPlugInit.h>
#include <Protocol/Decompress.h>
#include <Protocol/BusSpecificDriverOverride.h>
#include <Protocol/IncompatiblePciDeviceSupport.h>
#include <Library/DebugLib.h>
#include <Library/UefiDriverEntryPoint.h>
#include <Library/BaseLib.h>
#include <Library/UefiLib.h>
#include <Library/BaseMemoryLib.h>
#include <Library/ReportStatusCodeLib.h>
#include <Library/MemoryAllocationLib.h>
#include <Library/UefiBootServicesTableLib.h>
#include <Library/DevicePathLib.h>
#include <Library/PcdLib.h>
#include <Library/PeCoffLib.h>
#include <IndustryStandard/Pci.h>
#include <IndustryStandard/PeImage.h>
#include <IndustryStandard/Acpi.h>
typedef struct _PCI_IO_DEVICE PCI_IO_DEVICE;
typedef struct _PCI_BAR PCI_BAR;
#define EFI_PCI_RID(Bus, Device, Function) (((UINT32)Bus << 8) + ((UINT32)Device << 3) + (UINT32)Function)
#define EFI_PCI_BUS_OF_RID(RID) ((UINT32)RID >> 8)
#define EFI_PCI_IOV_POLICY_ARI 0x0001
#define EFI_PCI_IOV_POLICY_SRIOV 0x0002
#define EFI_PCI_IOV_POLICY_MRIOV 0x0004
typedef enum {
PciBarTypeUnknown = 0,
PciBarTypeIo16,
PciBarTypeIo32,
PciBarTypeMem32,
PciBarTypePMem32,
PciBarTypeMem64,
PciBarTypePMem64,
PciBarTypeIo,
PciBarTypeMem,
PciBarTypeMaxType
} PCI_BAR_TYPE;
#include "ComponentName.h"
#include "PciIo.h"
#include "PciCommand.h"
#include "PciDeviceSupport.h"
#include "PciEnumerator.h"
#include "PciEnumeratorSupport.h"
#include "PciDriverOverride.h"
#include "PciRomTable.h"
#include "PciOptionRomSupport.h"
#include "PciPowerManagement.h"
#include "PciHotPlugSupport.h"
#include "PciLib.h"
#define VGABASE1 0x3B0
#define VGALIMIT1 0x3BB
#define VGABASE2 0x3C0
#define VGALIMIT2 0x3DF
#define ISABASE 0x100
#define ISALIMIT 0x3FF
//
// PCI BAR parameters
//
struct _PCI_BAR {
UINT64 BaseAddress;
UINT64 Length;
UINT64 Alignment;
PCI_BAR_TYPE BarType;
BOOLEAN Prefetchable;
UINT8 MemType;
UINT8 Offset;
};
//
// defined in PCI Card Specification, 8.0
//
#define PCI_CARD_MEMORY_BASE_0 0x1C
#define PCI_CARD_MEMORY_LIMIT_0 0x20
#define PCI_CARD_MEMORY_BASE_1 0x24
#define PCI_CARD_MEMORY_LIMIT_1 0x28
#define PCI_CARD_IO_BASE_0_LOWER 0x2C
#define PCI_CARD_IO_BASE_0_UPPER 0x2E
#define PCI_CARD_IO_LIMIT_0_LOWER 0x30
#define PCI_CARD_IO_LIMIT_0_UPPER 0x32
#define PCI_CARD_IO_BASE_1_LOWER 0x34
#define PCI_CARD_IO_BASE_1_UPPER 0x36
#define PCI_CARD_IO_LIMIT_1_LOWER 0x38
#define PCI_CARD_IO_LIMIT_1_UPPER 0x3A
#define PCI_CARD_BRIDGE_CONTROL 0x3E
#define PCI_CARD_PREFETCHABLE_MEMORY_0_ENABLE BIT8
#define PCI_CARD_PREFETCHABLE_MEMORY_1_ENABLE BIT9
#define PPB_BAR_0 0
#define PPB_BAR_1 1
#define PPB_IO_RANGE 2
#define PPB_MEM32_RANGE 3
#define PPB_PMEM32_RANGE 4
#define PPB_PMEM64_RANGE 5
#define PPB_MEM64_RANGE 0xFF
#define P2C_BAR_0 0
#define P2C_MEM_1 1
#define P2C_MEM_2 2
#define P2C_IO_1 3
#define P2C_IO_2 4
#define EFI_BRIDGE_IO32_DECODE_SUPPORTED 0x0001
#define EFI_BRIDGE_PMEM32_DECODE_SUPPORTED 0x0002
#define EFI_BRIDGE_PMEM64_DECODE_SUPPORTED 0x0004
#define EFI_BRIDGE_IO16_DECODE_SUPPORTED 0x0008
#define EFI_BRIDGE_PMEM_MEM_COMBINE_SUPPORTED 0x0010
#define EFI_BRIDGE_MEM64_DECODE_SUPPORTED 0x0020
#define EFI_BRIDGE_MEM32_DECODE_SUPPORTED 0x0040
#define PCI_MAX_HOST_BRIDGE_NUM 0x0010
//
// Define option for attribute
//
#define EFI_SET_SUPPORTS 0
#define EFI_SET_ATTRIBUTES 1
#define PCI_IO_DEVICE_SIGNATURE SIGNATURE_32 ('p', 'c', 'i', 'o')
struct _PCI_IO_DEVICE {
UINT32 Signature;
EFI_HANDLE Handle;
EFI_PCI_IO_PROTOCOL PciIo;
LIST_ENTRY Link;
EFI_BUS_SPECIFIC_DRIVER_OVERRIDE_PROTOCOL PciDriverOverride;
EFI_DEVICE_PATH_PROTOCOL *DevicePath;
EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL *PciRootBridgeIo;
EFI_LOAD_FILE2_PROTOCOL LoadFile2;
//
// PCI configuration space header type
//
PCI_TYPE00 Pci;
//
// Bus number, Device number, Function number
//
UINT8 BusNumber;
UINT8 DeviceNumber;
UINT8 FunctionNumber;
//
// BAR for this PCI Device
//
PCI_BAR PciBar[PCI_MAX_BAR];
//
// The bridge device this pci device is subject to
//
PCI_IO_DEVICE *Parent;
//
// A linked list for children Pci Device if it is bridge device
//
LIST_ENTRY ChildList;
//
// TURE if the PCI bus driver creates the handle for this PCI device
//
BOOLEAN Registered;
//
// TRUE if the PCI bus driver successfully allocates the resource required by
// this PCI device
//
BOOLEAN Allocated;
//
// The attribute this PCI device currently set
//
UINT64 Attributes;
//
// The attributes this PCI device actually supports
//
UINT64 Supports;
//
// The resource decode the bridge supports
//
UINT32 Decodes;
//
// The OptionRom Size
//
UINT64 RomSize;
//
// The OptionRom Size
//
UINT64 RomBase;
//
// TRUE if all OpROM (in device or in platform specific position) have been processed
//
BOOLEAN AllOpRomProcessed;
//
// TRUE if there is any EFI driver in the OptionRom
//
BOOLEAN BusOverride;
//
// A list tracking reserved resource on a bridge device
//
LIST_ENTRY ReservedResourceList;
//
// A list tracking image handle of platform specific overriding driver
//
LIST_ENTRY OptionRomDriverList;
EFI_ACPI_ADDRESS_SPACE_DESCRIPTOR *ResourcePaddingDescriptors;
EFI_HPC_PADDING_ATTRIBUTES PaddingAttributes;
BOOLEAN IsPciExp;
//
// For SR-IOV
//
UINT8 PciExpressCapabilityOffset;
UINT32 AriCapabilityOffset;
UINT32 SrIovCapabilityOffset;
UINT32 MrIovCapabilityOffset;
PCI_BAR VfPciBar[PCI_MAX_BAR];
UINT32 SystemPageSize;
UINT16 InitialVFs;
UINT16 ReservedBusNum;
};
#define PCI_IO_DEVICE_FROM_PCI_IO_THIS(a) \
CR (a, PCI_IO_DEVICE, PciIo, PCI_IO_DEVICE_SIGNATURE)
#define PCI_IO_DEVICE_FROM_PCI_DRIVER_OVERRIDE_THIS(a) \
CR (a, PCI_IO_DEVICE, PciDriverOverride, PCI_IO_DEVICE_SIGNATURE)
#define PCI_IO_DEVICE_FROM_LINK(a) \
CR (a, PCI_IO_DEVICE, Link, PCI_IO_DEVICE_SIGNATURE)
#define PCI_IO_DEVICE_FROM_LOAD_FILE2_THIS(a) \
CR (a, PCI_IO_DEVICE, LoadFile2, PCI_IO_DEVICE_SIGNATURE)
//
// Global Variables
//
extern EFI_INCOMPATIBLE_PCI_DEVICE_SUPPORT_PROTOCOL *gEfiIncompatiblePciDeviceSupport;
extern EFI_DRIVER_BINDING_PROTOCOL gPciBusDriverBinding;
extern EFI_COMPONENT_NAME_PROTOCOL gPciBusComponentName;
extern EFI_COMPONENT_NAME2_PROTOCOL gPciBusComponentName2;
extern BOOLEAN gFullEnumeration;
extern UINTN gPciHostBridgeNumber;
extern EFI_HANDLE gPciHostBrigeHandles[PCI_MAX_HOST_BRIDGE_NUM];
extern UINT64 gAllOne;
extern UINT64 gAllZero;
extern EFI_PCI_PLATFORM_PROTOCOL *gPciPlatformProtocol;
/**
Macro that checks whether device is a GFX device.
@param _p Specified device.
@retval TRUE Device is a a GFX device.
@retval FALSE Device is not a a GFX device.
**/
#define IS_PCI_GFX(_p) IS_CLASS2 (_p, PCI_CLASS_DISPLAY, PCI_CLASS_DISPLAY_OTHER)
/**
Test to see if this driver supports ControllerHandle. Any ControllerHandle
than contains a gEfiPciRootBridgeIoProtocolGuid protocol can be supported.
@param This Protocol instance pointer.
@param Controller Handle of device to test.
@param RemainingDevicePath Optional parameter use to pick a specific child.
device to start.
@retval EFI_SUCCESS This driver supports this device.
@retval EFI_ALREADY_STARTED This driver is already running on this device.
@retval other This driver does not support this device.
**/
EFI_STATUS
EFIAPI
PciBusDriverBindingSupported (
IN EFI_DRIVER_BINDING_PROTOCOL *This,
IN EFI_HANDLE Controller,
IN EFI_DEVICE_PATH_PROTOCOL *RemainingDevicePath
);
/**
Start this driver on ControllerHandle and enumerate Pci bus and start
all device under PCI bus.
@param This Protocol instance pointer.
@param Controller Handle of device to bind driver to.
@param RemainingDevicePath Optional parameter use to pick a specific child.
device to start.
@retval EFI_SUCCESS This driver is added to ControllerHandle.
@retval EFI_ALREADY_STARTED This driver is already running on ControllerHandle.
@retval other This driver does not support this device.
**/
EFI_STATUS
EFIAPI
PciBusDriverBindingStart (
IN EFI_DRIVER_BINDING_PROTOCOL *This,
IN EFI_HANDLE Controller,
IN EFI_DEVICE_PATH_PROTOCOL *RemainingDevicePath
);
/**
Stop this driver on ControllerHandle. Support stoping any child handles
created by this driver.
@param This Protocol instance pointer.
@param Controller Handle of device to stop driver on.
@param NumberOfChildren Number of Handles in ChildHandleBuffer. If number of
children is zero stop the entire bus driver.
@param ChildHandleBuffer List of Child Handles to Stop.
@retval EFI_SUCCESS This driver is removed ControllerHandle.
@retval other This driver was not removed from this device.
**/
EFI_STATUS
EFIAPI
PciBusDriverBindingStop (
IN EFI_DRIVER_BINDING_PROTOCOL *This,
IN EFI_HANDLE Controller,
IN UINTN NumberOfChildren,
IN EFI_HANDLE *ChildHandleBuffer
);
#endif

116
IntelFrameworkModulePkg/Bus/Pci/PciBusDxe/PciBusDxe.inf

@ -1,116 +0,0 @@
#/** @file
# Component description file for PciBus module.
#
# PCI bus driver. This module will probe all PCI devices and allocate MMIO and IO
# space for these devices. Please use PCD feature flag PcdPciBusHotplugDeviceSupport to enable
# hot plug supporting.
#
# Copyright (c) 2006 - 2009, Intel Corporation
#
# All rights reserved. This program and the accompanying materials
# are licensed and made available under the terms and conditions of the BSD License
# which accompanies this distribution. The full text of the license may be found at
# http://opensource.org/licenses/bsd-license.php
# THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
# WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
#
#
#**/
[Defines]
INF_VERSION = 0x00010005
BASE_NAME = PciBusDxe
FILE_GUID = 93B80004-9FB3-11d4-9A3A-0090273FC14D
MODULE_TYPE = UEFI_DRIVER
VERSION_STRING = 1.0
EFI_SPECIFICATION_VERSION = 0x00020000
ENTRY_POINT = PciBusEntryPoint
#
# The following information is for reference only and not required by the build tools.
#
# VALID_ARCHITECTURES = IA32 X64 IPF EBC
#
# DRIVER_BINDING = gPciBusDriverBinding
# COMPONENT_NAME = gPciBusComponentName
# COMPONENT_NAME2 = gPciBusComponentName2
#
[Sources.common]
PciLib.c
PciIo.c
PciBus.c
PciDeviceSupport.c
ComponentName.c
ComponentName.h
PciCommand.c
PciResourceSupport.c
PciEnumeratorSupport.c
PciEnumerator.c
PciOptionRomSupport.c
PciDriverOverride.c
PciPowerManagement.c
PciPowerManagement.h
PciDriverOverride.h
PciRomTable.c
PciHotPlugSupport.c
PciLib.h
PciHotPlugSupport.h
PciRomTable.h
PciOptionRomSupport.h
PciEnumeratorSupport.h
PciEnumerator.h
PciResourceSupport.h
PciDeviceSupport.h
PciCommand.h
PciIo.h
PciBus.h
[Packages]
MdePkg/MdePkg.dec
MdeModulePkg/MdeModulePkg.dec
IntelFrameworkPkg/IntelFrameworkPkg.dec
IntelFrameworkModulePkg/IntelFrameworkModulePkg.dec
[LibraryClasses]
PcdLib
DevicePathLib
UefiBootServicesTableLib
MemoryAllocationLib
ReportStatusCodeLib
BaseMemoryLib
UefiLib
BaseLib
UefiDriverEntryPoint
DebugLib
PeCoffLib
[Protocols]
gEfiPciHotPlugRequestProtocolGuid ## BY_START
gEfiPciIoProtocolGuid ## BY_START
gEfiDevicePathProtocolGuid ## BY_START
gEfiBusSpecificDriverOverrideProtocolGuid ## BY_START
gEfiLoadedImageProtocolGuid ## CONSUMED
gEfiDecompressProtocolGuid ## CONSUMED
gEfiPciHotPlugInitProtocolGuid ## CONSUMED
gEfiPciHostBridgeResourceAllocationProtocolGuid ## CONSUMED
gEfiPciPlatformProtocolGuid ## CONSUMED
gEfiPciRootBridgeIoProtocolGuid ## CONSUMED
gEfiIncompatiblePciDeviceSupportProtocolGuid ## CONSUMED
gEfiLoadFile2ProtocolGuid ## CONSUMED
[FeaturePcd.common]
gEfiIntelFrameworkModulePkgTokenSpaceGuid.PcdPciBusHotplugDeviceSupport
gEfiIntelFrameworkModulePkgTokenSpaceGuid.PcdSrIovSupport
gEfiIntelFrameworkModulePkgTokenSpaceGuid.PcdAriSupport
gEfiIntelFrameworkModulePkgTokenSpaceGuid.PcdMrIovSupport
[FixedPcd.common]
gEfiIntelFrameworkModulePkgTokenSpaceGuid.PcdSrIovSystemPageSize
# [Event]
# ##
# # Notify event set by CreateEventForHpc () for PCI Hot Plug controller.
# #
# EVT_NOTIFY_SIGNAL ## PRODUCES
#
#

248
IntelFrameworkModulePkg/Bus/Pci/PciBusDxe/PciCommand.c

@ -1,248 +0,0 @@
/** @file
PCI command register operations supporting functions implementation for PCI Bus module.
Copyright (c) 2006 - 2009, Intel Corporation
All rights reserved. This program and the accompanying materials
are licensed and made available under the terms and conditions of the BSD License
which accompanies this distribution. The full text of the license may be found at
http://opensource.org/licenses/bsd-license.php
THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
**/
#include "PciBus.h"
/**
Operate the PCI register via PciIo function interface.
@param PciIoDevice Pointer to instance of PCI_IO_DEVICE.
@param Command Operator command.
@param Offset The address within the PCI configuration space for the PCI controller.
@param Operation Type of Operation.
@param PtrCommand Return buffer holding old PCI command, if operation is not EFI_SET_REGISTER.
@return Status of PciIo operation.
**/
EFI_STATUS
PciOperateRegister (
IN PCI_IO_DEVICE *PciIoDevice,
IN UINT16 Command,
IN UINT8 Offset,
IN UINT8 Operation,
OUT UINT16 *PtrCommand
)
{
UINT16 OldCommand;
EFI_STATUS Status;
EFI_PCI_IO_PROTOCOL *PciIo;
OldCommand = 0;
PciIo = &PciIoDevice->PciIo;
if (Operation != EFI_SET_REGISTER) {
Status = PciIo->Pci.Read (
PciIo,
EfiPciIoWidthUint16,
Offset,
1,
&OldCommand
);
if (Operation == EFI_GET_REGISTER) {
*PtrCommand = OldCommand;
return Status;
}
}
if (Operation == EFI_ENABLE_REGISTER) {
OldCommand = (UINT16) (OldCommand | Command);
} else if (Operation == EFI_DISABLE_REGISTER) {
OldCommand = (UINT16) (OldCommand & ~(Command));
} else {
OldCommand = Command;
}
return PciIo->Pci.Write (
PciIo,
EfiPciIoWidthUint16,
Offset,
1,
&OldCommand
);
}
/**
Check the cpability supporting by given device.
@param PciIoDevice Pointer to instance of PCI_IO_DEVICE.
@retval TRUE Cpability supportted.
@retval FALSE Cpability not supportted.
**/
BOOLEAN
PciCapabilitySupport (
IN PCI_IO_DEVICE *PciIoDevice
)
{
if ((PciIoDevice->Pci.Hdr.Status & EFI_PCI_STATUS_CAPABILITY) != 0) {
return TRUE;
}
return FALSE;
}
/**
Locate capability register block per capability ID.
@param PciIoDevice A pointer to the PCI_IO_DEVICE.
@param CapId The capability ID.
@param Offset A pointer to the offset returned.
@param NextRegBlock A pointer to the next block returned.
@retval EFI_SUCCESS Successfuly located capability register block.
@retval EFI_UNSUPPORTED Pci device does not support capability.
@retval EFI_NOT_FOUND Pci device support but can not find register block.
**/
EFI_STATUS
LocateCapabilityRegBlock (
IN PCI_IO_DEVICE *PciIoDevice,
IN UINT8 CapId,
IN OUT UINT8 *Offset,
OUT UINT8 *NextRegBlock OPTIONAL
)
{
UINT8 CapabilityPtr;
UINT16 CapabilityEntry;
UINT8 CapabilityID;
//
// To check the cpability of this device supports
//
if (!PciCapabilitySupport (PciIoDevice)) {
return EFI_UNSUPPORTED;
}
if (*Offset != 0) {
CapabilityPtr = *Offset;
} else {
CapabilityPtr = 0;
if (IS_CARDBUS_BRIDGE (&PciIoDevice->Pci)) {
PciIoDevice->PciIo.Pci.Read (
&PciIoDevice->PciIo,
EfiPciIoWidthUint8,
EFI_PCI_CARDBUS_BRIDGE_CAPABILITY_PTR,
1,
&CapabilityPtr
);
} else {
PciIoDevice->PciIo.Pci.Read (
&PciIoDevice->PciIo,
EfiPciIoWidthUint8,
PCI_CAPBILITY_POINTER_OFFSET,
1,
&CapabilityPtr
);
}
}
while ((CapabilityPtr >= 0x40) && ((CapabilityPtr & 0x03) == 0x00)) {
PciIoDevice->PciIo.Pci.Read (
&PciIoDevice->PciIo,
EfiPciIoWidthUint16,
CapabilityPtr,
1,
&CapabilityEntry
);
CapabilityID = (UINT8) CapabilityEntry;
if (CapabilityID == CapId) {
*Offset = CapabilityPtr;
if (NextRegBlock != NULL) {
*NextRegBlock = (UINT8) (CapabilityEntry >> 8);
}
return EFI_SUCCESS;
}
CapabilityPtr = (UINT8) (CapabilityEntry >> 8);
}
return EFI_NOT_FOUND;
}
/**
Locate PciExpress capability register block per capability ID.
@param PciIoDevice A pointer to the PCI_IO_DEVICE.
@param CapId The capability ID.
@param Offset A pointer to the offset returned.
@param NextRegBlock A pointer to the next block returned.
@retval EFI_SUCCESS Successfuly located capability register block.
@retval EFI_UNSUPPORTED Pci device does not support capability.
@retval EFI_NOT_FOUND Pci device support but can not find register block.
**/
EFI_STATUS
LocatePciExpressCapabilityRegBlock (
IN PCI_IO_DEVICE *PciIoDevice,
IN UINT16 CapId,
IN OUT UINT32 *Offset,
OUT UINT32 *NextRegBlock OPTIONAL
)
{
UINT32 CapabilityPtr;
UINT32 CapabilityEntry;
UINT16 CapabilityID;
//
// To check the capability of this device supports
//
if (!PciIoDevice->IsPciExp) {
return EFI_UNSUPPORTED;
}
if (*Offset != 0) {
CapabilityPtr = *Offset;
} else {
CapabilityPtr = EFI_PCIE_CAPABILITY_BASE_OFFSET;
}
while (CapabilityPtr != 0) {
//
// Mask it to DWORD alignment per PCI spec
//
CapabilityPtr &= 0xFFC;
PciIoDevice->PciIo.Pci.Read (
&PciIoDevice->PciIo,
EfiPciIoWidthUint32,
CapabilityPtr,
1,
&CapabilityEntry
);
CapabilityID = (UINT16) CapabilityEntry;
if (CapabilityID == CapId) {
*Offset = CapabilityPtr;
if (NextRegBlock != NULL) {
*NextRegBlock = (CapabilityEntry >> 20) & 0xFFF;
}
return EFI_SUCCESS;
}
CapabilityPtr = (CapabilityEntry >> 20) & 0xFFF;
}
return EFI_NOT_FOUND;
}

238
IntelFrameworkModulePkg/Bus/Pci/PciBusDxe/PciCommand.h

@ -1,238 +0,0 @@
/** @file
PCI command register operations supporting functions declaration for PCI Bus module.
Copyright (c) 2006 - 2009, Intel Corporation
All rights reserved. This program and the accompanying materials
are licensed and made available under the terms and conditions of the BSD License
which accompanies this distribution. The full text of the license may be found at
http://opensource.org/licenses/bsd-license.php
THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
**/
#ifndef _EFI_PCI_COMMAND_H_
#define _EFI_PCI_COMMAND_H_
//
// The PCI Command register bits owned by PCI Bus driver.
//
// They should be cleared at the beginning. The other registers
// are owned by chipset, we should not touch them.
//
#define EFI_PCI_COMMAND_BITS_OWNED ( \
EFI_PCI_COMMAND_IO_SPACE | \
EFI_PCI_COMMAND_MEMORY_SPACE | \
EFI_PCI_COMMAND_BUS_MASTER | \
EFI_PCI_COMMAND_MEMORY_WRITE_AND_INVALIDATE | \
EFI_PCI_COMMAND_VGA_PALETTE_SNOOP | \
EFI_PCI_COMMAND_FAST_BACK_TO_BACK \
)
//
// The PCI Bridge Control register bits owned by PCI Bus driver.
//
// They should be cleared at the beginning. The other registers
// are owned by chipset, we should not touch them.
//
#define EFI_PCI_BRIDGE_CONTROL_BITS_OWNED ( \
EFI_PCI_BRIDGE_CONTROL_ISA | \
EFI_PCI_BRIDGE_CONTROL_VGA | \
EFI_PCI_BRIDGE_CONTROL_VGA_16 | \
EFI_PCI_BRIDGE_CONTROL_FAST_BACK_TO_BACK \
)
//
// The PCCard Bridge Control register bits owned by PCI Bus driver.
//
// They should be cleared at the beginning. The other registers
// are owned by chipset, we should not touch them.
//
#define EFI_PCCARD_BRIDGE_CONTROL_BITS_OWNED ( \
EFI_PCI_BRIDGE_CONTROL_ISA | \
EFI_PCI_BRIDGE_CONTROL_VGA | \
EFI_PCI_BRIDGE_CONTROL_FAST_BACK_TO_BACK \
)
#define EFI_GET_REGISTER 1
#define EFI_SET_REGISTER 2
#define EFI_ENABLE_REGISTER 3
#define EFI_DISABLE_REGISTER 4
/**
Operate the PCI register via PciIo function interface.
@param PciIoDevice Pointer to instance of PCI_IO_DEVICE.
@param Command Operator command.
@param Offset The address within the PCI configuration space for the PCI controller.
@param Operation Type of Operation.
@param PtrCommand Return buffer holding old PCI command, if operation is not EFI_SET_REGISTER.
@return Status of PciIo operation.
**/
EFI_STATUS
PciOperateRegister (
IN PCI_IO_DEVICE *PciIoDevice,
IN UINT16 Command,
IN UINT8 Offset,
IN UINT8 Operation,
OUT UINT16 *PtrCommand
);
/**
Check the cpability supporting by given device.
@param PciIoDevice Pointer to instance of PCI_IO_DEVICE.
@retval TRUE Cpability supportted.
@retval FALSE Cpability not supportted.
**/
BOOLEAN
PciCapabilitySupport (
IN PCI_IO_DEVICE *PciIoDevice
);
/**
Locate capability register block per capability ID.
@param PciIoDevice A pointer to the PCI_IO_DEVICE.
@param CapId The capability ID.
@param Offset A pointer to the offset returned.
@param NextRegBlock A pointer to the next block returned.
@retval EFI_SUCCESS Successfuly located capability register block.
@retval EFI_UNSUPPORTED Pci device does not support capability.
@retval EFI_NOT_FOUND Pci device support but can not find register block.
**/
EFI_STATUS
LocateCapabilityRegBlock (
IN PCI_IO_DEVICE *PciIoDevice,
IN UINT8 CapId,
IN OUT UINT8 *Offset,
OUT UINT8 *NextRegBlock OPTIONAL
);
/**
Locate PciExpress capability register block per capability ID.
@param PciIoDevice A pointer to the PCI_IO_DEVICE.
@param CapId The capability ID.
@param Offset A pointer to the offset returned.
@param NextRegBlock A pointer to the next block returned.
@retval EFI_SUCCESS Successfuly located capability register block.
@retval EFI_UNSUPPORTED Pci device does not support capability.
@retval EFI_NOT_FOUND Pci device support but can not find register block.
**/
EFI_STATUS
LocatePciExpressCapabilityRegBlock (
IN PCI_IO_DEVICE *PciIoDevice,
IN UINT16 CapId,
IN OUT UINT32 *Offset,
OUT UINT32 *NextRegBlock OPTIONAL
);
/**
Macro that reads command register.
@param a[in] Pointer to instance of PCI_IO_DEVICE.
@param b[out] Pointer to the 16-bit value read from command register.
@return status of PciIo operation
**/
#define PCI_READ_COMMAND_REGISTER(a,b) \
PciOperateRegister (a, 0, PCI_COMMAND_OFFSET, EFI_GET_REGISTER, b)
/**
Macro that writes command register.
@param a[in] Pointer to instance of PCI_IO_DEVICE.
@param b[in] The 16-bit value written into command register.
@return status of PciIo operation
**/
#define PCI_SET_COMMAND_REGISTER(a,b) \
PciOperateRegister (a, b, PCI_COMMAND_OFFSET, EFI_SET_REGISTER, NULL)
/**
Macro that enables command register.
@param a[in] Pointer to instance of PCI_IO_DEVICE.
@param b[in] The enabled value written into command register.
@return status of PciIo operation
**/
#define PCI_ENABLE_COMMAND_REGISTER(a,b) \
PciOperateRegister (a, b, PCI_COMMAND_OFFSET, EFI_ENABLE_REGISTER, NULL)
/**
Macro that disalbes command register.
@param a[in] Pointer to instance of PCI_IO_DEVICE.
@param b[in] The disabled value written into command register.
@return status of PciIo operation
**/
#define PCI_DISABLE_COMMAND_REGISTER(a,b) \
PciOperateRegister (a, b, PCI_COMMAND_OFFSET, EFI_DISABLE_REGISTER, NULL)
/**
Macro that reads PCI bridge control register.
@param a[in] Pointer to instance of PCI_IO_DEVICE.
@param b[out] The 16-bit value read from control register.
@return status of PciIo operation
**/
#define PCI_READ_BRIDGE_CONTROL_REGISTER(a,b) \
PciOperateRegister (a, 0, PCI_BRIDGE_CONTROL_REGISTER_OFFSET, EFI_GET_REGISTER, b)
/**
Macro that writes PCI bridge control register.
@param a[in] Pointer to instance of PCI_IO_DEVICE.
@param b[in] The 16-bit value written into control register.
@return status of PciIo operation
**/
#define PCI_SET_BRIDGE_CONTROL_REGISTER(a,b) \
PciOperateRegister (a, b, PCI_BRIDGE_CONTROL_REGISTER_OFFSET, EFI_SET_REGISTER, NULL)
/**
Macro that enables PCI bridge control register.
@param a[in] Pointer to instance of PCI_IO_DEVICE.
@param b[in] The enabled value written into command register.
@return status of PciIo operation
**/
#define PCI_ENABLE_BRIDGE_CONTROL_REGISTER(a,b) \
PciOperateRegister (a, b, PCI_BRIDGE_CONTROL_REGISTER_OFFSET, EFI_ENABLE_REGISTER, NULL)
/**
Macro that disalbes PCI bridge control register.
@param a[in] Pointer to instance of PCI_IO_DEVICE.
@param b[in] The disabled value written into command register.
@return status of PciIo operation
**/
#define PCI_DISABLE_BRIDGE_CONTROL_REGISTER(a,b) \
PciOperateRegister (a, b, PCI_BRIDGE_CONTROL_REGISTER_OFFSET, EFI_DISABLE_REGISTER, NULL)
#endif

1160
IntelFrameworkModulePkg/Bus/Pci/PciBusDxe/PciDeviceSupport.c

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289
IntelFrameworkModulePkg/Bus/Pci/PciBusDxe/PciDeviceSupport.h

@ -1,289 +0,0 @@
/** @file
Supporting functions declaration for PCI devices management.
Copyright (c) 2006 - 2009, Intel Corporation
All rights reserved. This program and the accompanying materials
are licensed and made available under the terms and conditions of the BSD License
which accompanies this distribution. The full text of the license may be found at
http://opensource.org/licenses/bsd-license.php
THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
**/
#ifndef _EFI_PCI_DEVICE_SUPPORT_H_
#define _EFI_PCI_DEVICE_SUPPORT_H_
/**
Initialize the PCI devices pool.
**/
VOID
InitializePciDevicePool (
VOID
);
/**
Insert a root bridge into PCI device pool.
@param RootBridge A pointer to the PCI_IO_DEVICE.
**/
VOID
InsertRootBridge (
IN PCI_IO_DEVICE *RootBridge
);
/**
This function is used to insert a PCI device node under
a bridge.
@param Bridge The PCI bridge.
@param PciDeviceNode The PCI device needs inserting.
**/
VOID
InsertPciDevice (
IN PCI_IO_DEVICE *Bridge,
IN PCI_IO_DEVICE *PciDeviceNode
);
/**
Destroy root bridge and remove it from deivce tree.
@param RootBridge The bridge want to be removed.
**/
VOID
DestroyRootBridge (
IN PCI_IO_DEVICE *RootBridge
);
/**
Destroy all the pci device node under the bridge.
Bridge itself is not included.
@param Bridge A pointer to the PCI_IO_DEVICE.
**/
VOID
DestroyPciDeviceTree (
IN PCI_IO_DEVICE *Bridge
);
/**
Destroy all device nodes under the root bridge
specified by Controller.
The root bridge itself is also included.
@param Controller Root bridge handle.
@retval EFI_SUCCESS Destory all devcie nodes successfully.
@retval EFI_NOT_FOUND Cannot find any PCI device under specified
root bridge.
**/
EFI_STATUS
DestroyRootBridgeByHandle (
IN EFI_HANDLE Controller
);
/**
This function registers the PCI IO device.
It creates a handle for this PCI IO device (if the handle does not exist), attaches
appropriate protocols onto the handle, does necessary initialization, and sets up
parent/child relationship with its bus controller.
@param Controller An EFI handle for the PCI bus controller.
@param PciIoDevice A PCI_IO_DEVICE pointer to the PCI IO device to be registered.
@param Handle A pointer to hold the returned EFI handle for the PCI IO device.
@retval EFI_SUCCESS The PCI device is successfully registered.
@retval other An error occurred when registering the PCI device.
**/
EFI_STATUS
RegisterPciDevice (
IN EFI_HANDLE Controller,
IN PCI_IO_DEVICE *PciIoDevice,
OUT EFI_HANDLE *Handle OPTIONAL
);
/**
This function is used to remove the whole PCI devices on the specified bridge from
the root bridge.
@param RootBridgeHandle The root bridge device handle.
@param Bridge The bridge device to be removed.
**/
VOID
RemoveAllPciDeviceOnBridge (
EFI_HANDLE RootBridgeHandle,
PCI_IO_DEVICE *Bridge
);
/**
This function is used to de-register the PCI IO device.
That includes un-installing PciIo protocol from the specified PCI
device handle.
@param Controller An EFI handle for the PCI bus controller.
@param Handle PCI device handle.
@retval EFI_SUCCESS The PCI device is successfully de-registered.
@retval other An error occurred when de-registering the PCI device.
**/
EFI_STATUS
DeRegisterPciDevice (
IN EFI_HANDLE Controller,
IN EFI_HANDLE Handle
);
/**
Start to manage the PCI device on the specified root bridge or PCI-PCI Bridge.
@param Controller The root bridge handle.
@param RootBridge A pointer to the PCI_IO_DEVICE.
@param RemainingDevicePath A pointer to the EFI_DEVICE_PATH_PROTOCOL.
@param NumberOfChildren Children number.
@param ChildHandleBuffer A pointer to the child handle buffer.
@retval EFI_NOT_READY Device is not allocated.
@retval EFI_UNSUPPORTED Device only support PCI-PCI bridge.
@retval EFI_NOT_FOUND Can not find the specific device.
@retval EFI_SUCCESS Success to start Pci devices on bridge.
**/
EFI_STATUS
StartPciDevicesOnBridge (
IN EFI_HANDLE Controller,
IN PCI_IO_DEVICE *RootBridge,
IN EFI_DEVICE_PATH_PROTOCOL *RemainingDevicePath,
IN OUT UINT8 *NumberOfChildren,
IN OUT EFI_HANDLE *ChildHandleBuffer
);
/**
Start to manage all the PCI devices it found previously under
the entire host bridge.
@param Controller The root bridge handle.
@retval EFI_NOT_READY Device is not allocated.
@retval EFI_SUCCESS Success to start Pci device on host bridge.
**/
EFI_STATUS
StartPciDevices (
IN EFI_HANDLE Controller
);
/**
Create root bridge device.
@param RootBridgeHandle Specified root bridge hanle.
@return The crated root bridge device instance, NULL means no
root bridge device instance created.
**/
PCI_IO_DEVICE *
CreateRootBridge (
IN EFI_HANDLE RootBridgeHandle
);
/**
Get root bridge device instance by specific root bridge handle.
@param RootBridgeHandle Given root bridge handle.
@return The root bridge device instance, NULL means no root bridge
device instance found.
**/
PCI_IO_DEVICE *
GetRootBridgeByHandle (
EFI_HANDLE RootBridgeHandle
);
/**
Judege whether Pci device existed.
@param Bridge Parent bridege instance.
@param PciIoDevice Device instance.
@retval TRUE Pci device existed.
@retval FALSE Pci device did not exist.
**/
BOOLEAN
PciDeviceExisted (
IN PCI_IO_DEVICE *Bridge,
IN PCI_IO_DEVICE *PciIoDevice
);
/**
Get the active VGA device on the same segment.
@param VgaDevice PCI IO instance for the VGA device.
@return The active VGA device on the same segment.
**/
PCI_IO_DEVICE *
ActiveVGADeviceOnTheSameSegment (
IN PCI_IO_DEVICE *VgaDevice
);
/**
Get the active VGA device on the root bridge.
@param RootBridge PCI IO instance for the root bridge.
@return The active VGA device.
**/
PCI_IO_DEVICE *
ActiveVGADeviceOnTheRootBridge (
IN PCI_IO_DEVICE *RootBridge
);
/**
Get HPC PCI address according to its device path.
@param RootBridge Root bridege Io instance.
@param RemainingDevicePath Given searching device path.
@param PciAddress Buffer holding searched result.
@retval EFI_SUCCESS PCI address was stored in PciAddress.
@retval EFI_NOT_FOUND Can not find the specific device path.
**/
EFI_STATUS
GetHpcPciAddressFromRootBridge (
IN PCI_IO_DEVICE *RootBridge,
IN EFI_DEVICE_PATH_PROTOCOL *RemainingDevicePath,
OUT UINT64 *PciAddress
);
/**
Destroy a pci device node.
All direct or indirect allocated resource for this node will be freed.
@param PciIoDevice A pointer to the PCI_IO_DEVICE to be destoried.
**/
VOID
FreePciDevice (
IN PCI_IO_DEVICE *PciIoDevice
);
#endif

143
IntelFrameworkModulePkg/Bus/Pci/PciBusDxe/PciDriverOverride.c

@ -1,143 +0,0 @@
/** @file
Functions implementation for Bus Specific Driver Override protoocl.
Copyright (c) 2006 - 2009, Intel Corporation
All rights reserved. This program and the accompanying materials
are licensed and made available under the terms and conditions of the BSD License
which accompanies this distribution. The full text of the license may be found at
http://opensource.org/licenses/bsd-license.php
THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
**/
#include "PciBus.h"
/**
Initializes a PCI Driver Override Instance.
@param PciIoDevice PCI Device instance.
**/
VOID
InitializePciDriverOverrideInstance (
IN OUT PCI_IO_DEVICE *PciIoDevice
)
{
PciIoDevice->PciDriverOverride.GetDriver = GetDriver;
}
/**
Uses a bus specific algorithm to retrieve a driver image handle for a controller.
@param This A pointer to the EFI_BUS_SPECIFIC_DRIVER_OVERRIDE_PROTOCOL instance.
@param DriverImageHandle On input, a pointer to the previous driver image handle returned
by GetDriver(). On output, a pointer to the next driver
image handle. Passing in a NULL, will return the first driver
image handle.
@retval EFI_SUCCESS A bus specific override driver is returned in DriverImageHandle.
@retval EFI_NOT_FOUND The end of the list of override drivers was reached.
A bus specific override driver is not returned in DriverImageHandle.
@retval EFI_INVALID_PARAMETER DriverImageHandle is not a handle that was returned on a
previous call to GetDriver().
**/
EFI_STATUS
EFIAPI
GetDriver (
IN EFI_BUS_SPECIFIC_DRIVER_OVERRIDE_PROTOCOL *This,
IN OUT EFI_HANDLE *DriverImageHandle
)
{
PCI_IO_DEVICE *PciIoDevice;
LIST_ENTRY *CurrentLink;
PCI_DRIVER_OVERRIDE_LIST *Node;
PciIoDevice = PCI_IO_DEVICE_FROM_PCI_DRIVER_OVERRIDE_THIS (This);
CurrentLink = PciIoDevice->OptionRomDriverList.ForwardLink;
while (CurrentLink != NULL && CurrentLink != &PciIoDevice->OptionRomDriverList) {
Node = DRIVER_OVERRIDE_FROM_LINK (CurrentLink);
if (*DriverImageHandle == NULL) {
*DriverImageHandle = Node->DriverImageHandle;
return EFI_SUCCESS;
}
if (*DriverImageHandle == Node->DriverImageHandle) {
if (CurrentLink->ForwardLink == &PciIoDevice->OptionRomDriverList ||
CurrentLink->ForwardLink == NULL) {
return EFI_NOT_FOUND;
}
//
// Get next node
//
Node = DRIVER_OVERRIDE_FROM_LINK (CurrentLink->ForwardLink);
*DriverImageHandle = Node->DriverImageHandle;
return EFI_SUCCESS;
}
CurrentLink = CurrentLink->ForwardLink;
}
return EFI_INVALID_PARAMETER;
}
/**
Add an overriding driver image.
@param PciIoDevice Instance of PciIo device.
@param DriverImageHandle new added driver image.
@retval EFI_SUCCESS Successfully added driver.
@retval EFI_OUT_OF_RESOURCES No memory resource for new driver instance.
@retval other Some error occurred when locating gEfiLoadedImageProtocolGuid.
**/
EFI_STATUS
AddDriver (
IN PCI_IO_DEVICE *PciIoDevice,
IN EFI_HANDLE DriverImageHandle
)
{
EFI_STATUS Status;
EFI_LOADED_IMAGE_PROTOCOL *LoadedImage;
PE_COFF_LOADER_IMAGE_CONTEXT ImageContext;
PCI_DRIVER_OVERRIDE_LIST *Node;
Status = gBS->HandleProtocol (DriverImageHandle, &gEfiLoadedImageProtocolGuid, (VOID **) &LoadedImage);
if (EFI_ERROR (Status)) {
return Status;
}
Node = AllocatePool (sizeof (PCI_DRIVER_OVERRIDE_LIST));
if (Node == NULL) {
return EFI_OUT_OF_RESOURCES;
}
Node->Signature = DRIVER_OVERRIDE_SIGNATURE;
Node->DriverImageHandle = DriverImageHandle;
InsertTailList (&PciIoDevice->OptionRomDriverList, &(Node->Link));
PciIoDevice->BusOverride = TRUE;
ImageContext.Handle = LoadedImage->ImageBase;
ImageContext.ImageRead = PeCoffLoaderImageReadFromMemory;
//
// Get information about the image
//
PeCoffLoaderGetImageInfo (&ImageContext);
return EFI_SUCCESS;
}

86
IntelFrameworkModulePkg/Bus/Pci/PciBusDxe/PciDriverOverride.h

@ -1,86 +0,0 @@
/** @file
Functions declaration for Bus Specific Driver Override protoocl.
Copyright (c) 2006 - 2009, Intel Corporation
All rights reserved. This program and the accompanying materials
are licensed and made available under the terms and conditions of the BSD License
which accompanies this distribution. The full text of the license may be found at
http://opensource.org/licenses/bsd-license.php
THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
**/
#ifndef _EFI_PCI_DRIVER_OVERRRIDE_H_
#define _EFI_PCI_DRIVER_OVERRRIDE_H_
#define DRIVER_OVERRIDE_SIGNATURE SIGNATURE_32 ('d', 'r', 'o', 'v')
//
// PCI driver override driver image list
//
typedef struct {
UINT32 Signature;
LIST_ENTRY Link;
EFI_HANDLE DriverImageHandle;
} PCI_DRIVER_OVERRIDE_LIST;
#define DRIVER_OVERRIDE_FROM_LINK(a) \
CR (a, PCI_DRIVER_OVERRIDE_LIST, Link, DRIVER_OVERRIDE_SIGNATURE)
/**
Initializes a PCI Driver Override Instance.
@param PciIoDevice PCI Device instance.
**/
VOID
InitializePciDriverOverrideInstance (
IN OUT PCI_IO_DEVICE *PciIoDevice
);
/**
Add an overriding driver image.
@param PciIoDevice Instance of PciIo device.
@param DriverImageHandle new added driver image.
@retval EFI_SUCCESS Successfully added driver.
@retval EFI_OUT_OF_RESOURCES No memory resource for new driver instance.
@retval other Some error occurred when locating gEfiLoadedImageProtocolGuid.
**/
EFI_STATUS
AddDriver (
IN PCI_IO_DEVICE *PciIoDevice,
IN EFI_HANDLE DriverImageHandle
);
/**
Uses a bus specific algorithm to retrieve a driver image handle for a controller.
@param This A pointer to the EFI_BUS_SPECIFIC_DRIVER_OVERRIDE_PROTOCOL instance.
@param DriverImageHandle On input, a pointer to the previous driver image handle returned
by GetDriver(). On output, a pointer to the next driver
image handle. Passing in a NULL, will return the first driver
image handle.
@retval EFI_SUCCESS A bus specific override driver is returned in DriverImageHandle.
@retval EFI_NOT_FOUND The end of the list of override drivers was reached.
A bus specific override driver is not returned in DriverImageHandle.
@retval EFI_INVALID_PARAMETER DriverImageHandle is not a handle that was returned on a
previous call to GetDriver().
**/
EFI_STATUS
EFIAPI
GetDriver (
IN EFI_BUS_SPECIFIC_DRIVER_OVERRIDE_PROTOCOL *This,
IN OUT EFI_HANDLE *DriverImageHandle
);
#endif

2071
IntelFrameworkModulePkg/Bus/Pci/PciBusDxe/PciEnumerator.c

File diff suppressed because it is too large Load Diff

519
IntelFrameworkModulePkg/Bus/Pci/PciBusDxe/PciEnumerator.h

@ -1,519 +0,0 @@
/** @file
PCI bus enumeration logic function declaration for PCI bus module.
Copyright (c) 2006 - 2009, Intel Corporation
All rights reserved. This program and the accompanying materials
are licensed and made available under the terms and conditions of the BSD License
which accompanies this distribution. The full text of the license may be found at
http://opensource.org/licenses/bsd-license.php
THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
**/
#ifndef _EFI_PCI_ENUMERATOR_H_
#define _EFI_PCI_ENUMERATOR_H_
#include "PciResourceSupport.h"
/**
This routine is used to enumerate entire pci bus system
in a given platform.
@param Controller Parent controller handle.
@retval EFI_SUCCESS PCI enumeration finished successfully.
@retval other Some error occurred when enumerating the pci bus system.
**/
EFI_STATUS
PciEnumerator (
IN EFI_HANDLE Controller
);
/**
Enumerate PCI root bridge.
@param PciResAlloc Pointer to protocol instance of EFI_PCI_HOST_BRIDGE_RESOURCE_ALLOCATION_PROTOCOL.
@param RootBridgeDev Instance of root bridge device.
@retval EFI_SUCCESS Successfully enumerated root bridge.
@retval other Failed to enumerate root bridge.
**/
EFI_STATUS
PciRootBridgeEnumerator (
IN EFI_PCI_HOST_BRIDGE_RESOURCE_ALLOCATION_PROTOCOL *PciResAlloc,
IN PCI_IO_DEVICE *RootBridgeDev
);
/**
This routine is used to process all PCI devices' Option Rom
on a certain root bridge.
@param Bridge Given parent's root bridge.
@param RomBase Base address of ROM driver loaded from.
@param MaxLength Maximum rom size.
**/
VOID
ProcessOptionRom (
IN PCI_IO_DEVICE *Bridge,
IN UINT64 RomBase,
IN UINT64 MaxLength
);
/**
This routine is used to assign bus number to the given PCI bus system
@param Bridge Parent root bridge instance.
@param StartBusNumber Number of beginning.
@param SubBusNumber The number of sub bus.
@retval EFI_SUCCESS Successfully assigned bus number.
@retval EFI_DEVICE_ERROR Failed to assign bus number.
**/
EFI_STATUS
PciAssignBusNumber (
IN PCI_IO_DEVICE *Bridge,
IN UINT8 StartBusNumber,
OUT UINT8 *SubBusNumber
);
/**
This routine is used to determine the root bridge attribute by interfacing
the host bridge resource allocation protocol.
@param PciResAlloc Protocol instance of EFI_PCI_HOST_BRIDGE_RESOURCE_ALLOCATION_PROTOCOL
@param RootBridgeDev Root bridge instance
@retval EFI_SUCCESS Successfully got root bridge's attribute.
@retval other Failed to get attribute.
**/
EFI_STATUS
DetermineRootBridgeAttributes (
IN EFI_PCI_HOST_BRIDGE_RESOURCE_ALLOCATION_PROTOCOL *PciResAlloc,
IN PCI_IO_DEVICE *RootBridgeDev
);
/**
Get Max Option Rom size on specified bridge.
@param Bridge Given bridge device instance.
@return Max size of option rom needed.
**/
UINT64
GetMaxOptionRomSize (
IN PCI_IO_DEVICE *Bridge
);
/**
Process attributes of devices on this host bridge
@param PciResAlloc Protocol instance of EFI_PCI_HOST_BRIDGE_RESOURCE_ALLOCATION_PROTOCOL.
@retval EFI_SUCCESS Successfully process attribute.
@retval EFI_NOT_FOUND Can not find the specific root bridge device.
@retval other Failed to determine the root bridge device's attribute.
**/
EFI_STATUS
PciHostBridgeDeviceAttribute (
IN EFI_PCI_HOST_BRIDGE_RESOURCE_ALLOCATION_PROTOCOL *PciResAlloc
);
/**
Get resource allocation status from the ACPI resource descriptor.
@param AcpiConfig Point to Acpi configuration table.
@param IoResStatus Return the status of I/O resource.
@param Mem32ResStatus Return the status of 32-bit Memory resource.
@param PMem32ResStatus Return the status of 32-bit Prefetchable Memory resource.
@param Mem64ResStatus Return the status of 64-bit Memory resource.
@param PMem64ResStatus Return the status of 64-bit Prefetchable Memory resource.
**/
VOID
GetResourceAllocationStatus (
VOID *AcpiConfig,
OUT UINT64 *IoResStatus,
OUT UINT64 *Mem32ResStatus,
OUT UINT64 *PMem32ResStatus,
OUT UINT64 *Mem64ResStatus,
OUT UINT64 *PMem64ResStatus
);
/**
Remove a PCI device from device pool and mark its bar.
@param PciDevice Instance of Pci device.
@retval EFI_SUCCESS Successfully remove the PCI device.
@retval EFI_ABORTED Pci device is a root bridge or a PCI-PCI bridge.
**/
EFI_STATUS
RejectPciDevice (
IN PCI_IO_DEVICE *PciDevice
);
/**
Determine whethter a PCI device can be rejected.
@param PciResNode Pointer to Pci resource node instance.
@retval TRUE The PCI device can be rejected.
@retval TRUE The PCI device cannot be rejected.
**/
BOOLEAN
IsRejectiveDevice (
IN PCI_RESOURCE_NODE *PciResNode
);
/**
Compare two resource nodes and get the larger resource consumer.
@param PciResNode1 resource node 1 want to be compared
@param PciResNode2 resource node 2 want to be compared
@return Larger resource node.
**/
PCI_RESOURCE_NODE *
GetLargerConsumerDevice (
IN PCI_RESOURCE_NODE *PciResNode1,
IN PCI_RESOURCE_NODE *PciResNode2
);
/**
Get the max resource consumer in the host resource pool.
@param ResPool Pointer to resource pool node.
@return The max resource consumer in the host resource pool.
**/
PCI_RESOURCE_NODE *
GetMaxResourceConsumerDevice (
IN PCI_RESOURCE_NODE *ResPool
);
/**
Adjust host bridge allocation so as to reduce resource requirement
@param IoPool Pointer to instance of I/O resource Node.
@param Mem32Pool Pointer to instance of 32-bit memory resource Node.
@param PMem32Pool Pointer to instance of 32-bit Prefetchable memory resource node.
@param Mem64Pool Pointer to instance of 64-bit memory resource node.
@param PMem64Pool Pointer to instance of 64-bit Prefetchable memory resource node.
@param IoResStatus Status of I/O resource Node.
@param Mem32ResStatus Status of 32-bit memory resource Node.
@param PMem32ResStatus Status of 32-bit Prefetchable memory resource node.
@param Mem64ResStatus Status of 64-bit memory resource node.
@param PMem64ResStatus Status of 64-bit Prefetchable memory resource node.
@retval EFI_SUCCESS Successfully adjusted resoruce on host bridge.
@retval EFI_ABORTED Host bridge hasn't this resource type or no resource be adjusted.
**/
EFI_STATUS
PciHostBridgeAdjustAllocation (
IN PCI_RESOURCE_NODE *IoPool,
IN PCI_RESOURCE_NODE *Mem32Pool,
IN PCI_RESOURCE_NODE *PMem32Pool,
IN PCI_RESOURCE_NODE *Mem64Pool,
IN PCI_RESOURCE_NODE *PMem64Pool,
IN UINT64 IoResStatus,
IN UINT64 Mem32ResStatus,
IN UINT64 PMem32ResStatus,
IN UINT64 Mem64ResStatus,
IN UINT64 PMem64ResStatus
);
/**
Summary requests for all resource type, and contruct ACPI resource
requestor instance.
@param Bridge detecting bridge
@param IoNode Pointer to instance of I/O resource Node
@param Mem32Node Pointer to instance of 32-bit memory resource Node
@param PMem32Node Pointer to instance of 32-bit Pmemory resource node
@param Mem64Node Pointer to instance of 64-bit memory resource node
@param PMem64Node Pointer to instance of 64-bit Pmemory resource node
@param Config Output buffer holding new constructed APCI resource requestor
@retval EFI_SUCCESS Successfully constructed ACPI resource.
@retval EFI_OUT_OF_RESOURCES No memory availabe.
**/
EFI_STATUS
ConstructAcpiResourceRequestor (
IN PCI_IO_DEVICE *Bridge,
IN PCI_RESOURCE_NODE *IoNode,
IN PCI_RESOURCE_NODE *Mem32Node,
IN PCI_RESOURCE_NODE *PMem32Node,
IN PCI_RESOURCE_NODE *Mem64Node,
IN PCI_RESOURCE_NODE *PMem64Node,
OUT VOID **Config
);
/**
Get resource base from an acpi configuration descriptor.
@param Config An acpi configuration descriptor.
@param IoBase Output of I/O resource base address.
@param Mem32Base Output of 32-bit memory base address.
@param PMem32Base Output of 32-bit prefetchable memory base address.
@param Mem64Base Output of 64-bit memory base address.
@param PMem64Base Output of 64-bit prefetchable memory base address.
**/
VOID
GetResourceBase (
IN VOID *Config,
OUT UINT64 *IoBase,
OUT UINT64 *Mem32Base,
OUT UINT64 *PMem32Base,
OUT UINT64 *Mem64Base,
OUT UINT64 *PMem64Base
);
/**
Enumerate pci bridge, allocate resource and determine attribute
for devices on this bridge.
@param BridgeDev Pointer to instance of bridge device.
@retval EFI_SUCCESS Successfully enumerated PCI bridge.
@retval other Failed to enumerate.
**/
EFI_STATUS
PciBridgeEnumerator (
IN PCI_IO_DEVICE *BridgeDev
);
/**
Allocate all kinds of resource for PCI bridge.
@param Bridge Pointer to bridge instance.
@retval EFI_SUCCESS Successfully allocated resource for PCI bridge.
@retval other Failed to allocate resource for bridge.
**/
EFI_STATUS
PciBridgeResourceAllocator (
IN PCI_IO_DEVICE *Bridge
);
/**
Get resource base address for a pci bridge device.
@param Bridge Given Pci driver instance.
@param IoBase Output for base address of I/O type resource.
@param Mem32Base Output for base address of 32-bit memory type resource.
@param PMem32Base Ooutput for base address of 32-bit Pmemory type resource.
@param Mem64Base Output for base address of 64-bit memory type resource.
@param PMem64Base Output for base address of 64-bit Pmemory type resource.
@retval EFI_SUCCESS Successfully got resource base address.
@retval EFI_OUT_OF_RESOURCES PCI bridge is not available.
**/
EFI_STATUS
GetResourceBaseFromBridge (
IN PCI_IO_DEVICE *Bridge,
OUT UINT64 *IoBase,
OUT UINT64 *Mem32Base,
OUT UINT64 *PMem32Base,
OUT UINT64 *Mem64Base,
OUT UINT64 *PMem64Base
);
/**
Process Option Rom on this host bridge
@param PciResAlloc Pointer to instance of EFI_PCI_HOST_BRIDGE_RESOURCE_ALLOCATION_PROTOCOL.
@retval EFI_NOT_FOUND Can not find the root bridge instance.
@retval EFI_SUCCESS Success process.
**/
EFI_STATUS
PciHostBridgeP2CProcess (
IN EFI_PCI_HOST_BRIDGE_RESOURCE_ALLOCATION_PROTOCOL *PciResAlloc
);
/**
These are the notifications from the PCI bus driver that it is about to enter a certain
phase of the PCI enumeration process.
This member function can be used to notify the host bridge driver to perform specific actions,
including any chipset-specific initialization, so that the chipset is ready to enter the next phase.
Eight notification points are defined at this time. See belows:
EfiPciHostBridgeBeginEnumeration Resets the host bridge PCI apertures and internal data
structures. The PCI enumerator should issue this notification
before starting a fresh enumeration process. Enumeration cannot
be restarted after sending any other notification such as
EfiPciHostBridgeBeginBusAllocation.
EfiPciHostBridgeBeginBusAllocation The bus allocation phase is about to begin. No specific action is
required here. This notification can be used to perform any
chipset-specific programming.
EfiPciHostBridgeEndBusAllocation The bus allocation and bus programming phase is complete. No
specific action is required here. This notification can be used to
perform any chipset-specific programming.
EfiPciHostBridgeBeginResourceAllocation
The resource allocation phase is about to begin. No specific
action is required here. This notification can be used to perform
any chipset-specific programming.
EfiPciHostBridgeAllocateResources Allocates resources per previously submitted requests for all the PCI
root bridges. These resource settings are returned on the next call to
GetProposedResources(). Before calling NotifyPhase() with a Phase of
EfiPciHostBridgeAllocateResource, the PCI bus enumerator is responsible
for gathering I/O and memory requests for
all the PCI root bridges and submitting these requests using
SubmitResources(). This function pads the resource amount
to suit the root bridge hardware, takes care of dependencies between
the PCI root bridges, and calls the Global Coherency Domain (GCD)
with the allocation request. In the case of padding, the allocated range
could be bigger than what was requested.
EfiPciHostBridgeSetResources Programs the host bridge hardware to decode previously allocated
resources (proposed resources) for all the PCI root bridges. After the
hardware is programmed, reassigning resources will not be supported.
The bus settings are not affected.
EfiPciHostBridgeFreeResources Deallocates resources that were previously allocated for all the PCI
root bridges and resets the I/O and memory apertures to their initial
state. The bus settings are not affected. If the request to allocate
resources fails, the PCI enumerator can use this notification to
deallocate previous resources, adjust the requests, and retry
allocation.
EfiPciHostBridgeEndResourceAllocation The resource allocation phase is completed. No specific action is
required here. This notification can be used to perform any chipsetspecific
programming.
@param[in] PciResAlloc The instance pointer of EFI_PCI_HOST_BRIDGE_RESOURCE_ALLOCATION_PROTOCOL
@param[in] Phase The phase during enumeration
@retval EFI_NOT_READY This phase cannot be entered at this time. For example, this error
is valid for a Phase of EfiPciHostBridgeAllocateResources if
SubmitResources() has not been called for one or more
PCI root bridges before this call
@retval EFI_DEVICE_ERROR Programming failed due to a hardware error. This error is valid
for a Phase of EfiPciHostBridgeSetResources.
@retval EFI_INVALID_PARAMETER Invalid phase parameter
@retval EFI_OUT_OF_RESOURCES The request could not be completed due to a lack of resources.
This error is valid for a Phase of EfiPciHostBridgeAllocateResources if the
previously submitted resource requests cannot be fulfilled or
were only partially fulfilled.
@retval EFI_SUCCESS The notification was accepted without any errors.
**/
EFI_STATUS
NotifyPhase (
IN EFI_PCI_HOST_BRIDGE_RESOURCE_ALLOCATION_PROTOCOL *PciResAlloc,
EFI_PCI_HOST_BRIDGE_RESOURCE_ALLOCATION_PHASE Phase
);
/**
Provides the hooks from the PCI bus driver to every PCI controller (device/function) at various
stages of the PCI enumeration process that allow the host bridge driver to preinitialize individual
PCI controllers before enumeration.
This function is called during the PCI enumeration process. No specific action is expected from this
member function. It allows the host bridge driver to preinitialize individual PCI controllers before
enumeration.
@param Bridge Pointer to the EFI_PCI_HOST_BRIDGE_RESOURCE_ALLOCATION_PROTOCOL instance.
@param Bus The bus number of the pci device.
@param Device The device number of the pci device.
@param Func The function number of the pci device.
@param Phase The phase of the PCI device enumeration.
@retval EFI_SUCCESS The requested parameters were returned.
@retval EFI_INVALID_PARAMETER RootBridgeHandle is not a valid root bridge handle.
@retval EFI_INVALID_PARAMETER Phase is not a valid phase that is defined in
EFI_PCI_CONTROLLER_RESOURCE_ALLOCATION_PHASE.
@retval EFI_DEVICE_ERROR Programming failed due to a hardware error. The PCI enumerator should
not enumerate this device, including its child devices if it is a PCI-to-PCI
bridge.
**/
EFI_STATUS
PreprocessController (
IN PCI_IO_DEVICE *Bridge,
IN UINT8 Bus,
IN UINT8 Device,
IN UINT8 Func,
IN EFI_PCI_CONTROLLER_RESOURCE_ALLOCATION_PHASE Phase
);
/**
This function allows the PCI bus driver to be notified to act as requested when a hot-plug event has
happened on the hot-plug controller. Currently, the operations include add operation and remove operation..
@param This A pointer to the hot plug request protocol.
@param Operation The operation the PCI bus driver is requested to make.
@param Controller The handle of the hot-plug controller.
@param RemainingDevicePath The remaining device path for the PCI-like hot-plug device.
@param NumberOfChildren The number of child handles.
For a add operation, it is an output parameter.
For a remove operation, it's an input parameter.
@param ChildHandleBuffer The buffer which contains the child handles.
@retval EFI_INVALID_PARAMETER Operation is not a legal value.
Controller is NULL or not a valid handle.
NumberOfChildren is NULL.
ChildHandleBuffer is NULL while Operation is add.
@retval EFI_OUT_OF_RESOURCES There are no enough resources to start the devices.
@retval EFI_NOT_FOUND Can not find bridge according to controller handle.
@retval EFI_SUCCESS The handles for the specified device have been created or destroyed
as requested, and for an add operation, the new handles are
returned in ChildHandleBuffer.
**/
EFI_STATUS
EFIAPI
PciHotPlugRequestNotify (
IN EFI_PCI_HOTPLUG_REQUEST_PROTOCOL * This,
IN EFI_PCI_HOTPLUG_OPERATION Operation,
IN EFI_HANDLE Controller,
IN EFI_DEVICE_PATH_PROTOCOL * RemainingDevicePath OPTIONAL,
IN OUT UINT8 *NumberOfChildren,
IN OUT EFI_HANDLE * ChildHandleBuffer
);
/**
Search hostbridge according to given handle
@param RootBridgeHandle Host bridge handle.
@retval TRUE Found host bridge handle.
@retval FALSE Not found hot bridge handle.
**/
BOOLEAN
SearchHostBridgeHandle (
IN EFI_HANDLE RootBridgeHandle
);
/**
Add host bridge handle to global variable for enumerating.
@param HostBridgeHandle Host bridge handle.
@retval EFI_SUCCESS Successfully added host bridge.
@retval EFI_ABORTED Host bridge is NULL, or given host bridge
has been in host bridge list.
**/
EFI_STATUS
AddHostBridgeEnumerator (
IN EFI_HANDLE HostBridgeHandle
);
#endif

2494
IntelFrameworkModulePkg/Bus/Pci/PciBusDxe/PciEnumeratorSupport.c

File diff suppressed because it is too large Load Diff

463
IntelFrameworkModulePkg/Bus/Pci/PciBusDxe/PciEnumeratorSupport.h

@ -1,463 +0,0 @@
/** @file
PCI emumeration support functions declaration for PCI Bus module.
Copyright (c) 2006 - 2009, Intel Corporation
All rights reserved. This program and the accompanying materials
are licensed and made available under the terms and conditions of the BSD License
which accompanies this distribution. The full text of the license may be found at
http://opensource.org/licenses/bsd-license.php
THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
**/
#ifndef _EFI_PCI_ENUMERATOR_SUPPORT_H_
#define _EFI_PCI_ENUMERATOR_SUPPORT_H_
/**
This routine is used to check whether the pci device is present.
@param PciRootBridgeIo Pointer to instance of EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL.
@param Pci Output buffer for PCI device configuration space.
@param Bus PCI bus NO.
@param Device PCI device NO.
@param Func PCI Func NO.
@retval EFI_NOT_FOUND PCI device not present.
@retval EFI_SUCCESS PCI device is found.
**/
EFI_STATUS
PciDevicePresent (
IN EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL *PciRootBridgeIo,
OUT PCI_TYPE00 *Pci,
IN UINT8 Bus,
IN UINT8 Device,
IN UINT8 Func
);
/**
Collect all the resource information under this root bridge.
A database that records all the information about pci device subject to this
root bridge will then be created.
@param Bridge Parent bridge instance.
@param StartBusNumber Bus number of begining.
@retval EFI_SUCCESS PCI device is found.
@retval other Some error occurred when reading PCI bridge information.
**/
EFI_STATUS
PciPciDeviceInfoCollector (
IN PCI_IO_DEVICE *Bridge,
IN UINT8 StartBusNumber
);
/**
Seach required device and create PCI device instance.
@param Bridge Parent bridge instance.
@param Pci Input PCI device information block.
@param Bus PCI bus NO.
@param Device PCI device NO.
@param Func PCI func NO.
@param PciDevice Output of searched PCI device instance.
@retval EFI_SUCCESS Successfully created PCI device instance.
@retval EFI_OUT_OF_RESOURCES Cannot get PCI device information.
**/
EFI_STATUS
PciSearchDevice (
IN PCI_IO_DEVICE *Bridge,
IN PCI_TYPE00 *Pci,
IN UINT8 Bus,
IN UINT8 Device,
IN UINT8 Func,
OUT PCI_IO_DEVICE **PciDevice
);
/**
Create PCI device instance for PCI device.
@param Bridge Parent bridge instance.
@param Pci Input PCI device information block.
@param Bus PCI device Bus NO.
@param Device PCI device Device NO.
@param Func PCI device's func NO.
@return Created PCI device instance.
**/
PCI_IO_DEVICE *
GatherDeviceInfo (
IN PCI_IO_DEVICE *Bridge,
IN PCI_TYPE00 *Pci,
IN UINT8 Bus,
IN UINT8 Device,
IN UINT8 Func
);
/**
Create PCI device instance for PCI-PCI bridge.
@param Bridge Parent bridge instance.
@param Pci Input PCI device information block.
@param Bus PCI device Bus NO.
@param Device PCI device Device NO.
@param Func PCI device's func NO.
@return Created PCI device instance.
**/
PCI_IO_DEVICE *
GatherPpbInfo (
IN PCI_IO_DEVICE *Bridge,
IN PCI_TYPE00 *Pci,
IN UINT8 Bus,
IN UINT8 Device,
IN UINT8 Func
);
/**
Create PCI device instance for PCI Card bridge device.
@param Bridge Parent bridge instance.
@param Pci Input PCI device information block.
@param Bus PCI device Bus NO.
@param Device PCI device Device NO.
@param Func PCI device's func NO.
@return Created PCI device instance.
**/
PCI_IO_DEVICE *
GatherP2CInfo (
IN PCI_IO_DEVICE *Bridge,
IN PCI_TYPE00 *Pci,
IN UINT8 Bus,
IN UINT8 Device,
IN UINT8 Func
);
/**
Create device path for pci deivce.
@param ParentDevicePath Parent bridge's path.
@param PciIoDevice Pci device instance.
@return device path protocol instance for specific pci device.
**/
EFI_DEVICE_PATH_PROTOCOL *
CreatePciDevicePath (
IN EFI_DEVICE_PATH_PROTOCOL *ParentDevicePath,
IN PCI_IO_DEVICE *PciIoDevice
);
/**
Check whether the PCI IOV VF bar is existed or not.
@param PciIoDevice A pointer to the PCI_IO_DEVICE.
@param Offset The offset.
@param BarLengthValue The bar length value returned.
@param OriginalBarValue The original bar value returned.
@retval EFI_NOT_FOUND The bar doesn't exist.
@retval EFI_SUCCESS The bar exist.
**/
EFI_STATUS
VfBarExisted (
IN PCI_IO_DEVICE *PciIoDevice,
IN UINTN Offset,
OUT UINT32 *BarLengthValue,
OUT UINT32 *OriginalBarValue
);
/**
Check whether the bar is existed or not.
@param PciIoDevice A pointer to the PCI_IO_DEVICE.
@param Offset The offset.
@param BarLengthValue The bar length value returned.
@param OriginalBarValue The original bar value returned.
@retval EFI_NOT_FOUND The bar doesn't exist.
@retval EFI_SUCCESS The bar exist.
**/
EFI_STATUS
BarExisted (
IN PCI_IO_DEVICE *PciIoDevice,
IN UINTN Offset,
OUT UINT32 *BarLengthValue,
OUT UINT32 *OriginalBarValue
);
/**
Test whether the device can support given attributes.
@param PciIoDevice Pci device instance.
@param Command Input command register value, and
returned supported register value.
@param BridgeControl Inout bridge control value for PPB or P2C, and
returned supported bridge control value.
@param OldCommand Returned and stored old command register offset.
@param OldBridgeControl Returned and stored old Bridge control value for PPB or P2C.
**/
VOID
PciTestSupportedAttribute (
IN PCI_IO_DEVICE *PciIoDevice,
IN OUT UINT16 *Command,
IN OUT UINT16 *BridgeControl,
OUT UINT16 *OldCommand,
OUT UINT16 *OldBridgeControl
);
/**
Set the supported or current attributes of a PCI device.
@param PciIoDevice Structure pointer for PCI device.
@param Command Command register value.
@param BridgeControl Bridge control value for PPB or P2C.
@param Option Make a choice of EFI_SET_SUPPORTS or EFI_SET_ATTRIBUTES.
**/
VOID
PciSetDeviceAttribute (
IN PCI_IO_DEVICE *PciIoDevice,
IN UINT16 Command,
IN UINT16 BridgeControl,
IN UINTN Option
);
/**
Determine if the device can support Fast Back to Back attribute.
@param PciIoDevice Pci device instance.
@param StatusIndex Status register value.
@retval EFI_SUCCESS This device support Fast Back to Back attribute.
@retval EFI_UNSUPPORTED This device doesn't support Fast Back to Back attribute.
**/
EFI_STATUS
GetFastBackToBackSupport (
IN PCI_IO_DEVICE *PciIoDevice,
IN UINT8 StatusIndex
);
/**
Determine the related attributes of all devices under a Root Bridge.
@param PciIoDevice PCI device instance.
**/
EFI_STATUS
DetermineDeviceAttribute (
IN PCI_IO_DEVICE *PciIoDevice
);
/**
This routine is used to update the bar information for those incompatible PCI device.
@param PciIoDevice Input Pci device instance. Output Pci device instance with updated
Bar information.
@retval EFI_SUCCESS Successfully updated bar information.
@retval EFI_UNSUPPORTED Given PCI device doesn't belong to incompatible PCI device list.
**/
EFI_STATUS
UpdatePciInfo (
IN OUT PCI_IO_DEVICE *PciIoDevice
);
/**
This routine will update the alignment with the new alignment.
@param Alignment Input Old alignment. Output updated alignment.
@param NewAlignment New alignment.
**/
VOID
SetNewAlign (
IN OUT UINT64 *Alignment,
IN UINT64 NewAlignment
);
/**
Parse PCI bar information and fill them into PCI device instance.
@param PciIoDevice Pci device instance.
@param Offset Bar offset.
@param BarIndex Bar index.
@return Next bar offset.
**/
UINTN
PciParseBar (
IN PCI_IO_DEVICE *PciIoDevice,
IN UINTN Offset,
IN UINTN BarIndex
);
/**
Parse PCI IOV VF bar information and fill them into PCI device instance.
@param PciIoDevice Pci device instance.
@param Offset Bar offset.
@param BarIndex Bar index.
@return Next bar offset.
**/
UINTN
PciIovParseVfBar (
IN PCI_IO_DEVICE *PciIoDevice,
IN UINTN Offset,
IN UINTN BarIndex
);
/**
This routine is used to initialize the bar of a PCI device.
@param PciIoDevice Pci device instance.
@note It can be called typically when a device is going to be rejected.
**/
VOID
InitializePciDevice (
IN PCI_IO_DEVICE *PciIoDevice
);
/**
This routine is used to initialize the bar of a PCI-PCI Bridge device.
@param PciIoDevice PCI-PCI bridge device instance.
**/
VOID
InitializePpb (
IN PCI_IO_DEVICE *PciIoDevice
);
/**
This routine is used to initialize the bar of a PCI Card Bridge device.
@param PciIoDevice PCI Card bridge device.
**/
VOID
InitializeP2C (
IN PCI_IO_DEVICE *PciIoDevice
);
/**
Create and initiliaze general PCI I/O device instance for
PCI device/bridge device/hotplug bridge device.
@param PciRootBridgeIo Pointer to instance of EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL.
@param Pci Input Pci information block.
@param Bus Device Bus NO.
@param Device Device device NO.
@param Func Device func NO.
@return Instance of PCI device. NULL means no instance created.
**/
PCI_IO_DEVICE *
CreatePciIoDevice (
IN EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL *PciRootBridgeIo,
IN PCI_TYPE00 *Pci,
IN UINT8 Bus,
IN UINT8 Device,
IN UINT8 Func
);
/**
This routine is used to enumerate entire pci bus system
in a given platform.
It is only called on the second start on the same Root Bridge.
@param Controller Parent bridge handler.
@retval EFI_SUCCESS PCI enumeration finished successfully.
@retval other Some error occurred when enumerating the pci bus system.
**/
EFI_STATUS
PciEnumeratorLight (
IN EFI_HANDLE Controller
);
/**
Get bus range from PCI resource descriptor list.
@param Descriptors A pointer to the address space descriptor.
@param MinBus The min bus returned.
@param MaxBus The max bus returned.
@param BusRange The bus range returned.
@retval EFI_SUCCESS Successfully got bus range.
@retval EFI_NOT_FOUND Can not find the specific bus.
**/
EFI_STATUS
PciGetBusRange (
IN EFI_ACPI_ADDRESS_SPACE_DESCRIPTOR **Descriptors,
OUT UINT16 *MinBus,
OUT UINT16 *MaxBus,
OUT UINT16 *BusRange
);
/**
This routine can be used to start the root bridge.
@param RootBridgeDev Pci device instance.
@retval EFI_SUCCESS This device started.
@retval other Failed to get PCI Root Bridge I/O protocol.
**/
EFI_STATUS
StartManagingRootBridge (
IN PCI_IO_DEVICE *RootBridgeDev
);
/**
This routine can be used to check whether a PCI device should be rejected when light enumeration.
@param PciIoDevice Pci device instance.
@retval TRUE This device should be rejected.
@retval FALSE This device shouldn't be rejected.
**/
BOOLEAN
IsPciDeviceRejected (
IN PCI_IO_DEVICE *PciIoDevice
);
/**
Reset all bus number from specific bridge.
@param Bridge Parent specific bridge.
@param StartBusNumber Start bus number.
**/
VOID
ResetAllPpbBusNumber (
IN PCI_IO_DEVICE *Bridge,
IN UINT8 StartBusNumber
);
#endif

394
IntelFrameworkModulePkg/Bus/Pci/PciBusDxe/PciHotPlugSupport.c

@ -1,394 +0,0 @@
/** @file
PCI Hot Plug support functions implementation for PCI Bus module..
Copyright (c) 2006 - 2009, Intel Corporation
All rights reserved. This program and the accompanying materials
are licensed and made available under the terms and conditions of the BSD License
which accompanies this distribution. The full text of the license may be found at
http://opensource.org/licenses/bsd-license.php
THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
**/
#include "PciBus.h"
EFI_PCI_HOT_PLUG_INIT_PROTOCOL *gPciHotPlugInit = NULL;
EFI_HPC_LOCATION *gPciRootHpcPool = NULL;
UINTN gPciRootHpcCount = 0;
ROOT_HPC_DATA *gPciRootHpcData = NULL;
/**
Event notification function to set Hot Plug controller status.
@param Event The event that invoke this function.
@param Context The calling context, pointer to ROOT_HPC_DATA.
**/
VOID
EFIAPI
PciHPCInitialized (
IN EFI_EVENT Event,
IN VOID *Context
)
{
ROOT_HPC_DATA *HpcData;
HpcData = (ROOT_HPC_DATA *) Context;
HpcData->Initialized = TRUE;
}
/**
Compare two device pathes to check if they are exactly same.
@param DevicePath1 A pointer to the first device path data structure.
@param DevicePath2 A pointer to the second device path data structure.
@retval TRUE They are same.
@retval FALSE They are not same.
**/
BOOLEAN
EfiCompareDevicePath (
IN EFI_DEVICE_PATH_PROTOCOL *DevicePath1,
IN EFI_DEVICE_PATH_PROTOCOL *DevicePath2
)
{
UINTN Size1;
UINTN Size2;
Size1 = GetDevicePathSize (DevicePath1);
Size2 = GetDevicePathSize (DevicePath2);
if (Size1 != Size2) {
return FALSE;
}
if (CompareMem (DevicePath1, DevicePath2, Size1) != 0) {
return FALSE;
}
return TRUE;
}
/**
Check hot plug support and initialize root hot plug private data.
If Hot Plug is supported by the platform, call PCI Hot Plug Init protocol
to get PCI Hot Plug controller's information and constructor the root hot plug
private data structure.
@retval EFI_SUCCESS They are same.
@retval EFI_UNSUPPORTED No PCI Hot Plug controler on the platform.
@retval EFI_OUT_OF_RESOURCES No memory to constructor root hot plug private
data structure.
**/
EFI_STATUS
InitializeHotPlugSupport (
VOID
)
{
EFI_STATUS Status;
EFI_HPC_LOCATION *HpcList;
UINTN HpcCount;
//
// Locate the PciHotPlugInit Protocol
// If it doesn't exist, that means there is no
// hot plug controller supported on the platform
// the PCI Bus driver is running on. HotPlug Support
// is an optional feature, so absence of the protocol
// won't incur the penalty.
//
Status = gBS->LocateProtocol (
&gEfiPciHotPlugInitProtocolGuid,
NULL,
(VOID **) &gPciHotPlugInit
);
if (EFI_ERROR (Status)) {
return EFI_UNSUPPORTED;
}
Status = gPciHotPlugInit->GetRootHpcList (
gPciHotPlugInit,
&HpcCount,
&HpcList
);
if (!EFI_ERROR (Status)) {
gPciRootHpcPool = HpcList;
gPciRootHpcCount = HpcCount;
gPciRootHpcData = AllocateZeroPool (sizeof (ROOT_HPC_DATA) * gPciRootHpcCount);
if (gPciRootHpcData == NULL) {
return EFI_OUT_OF_RESOURCES;
}
}
return EFI_SUCCESS;
}
/**
Test whether device path is for root pci hot plug bus.
@param HpbDevicePath A pointer to device path data structure to be tested.
@param HpIndex If HpIndex is not NULL, return the index of root hot
plug in global array when TRUE is retuned.
@retval TRUE The device path is for root pci hot plug bus.
@retval FALSE The device path is not for root pci hot plug bus.
**/
BOOLEAN
IsRootPciHotPlugBus (
IN EFI_DEVICE_PATH_PROTOCOL *HpbDevicePath,
OUT UINTN *HpIndex OPTIONAL
)
{
UINTN Index;
for (Index = 0; Index < gPciRootHpcCount; Index++) {
if (EfiCompareDevicePath (gPciRootHpcPool[Index].HpbDevicePath, HpbDevicePath)) {
if (HpIndex != NULL) {
*HpIndex = Index;
}
return TRUE;
}
}
return FALSE;
}
/**
Test whether device path is for root pci hot plug controller.
@param HpcDevicePath A pointer to device path data structure to be tested.
@param HpIndex If HpIndex is not NULL, return the index of root hot
plug in global array when TRUE is retuned.
@retval TRUE The device path is for root pci hot plug controller.
@retval FALSE The device path is not for root pci hot plug controller.
**/
BOOLEAN
IsRootPciHotPlugController (
IN EFI_DEVICE_PATH_PROTOCOL *HpcDevicePath,
OUT UINTN *HpIndex
)
{
UINTN Index;
for (Index = 0; Index < gPciRootHpcCount; Index++) {
if (EfiCompareDevicePath (gPciRootHpcPool[Index].HpcDevicePath, HpcDevicePath)) {
if (HpIndex != NULL) {
*HpIndex = Index;
}
return TRUE;
}
}
return FALSE;
}
/**
Creating event object for PCI Hot Plug controller.
@param HpIndex Index of hot plug device in global array.
@param Event The retuned event that invoke this function.
@return Status of create event invoken.
**/
EFI_STATUS
CreateEventForHpc (
IN UINTN HpIndex,
OUT EFI_EVENT *Event
)
{
EFI_STATUS Status;
Status = gBS->CreateEvent (
EVT_NOTIFY_SIGNAL,
TPL_CALLBACK,
PciHPCInitialized,
gPciRootHpcData + HpIndex,
&((gPciRootHpcData + HpIndex)->Event)
);
if (!EFI_ERROR (Status)) {
*Event = (gPciRootHpcData + HpIndex)->Event;
}
return Status;
}
/**
Wait for all root PCI Hot Plug controller finished initializing.
@param TimeoutInMicroSeconds Microseconds to wait for all root HPCs' initialization.
@retval EFI_SUCCESS All HPCs initialization finished.
@retval EFI_TIMEOUT Not ALL HPCs initialization finished in Microseconds.
**/
EFI_STATUS
AllRootHPCInitialized (
IN UINTN TimeoutInMicroSeconds
)
{
UINT32 Delay;
UINTN Index;
Delay = (UINT32) ((TimeoutInMicroSeconds / 30) + 1);
do {
for (Index = 0; Index < gPciRootHpcCount; Index++) {
if (!gPciRootHpcData[Index].Initialized) {
break;
}
}
if (Index == gPciRootHpcCount) {
return EFI_SUCCESS;
}
//
// Stall for 30 microseconds..
//
gBS->Stall (30);
Delay--;
} while (Delay > 0);
return EFI_TIMEOUT;
}
/**
Check whether PCI-PCI bridge has PCI Hot Plug capability register block.
@param PciIoDevice A Pointer to the PCI-PCI bridge.
@retval TRUE PCI device is HPC.
@retval FALSE PCI device is not HPC.
**/
BOOLEAN
IsSHPC (
IN PCI_IO_DEVICE *PciIoDevice
)
{
EFI_STATUS Status;
UINT8 Offset;
if (PciIoDevice == NULL) {
return FALSE;
}
Offset = 0;
Status = LocateCapabilityRegBlock (
PciIoDevice,
EFI_PCI_CAPABILITY_ID_HOTPLUG,
&Offset,
NULL
);
//
// If the PCI-PCI bridge has the hot plug controller build-in,
// then return TRUE;
//
if (!EFI_ERROR (Status)) {
return TRUE;
}
return FALSE;
}
/**
Get resource padding if the specified PCI bridge is a hot plug bus.
@param PciIoDevice PCI bridge instance.
**/
VOID
GetResourcePaddingForHpb (
IN PCI_IO_DEVICE *PciIoDevice
)
{
EFI_STATUS Status;
EFI_HPC_STATE State;
UINT64 PciAddress;
EFI_HPC_PADDING_ATTRIBUTES Attributes;
EFI_ACPI_ADDRESS_SPACE_DESCRIPTOR *Descriptors;
if (IsPciHotPlugBus (PciIoDevice)) {
//
// If PCI-PCI bridge device is PCI Hot Plug bus.
//
PciAddress = EFI_PCI_ADDRESS (PciIoDevice->BusNumber, PciIoDevice->DeviceNumber, PciIoDevice->FunctionNumber, 0);
Status = gPciHotPlugInit->GetResourcePadding (
gPciHotPlugInit,
PciIoDevice->DevicePath,
PciAddress,
&State,
(VOID **) &Descriptors,
&Attributes
);
if (EFI_ERROR (Status)) {
return;
}
if ((State & EFI_HPC_STATE_ENABLED) != 0 && (State & EFI_HPC_STATE_INITIALIZED) != 0) {
PciIoDevice->ResourcePaddingDescriptors = Descriptors;
PciIoDevice->PaddingAttributes = Attributes;
}
return;
}
}
/**
Test whether PCI device is hot plug bus.
@param PciIoDevice PCI device instance.
@retval TRUE PCI device is a hot plug bus.
@retval FALSE PCI device is not a hot plug bus.
**/
BOOLEAN
IsPciHotPlugBus (
PCI_IO_DEVICE *PciIoDevice
)
{
if (IsSHPC (PciIoDevice)) {
//
// If the PPB has the hot plug controller build-in,
// then return TRUE;
//
return TRUE;
}
//
// Otherwise, see if it is a Root HPC
//
if(IsRootPciHotPlugBus (PciIoDevice->DevicePath, NULL)) {
return TRUE;
}
return FALSE;
}

189
IntelFrameworkModulePkg/Bus/Pci/PciBusDxe/PciHotPlugSupport.h

@ -1,189 +0,0 @@
/** @file
PCI Hot Plug support functions declaration for PCI Bus module.
Copyright (c) 2006 - 2009, Intel Corporation
All rights reserved. This program and the accompanying materials
are licensed and made available under the terms and conditions of the BSD License
which accompanies this distribution. The full text of the license may be found at
http://opensource.org/licenses/bsd-license.php
THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
**/
#ifndef _EFI_PCI_HOT_PLUG_SUPPORT_H_
#define _EFI_PCI_HOT_PLUG_SUPPORT_H_
//
// stall 1 second, its unit is 100ns
//
#define STALL_1_SECOND 1000000
//
// PCI Hot Plug controller private data
//
typedef struct {
EFI_EVENT Event;
BOOLEAN Initialized;
VOID *Padding;
} ROOT_HPC_DATA;
//
// Reference of some global variabes
//
extern EFI_PCI_HOT_PLUG_INIT_PROTOCOL *gPciHotPlugInit;
extern EFI_HPC_LOCATION *gPciRootHpcPool;
extern ROOT_HPC_DATA *gPciRootHpcData;
/**
Event notification function to set Hot Plug controller status.
@param Event The event that invoke this function.
@param Context The calling context, pointer to ROOT_HPC_DATA.
**/
VOID
EFIAPI
PciHPCInitialized (
IN EFI_EVENT Event,
IN VOID *Context
);
/**
Compare two device pathes to check if they are exactly same.
@param DevicePath1 A pointer to the first device path data structure.
@param DevicePath2 A pointer to the second device path data structure.
@retval TRUE They are same.
@retval FALSE They are not same.
**/
BOOLEAN
EfiCompareDevicePath (
IN EFI_DEVICE_PATH_PROTOCOL *DevicePath1,
IN EFI_DEVICE_PATH_PROTOCOL *DevicePath2
);
/**
Check hot plug support and initialize root hot plug private data.
If Hot Plug is supported by the platform, call PCI Hot Plug Init protocol
to get PCI Hot Plug controller's information and constructor the root hot plug
private data structure.
@retval EFI_SUCCESS They are same.
@retval EFI_UNSUPPORTED No PCI Hot Plug controler on the platform.
@retval EFI_OUT_OF_RESOURCES No memory to constructor root hot plug private
data structure.
**/
EFI_STATUS
InitializeHotPlugSupport (
VOID
);
/**
Test whether PCI device is hot plug bus.
@param PciIoDevice PCI device instance.
@retval TRUE PCI device is a hot plug bus.
@retval FALSE PCI device is not a hot plug bus.
**/
BOOLEAN
IsPciHotPlugBus (
PCI_IO_DEVICE *PciIoDevice
);
/**
Test whether device path is for root pci hot plug bus.
@param HpbDevicePath A pointer to device path data structure to be tested.
@param HpIndex If HpIndex is not NULL, return the index of root hot
plug in global array when TRUE is retuned.
@retval TRUE The device path is for root pci hot plug bus.
@retval FALSE The device path is not for root pci hot plug bus.
**/
BOOLEAN
IsRootPciHotPlugBus (
IN EFI_DEVICE_PATH_PROTOCOL *HpbDevicePath,
OUT UINTN *HpIndex OPTIONAL
);
/**
Test whether device path is for root pci hot plug controller.
@param HpcDevicePath A pointer to device path data structure to be tested.
@param HpIndex If HpIndex is not NULL, return the index of root hot
plug in global array when TRUE is retuned.
@retval TRUE The device path is for root pci hot plug controller.
@retval FALSE The device path is not for root pci hot plug controller.
**/
BOOLEAN
IsRootPciHotPlugController (
IN EFI_DEVICE_PATH_PROTOCOL *HpcDevicePath,
OUT UINTN *HpIndex
);
/**
Creating event object for PCI Hot Plug controller.
@param HpIndex Index of hot plug device in global array.
@param Event The retuned event that invoke this function.
@return Status of create event invoken.
**/
EFI_STATUS
CreateEventForHpc (
IN UINTN HpIndex,
OUT EFI_EVENT *Event
);
/**
Wait for all root PCI Hot Plug controller finished initializing.
@param TimeoutInMicroSeconds Microseconds to wait for all root HPCs' initialization.
@retval EFI_SUCCESS All HPCs initialization finished.
@retval EFI_TIMEOUT Not ALL HPCs initialization finished in Microseconds.
**/
EFI_STATUS
AllRootHPCInitialized (
IN UINTN TimeoutInMicroSeconds
);
/**
Check whether PCI-PCI bridge has PCI Hot Plug capability register block.
@param PciIoDevice A Pointer to the PCI-PCI bridge.
@retval TRUE PCI device is HPC.
@retval FALSE PCI device is not HPC.
**/
BOOLEAN
IsSHPC (
IN PCI_IO_DEVICE *PciIoDevice
);
/**
Get resource padding if the specified PCI bridge is a hot plug bus.
@param PciIoDevice PCI bridge instance.
**/
VOID
GetResourcePaddingForHpb (
IN PCI_IO_DEVICE *PciIoDevice
);
#endif

1877
IntelFrameworkModulePkg/Bus/Pci/PciBusDxe/PciIo.c

File diff suppressed because it is too large Load Diff

687
IntelFrameworkModulePkg/Bus/Pci/PciBusDxe/PciIo.h

@ -1,687 +0,0 @@
/** @file
EFI PCI IO protocol functions declaration for PCI Bus module.
Copyright (c) 2006 - 2009, Intel Corporation
All rights reserved. This program and the accompanying materials
are licensed and made available under the terms and conditions of the BSD License
which accompanies this distribution. The full text of the license may be found at
http://opensource.org/licenses/bsd-license.php
THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
**/
#ifndef _EFI_PCI_IO_PROTOCOL_H_
#define _EFI_PCI_IO_PROTOCOL_H_
/**
Initializes a PCI I/O Instance.
@param PciIoDevice Pci device instance.
**/
VOID
InitializePciIoInstance (
IN PCI_IO_DEVICE *PciIoDevice
);
/**
Verifies access to a PCI Base Address Register (BAR).
@param PciIoDevice Pci device instance.
@param BarIndex The BAR index of the standard PCI Configuration header to use as the
base address for the memory or I/O operation to perform.
@param Type Operation type could be memory or I/O.
@param Width Signifies the width of the memory or I/O operations.
@param Count The number of memory or I/O operations to perform.
@param Offset The offset within the PCI configuration space for the PCI controller.
@retval EFI_INVALID_PARAMETER Invalid Width/BarIndex or Bar type.
@retval EFI_SUCCESS Successfully verified.
**/
EFI_STATUS
PciIoVerifyBarAccess (
IN PCI_IO_DEVICE *PciIoDevice,
IN UINT8 BarIndex,
IN PCI_BAR_TYPE Type,
IN IN EFI_PCI_IO_PROTOCOL_WIDTH Width,
IN IN UINTN Count,
IN UINT64 *Offset
);
/**
Verifies access to a PCI Configuration Header.
@param PciIoDevice Pci device instance.
@param Width Signifies the width of the memory or I/O operations.
@param Count The number of memory or I/O operations to perform.
@param Offset The offset within the PCI configuration space for the PCI controller.
@retval EFI_INVALID_PARAMETER Invalid Width
@retval EFI_UNSUPPORTED Offset overflowed.
@retval EFI_SUCCESS Successfully verified.
**/
EFI_STATUS
PciIoVerifyConfigAccess (
IN PCI_IO_DEVICE *PciIoDevice,
IN EFI_PCI_IO_PROTOCOL_WIDTH Width,
IN UINTN Count,
IN UINT64 *Offset
);
/**
Reads from the memory space of a PCI controller. Returns either when the polling exit criteria is
satisfied or after a defined duration.
@param This A pointer to the EFI_PCI_IO_PROTOCOL instance.
@param Width Signifies the width of the memory or I/O operations.
@param BarIndex The BAR index of the standard PCI Configuration header to use as the
base address for the memory operation to perform.
@param Offset The offset within the selected BAR to start the memory operation.
@param Mask Mask used for the polling criteria.
@param Value The comparison value used for the polling exit criteria.
@param Delay The number of 100 ns units to poll.
@param Result Pointer to the last value read from the memory location.
@retval EFI_SUCCESS The last data returned from the access matched the poll exit criteria.
@retval EFI_UNSUPPORTED BarIndex not valid for this PCI controller.
@retval EFI_UNSUPPORTED Offset is not valid for the BarIndex of this PCI controller.
@retval EFI_TIMEOUT Delay expired before a match occurred.
@retval EFI_OUT_OF_RESOURCES The request could not be completed due to a lack of resources.
@retval EFI_INVALID_PARAMETER One or more parameters are invalid.
**/
EFI_STATUS
EFIAPI
PciIoPollMem (
IN EFI_PCI_IO_PROTOCOL *This,
IN EFI_PCI_IO_PROTOCOL_WIDTH Width,
IN UINT8 BarIndex,
IN UINT64 Offset,
IN UINT64 Mask,
IN UINT64 Value,
IN UINT64 Delay,
OUT UINT64 *Result
);
/**
Reads from the memory space of a PCI controller. Returns either when the polling exit criteria is
satisfied or after a defined duration.
@param This A pointer to the EFI_PCI_IO_PROTOCOL instance.
@param Width Signifies the width of the memory or I/O operations.
@param BarIndex The BAR index of the standard PCI Configuration header to use as the
base address for the memory operation to perform.
@param Offset The offset within the selected BAR to start the memory operation.
@param Mask Mask used for the polling criteria.
@param Value The comparison value used for the polling exit criteria.
@param Delay The number of 100 ns units to poll.
@param Result Pointer to the last value read from the memory location.
@retval EFI_SUCCESS The last data returned from the access matched the poll exit criteria.
@retval EFI_UNSUPPORTED BarIndex not valid for this PCI controller.
@retval EFI_UNSUPPORTED Offset is not valid for the BarIndex of this PCI controller.
@retval EFI_TIMEOUT Delay expired before a match occurred.
@retval EFI_OUT_OF_RESOURCES The request could not be completed due to a lack of resources.
@retval EFI_INVALID_PARAMETER One or more parameters are invalid.
**/
EFI_STATUS
EFIAPI
PciIoPollIo (
IN EFI_PCI_IO_PROTOCOL *This,
IN EFI_PCI_IO_PROTOCOL_WIDTH Width,
IN UINT8 BarIndex,
IN UINT64 Offset,
IN UINT64 Mask,
IN UINT64 Value,
IN UINT64 Delay,
OUT UINT64 *Result
);
/**
Enable a PCI driver to access PCI controller registers in the PCI memory or I/O space.
@param This A pointer to the EFI_PCI_IO_PROTOCOL instance.
@param Width Signifies the width of the memory or I/O operations.
@param BarIndex The BAR index of the standard PCI Configuration header to use as the
base address for the memory or I/O operation to perform.
@param Offset The offset within the selected BAR to start the memory or I/O operation.
@param Count The number of memory or I/O operations to perform.
@param Buffer For read operations, the destination buffer to store the results. For write
operations, the source buffer to write data from.
@retval EFI_SUCCESS The data was read from or written to the PCI controller.
@retval EFI_UNSUPPORTED BarIndex not valid for this PCI controller.
@retval EFI_UNSUPPORTED The address range specified by Offset, Width, and Count is not
valid for the PCI BAR specified by BarIndex.
@retval EFI_OUT_OF_RESOURCES The request could not be completed due to a lack of resources.
@retval EFI_INVALID_PARAMETER One or more parameters are invalid.
**/
EFI_STATUS
EFIAPI
PciIoMemRead (
IN EFI_PCI_IO_PROTOCOL *This,
IN EFI_PCI_IO_PROTOCOL_WIDTH Width,
IN UINT8 BarIndex,
IN UINT64 Offset,
IN UINTN Count,
IN OUT VOID *Buffer
);
/**
Enable a PCI driver to access PCI controller registers in the PCI memory or I/O space.
@param This A pointer to the EFI_PCI_IO_PROTOCOL instance.
@param Width Signifies the width of the memory or I/O operations.
@param BarIndex The BAR index of the standard PCI Configuration header to use as the
base address for the memory or I/O operation to perform.
@param Offset The offset within the selected BAR to start the memory or I/O operation.
@param Count The number of memory or I/O operations to perform.
@param Buffer For read operations, the destination buffer to store the results. For write
operations, the source buffer to write data from.
@retval EFI_SUCCESS The data was read from or written to the PCI controller.
@retval EFI_UNSUPPORTED BarIndex not valid for this PCI controller.
@retval EFI_UNSUPPORTED The address range specified by Offset, Width, and Count is not
valid for the PCI BAR specified by BarIndex.
@retval EFI_OUT_OF_RESOURCES The request could not be completed due to a lack of resources.
@retval EFI_INVALID_PARAMETER One or more parameters are invalid.
**/
EFI_STATUS
EFIAPI
PciIoMemWrite (
IN EFI_PCI_IO_PROTOCOL *This,
IN EFI_PCI_IO_PROTOCOL_WIDTH Width,
IN UINT8 BarIndex,
IN UINT64 Offset,
IN UINTN Count,
IN OUT VOID *Buffer
);
/**
Enable a PCI driver to access PCI controller registers in the PCI memory or I/O space.
@param This A pointer to the EFI_PCI_IO_PROTOCOL instance.
@param Width Signifies the width of the memory or I/O operations.
@param BarIndex The BAR index of the standard PCI Configuration header to use as the
base address for the memory or I/O operation to perform.
@param Offset The offset within the selected BAR to start the memory or I/O operation.
@param Count The number of memory or I/O operations to perform.
@param Buffer For read operations, the destination buffer to store the results. For write
operations, the source buffer to write data from.
@retval EFI_SUCCESS The data was read from or written to the PCI controller.
@retval EFI_UNSUPPORTED BarIndex not valid for this PCI controller.
@retval EFI_UNSUPPORTED The address range specified by Offset, Width, and Count is not
valid for the PCI BAR specified by BarIndex.
@retval EFI_OUT_OF_RESOURCES The request could not be completed due to a lack of resources.
@retval EFI_INVALID_PARAMETER One or more parameters are invalid.
**/
EFI_STATUS
EFIAPI
PciIoIoRead (
IN EFI_PCI_IO_PROTOCOL *This,
IN EFI_PCI_IO_PROTOCOL_WIDTH Width,
IN UINT8 BarIndex,
IN UINT64 Offset,
IN UINTN Count,
IN OUT VOID *Buffer
);
/**
Enable a PCI driver to access PCI controller registers in the PCI memory or I/O space.
@param This A pointer to the EFI_PCI_IO_PROTOCOL instance.
@param Width Signifies the width of the memory or I/O operations.
@param BarIndex The BAR index of the standard PCI Configuration header to use as the
base address for the memory or I/O operation to perform.
@param Offset The offset within the selected BAR to start the memory or I/O operation.
@param Count The number of memory or I/O operations to perform.
@param Buffer For read operations, the destination buffer to store the results. For write
operations, the source buffer to write data from.
@retval EFI_SUCCESS The data was read from or written to the PCI controller.
@retval EFI_UNSUPPORTED BarIndex not valid for this PCI controller.
@retval EFI_UNSUPPORTED The address range specified by Offset, Width, and Count is not
valid for the PCI BAR specified by BarIndex.
@retval EFI_OUT_OF_RESOURCES The request could not be completed due to a lack of resources.
@retval EFI_INVALID_PARAMETER One or more parameters are invalid.
**/
EFI_STATUS
EFIAPI
PciIoIoWrite (
IN EFI_PCI_IO_PROTOCOL *This,
IN EFI_PCI_IO_PROTOCOL_WIDTH Width,
IN UINT8 BarIndex,
IN UINT64 Offset,
IN UINTN Count,
IN OUT VOID *Buffer
);
/**
Enable a PCI driver to access PCI controller registers in PCI configuration space.
@param This A pointer to the EFI_PCI_IO_PROTOCOL instance.
@param Width Signifies the width of the memory operations.
@param Offset The offset within the PCI configuration space for the PCI controller.
@param Count The number of PCI configuration operations to perform.
@param Buffer For read operations, the destination buffer to store the results. For write
operations, the source buffer to write data from.
@retval EFI_SUCCESS The data was read from or written to the PCI controller.
@retval EFI_UNSUPPORTED The address range specified by Offset, Width, and Count is not
valid for the PCI configuration header of the PCI controller.
@retval EFI_OUT_OF_RESOURCES The request could not be completed due to a lack of resources.
@retval EFI_INVALID_PARAMETER Buffer is NULL or Width is invalid.
**/
EFI_STATUS
EFIAPI
PciIoConfigRead (
IN EFI_PCI_IO_PROTOCOL *This,
IN EFI_PCI_IO_PROTOCOL_WIDTH Width,
IN UINT32 Offset,
IN UINTN Count,
IN OUT VOID *Buffer
);
/**
Enable a PCI driver to access PCI controller registers in PCI configuration space.
@param This A pointer to the EFI_PCI_IO_PROTOCOL instance.
@param Width Signifies the width of the memory operations.
@param Offset The offset within the PCI configuration space for the PCI controller.
@param Count The number of PCI configuration operations to perform.
@param Buffer For read operations, the destination buffer to store the results. For write
operations, the source buffer to write data from.
@retval EFI_SUCCESS The data was read from or written to the PCI controller.
@retval EFI_UNSUPPORTED The address range specified by Offset, Width, and Count is not
valid for the PCI configuration header of the PCI controller.
@retval EFI_OUT_OF_RESOURCES The request could not be completed due to a lack of resources.
@retval EFI_INVALID_PARAMETER Buffer is NULL or Width is invalid.
**/
EFI_STATUS
EFIAPI
PciIoConfigWrite (
IN EFI_PCI_IO_PROTOCOL *This,
IN EFI_PCI_IO_PROTOCOL_WIDTH Width,
IN UINT32 Offset,
IN UINTN Count,
IN OUT VOID *Buffer
);
/**
Enables a PCI driver to copy one region of PCI memory space to another region of PCI
memory space.
@param This A pointer to the EFI_PCI_IO_PROTOCOL instance.
@param Width Signifies the width of the memory operations.
@param DestBarIndex The BAR index in the standard PCI Configuration header to use as the
base address for the memory operation to perform.
@param DestOffset The destination offset within the BAR specified by DestBarIndex to
start the memory writes for the copy operation.
@param SrcBarIndex The BAR index in the standard PCI Configuration header to use as the
base address for the memory operation to perform.
@param SrcOffset The source offset within the BAR specified by SrcBarIndex to start
the memory reads for the copy operation.
@param Count The number of memory operations to perform. Bytes moved is Width
size * Count, starting at DestOffset and SrcOffset.
@retval EFI_SUCCESS The data was copied from one memory region to another memory region.
@retval EFI_UNSUPPORTED DestBarIndex not valid for this PCI controller.
@retval EFI_UNSUPPORTED SrcBarIndex not valid for this PCI controller.
@retval EFI_UNSUPPORTED The address range specified by DestOffset, Width, and Count
is not valid for the PCI BAR specified by DestBarIndex.
@retval EFI_UNSUPPORTED The address range specified by SrcOffset, Width, and Count is
not valid for the PCI BAR specified by SrcBarIndex.
@retval EFI_INVALID_PARAMETER Width is invalid.
@retval EFI_OUT_OF_RESOURCES The request could not be completed due to a lack of resources.
**/
EFI_STATUS
EFIAPI
PciIoCopyMem (
IN EFI_PCI_IO_PROTOCOL *This,
IN EFI_PCI_IO_PROTOCOL_WIDTH Width,
IN UINT8 DestBarIndex,
IN UINT64 DestOffset,
IN UINT8 SrcBarIndex,
IN UINT64 SrcOffset,
IN UINTN Count
);
/**
Provides the PCI controller-specific addresses needed to access system memory.
@param This A pointer to the EFI_PCI_IO_PROTOCOL instance.
@param Operation Indicates if the bus master is going to read or write to system memory.
@param HostAddress The system memory address to map to the PCI controller.
@param NumberOfBytes On input the number of bytes to map. On output the number of bytes
that were mapped.
@param DeviceAddress The resulting map address for the bus master PCI controller to use to
access the hosts HostAddress.
@param Mapping A resulting value to pass to Unmap().
@retval EFI_SUCCESS The range was mapped for the returned NumberOfBytes.
@retval EFI_UNSUPPORTED The HostAddress cannot be mapped as a common buffer.
@retval EFI_INVALID_PARAMETER One or more parameters are invalid.
@retval EFI_OUT_OF_RESOURCES The request could not be completed due to a lack of resources.
@retval EFI_DEVICE_ERROR The system hardware could not map the requested address.
**/
EFI_STATUS
EFIAPI
PciIoMap (
IN EFI_PCI_IO_PROTOCOL *This,
IN EFI_PCI_IO_PROTOCOL_OPERATION Operation,
IN VOID *HostAddress,
IN OUT UINTN *NumberOfBytes,
OUT EFI_PHYSICAL_ADDRESS *DeviceAddress,
OUT VOID **Mapping
);
/**
Completes the Map() operation and releases any corresponding resources.
@param This A pointer to the EFI_PCI_IO_PROTOCOL instance.
@param Mapping The mapping value returned from Map().
@retval EFI_SUCCESS The range was unmapped.
@retval EFI_DEVICE_ERROR The data was not committed to the target system memory.
**/
EFI_STATUS
EFIAPI
PciIoUnmap (
IN EFI_PCI_IO_PROTOCOL *This,
IN VOID *Mapping
);
/**
Allocates pages that are suitable for an EfiPciIoOperationBusMasterCommonBuffer
mapping.
@param This A pointer to the EFI_PCI_IO_PROTOCOL instance.
@param Type This parameter is not used and must be ignored.
@param MemoryType The type of memory to allocate, EfiBootServicesData or
EfiRuntimeServicesData.
@param Pages The number of pages to allocate.
@param HostAddress A pointer to store the base system memory address of the
allocated range.
@param Attributes The requested bit mask of attributes for the allocated range.
@retval EFI_SUCCESS The requested memory pages were allocated.
@retval EFI_UNSUPPORTED Attributes is unsupported. The only legal attribute bits are
MEMORY_WRITE_COMBINE and MEMORY_CACHED.
@retval EFI_INVALID_PARAMETER One or more parameters are invalid.
@retval EFI_OUT_OF_RESOURCES The memory pages could not be allocated.
**/
EFI_STATUS
EFIAPI
PciIoAllocateBuffer (
IN EFI_PCI_IO_PROTOCOL *This,
IN EFI_ALLOCATE_TYPE Type,
IN EFI_MEMORY_TYPE MemoryType,
IN UINTN Pages,
OUT VOID **HostAddress,
IN UINT64 Attributes
);
/**
Frees memory that was allocated with AllocateBuffer().
@param This A pointer to the EFI_PCI_IO_PROTOCOL instance.
@param Pages The number of pages to free.
@param HostAddress The base system memory address of the allocated range.
@retval EFI_SUCCESS The requested memory pages were freed.
@retval EFI_INVALID_PARAMETER The memory range specified by HostAddress and Pages
was not allocated with AllocateBuffer().
**/
EFI_STATUS
EFIAPI
PciIoFreeBuffer (
IN EFI_PCI_IO_PROTOCOL *This,
IN UINTN Pages,
IN VOID *HostAddress
);
/**
Flushes all PCI posted write transactions from a PCI host bridge to system memory.
@param This A pointer to the EFI_PCI_IO_PROTOCOL instance.
@retval EFI_SUCCESS The PCI posted write transactions were flushed from the PCI host
bridge to system memory.
@retval EFI_DEVICE_ERROR The PCI posted write transactions were not flushed from the PCI
host bridge due to a hardware error.
**/
EFI_STATUS
EFIAPI
PciIoFlush (
IN EFI_PCI_IO_PROTOCOL *This
);
/**
Retrieves this PCI controller's current PCI bus number, device number, and function number.
@param This A pointer to the EFI_PCI_IO_PROTOCOL instance.
@param SegmentNumber The PCI controller's current PCI segment number.
@param BusNumber The PCI controller's current PCI bus number.
@param DeviceNumber The PCI controller's current PCI device number.
@param FunctionNumber The PCI controller's current PCI function number.
@retval EFI_SUCCESS The PCI controller location was returned.
@retval EFI_INVALID_PARAMETER One or more parameters are invalid.
**/
EFI_STATUS
EFIAPI
PciIoGetLocation (
IN EFI_PCI_IO_PROTOCOL *This,
OUT UINTN *Segment,
OUT UINTN *Bus,
OUT UINTN *Device,
OUT UINTN *Function
);
/**
Check BAR type for PCI resource.
@param PciIoDevice PCI device instance.
@param BarIndex The BAR index of the standard PCI Configuration header to use as the
base address for the memory or I/O operation to perform.
@param BarType Memory or I/O.
@retval TRUE Pci device's bar type is same with input BarType.
@retval TRUE Pci device's bar type is not same with input BarType.
**/
BOOLEAN
CheckBarType (
IN PCI_IO_DEVICE *PciIoDevice,
IN UINT8 BarIndex,
IN PCI_BAR_TYPE BarType
);
/**
Set/Disable new attributes to a Root Bridge.
@param PciIoDevice Pci device instance.
@param Attributes New attribute want to be set.
@param Operation Set or Disable.
@retval EFI_UNSUPPORTED If root bridge does not support change attribute.
@retval EFI_SUCCESS Successfully set new attributs.
**/
EFI_STATUS
ModifyRootBridgeAttributes (
IN PCI_IO_DEVICE *PciIoDevice,
IN UINT64 Attributes,
IN EFI_PCI_IO_PROTOCOL_ATTRIBUTE_OPERATION Operation
);
/**
Check whether this device can be enable/disable to snoop.
@param PciIoDevice Pci device instance.
@param Operation Enable/Disable.
@retval EFI_UNSUPPORTED Pci device is not GFX device or not support snoop.
@retval EFI_SUCCESS Snoop can be supported.
**/
EFI_STATUS
SupportPaletteSnoopAttributes (
IN PCI_IO_DEVICE *PciIoDevice,
IN EFI_PCI_IO_PROTOCOL_ATTRIBUTE_OPERATION Operation
);
/**
Performs an operation on the attributes that this PCI controller supports. The operations include
getting the set of supported attributes, retrieving the current attributes, setting the current
attributes, enabling attributes, and disabling attributes.
@param This A pointer to the EFI_PCI_IO_PROTOCOL instance.
@param Operation The operation to perform on the attributes for this PCI controller.
@param Attributes The mask of attributes that are used for Set, Enable, and Disable
operations.
@param Result A pointer to the result mask of attributes that are returned for the Get
and Supported operations.
@retval EFI_SUCCESS The operation on the PCI controller's attributes was completed.
@retval EFI_INVALID_PARAMETER One or more parameters are invalid.
@retval EFI_UNSUPPORTED one or more of the bits set in
Attributes are not supported by this PCI controller or one of
its parent bridges when Operation is Set, Enable or Disable.
**/
EFI_STATUS
EFIAPI
PciIoAttributes (
IN EFI_PCI_IO_PROTOCOL * This,
IN EFI_PCI_IO_PROTOCOL_ATTRIBUTE_OPERATION Operation,
IN UINT64 Attributes,
OUT UINT64 *Result OPTIONAL
);
/**
Gets the attributes that this PCI controller supports setting on a BAR using
SetBarAttributes(), and retrieves the list of resource descriptors for a BAR.
@param This A pointer to the EFI_PCI_IO_PROTOCOL instance.
@param BarIndex The BAR index of the standard PCI Configuration header to use as the
base address for resource range. The legal range for this field is 0..5.
@param Supports A pointer to the mask of attributes that this PCI controller supports
setting for this BAR with SetBarAttributes().
@param Resources A pointer to the ACPI 2.0 resource descriptors that describe the current
configuration of this BAR of the PCI controller.
@retval EFI_SUCCESS If Supports is not NULL, then the attributes that the PCI
controller supports are returned in Supports. If Resources
is not NULL, then the ACPI 2.0 resource descriptors that the PCI
controller is currently using are returned in Resources.
@retval EFI_INVALID_PARAMETER Both Supports and Attributes are NULL.
@retval EFI_UNSUPPORTED BarIndex not valid for this PCI controller.
@retval EFI_OUT_OF_RESOURCES There are not enough resources available to allocate
Resources.
**/
EFI_STATUS
EFIAPI
PciIoGetBarAttributes (
IN EFI_PCI_IO_PROTOCOL * This,
IN UINT8 BarIndex,
OUT UINT64 *Supports, OPTIONAL
OUT VOID **Resources OPTIONAL
);
/**
Sets the attributes for a range of a BAR on a PCI controller.
@param This A pointer to the EFI_PCI_IO_PROTOCOL instance.
@param Attributes The mask of attributes to set for the resource range specified by
BarIndex, Offset, and Length.
@param BarIndex The BAR index of the standard PCI Configuration header to use as the
base address for resource range. The legal range for this field is 0..5.
@param Offset A pointer to the BAR relative base address of the resource range to be
modified by the attributes specified by Attributes.
@param Length A pointer to the length of the resource range to be modified by the
attributes specified by Attributes.
@retval EFI_SUCCESS The set of attributes specified by Attributes for the resource
range specified by BarIndex, Offset, and Length were
set on the PCI controller, and the actual resource range is returned
in Offset and Length.
@retval EFI_INVALID_PARAMETER Offset or Length is NULL.
@retval EFI_UNSUPPORTED BarIndex not valid for this PCI controller.
@retval EFI_OUT_OF_RESOURCES There are not enough resources to set the attributes on the
resource range specified by BarIndex, Offset, and
Length.
**/
EFI_STATUS
EFIAPI
PciIoSetBarAttributes (
IN EFI_PCI_IO_PROTOCOL *This,
IN UINT64 Attributes,
IN UINT8 BarIndex,
IN OUT UINT64 *Offset,
IN OUT UINT64 *Length
);
/**
Program parent bridge's attribute recurrently.
@param PciIoDevice Child Pci device instance
@param Operation The operation to perform on the attributes for this PCI controller.
@param Attributes The mask of attributes that are used for Set, Enable, and Disable
operations.
@retval EFI_SUCCESS The operation on the PCI controller's attributes was completed.
@retval EFI_INVALID_PARAMETER One or more parameters are invalid.
@retval EFI_UNSUPPORTED one or more of the bits set in
Attributes are not supported by this PCI controller or one of
its parent bridges when Operation is Set, Enable or Disable.
**/
EFI_STATUS
UpStreamBridgesAttributes (
IN PCI_IO_DEVICE *PciIoDevice,
IN EFI_PCI_IO_PROTOCOL_ATTRIBUTE_OPERATION Operation,
IN UINT64 Attributes
);
/**
Test whether two Pci devices has same parent bridge.
@param PciDevice1 The first pci device for testing.
@param PciDevice2 The second pci device for testing.
@retval TRUE Two Pci device has the same parent bridge.
@retval FALSE Two Pci device has not the same parent bridge.
**/
BOOLEAN
PciDevicesOnTheSamePath (
IN PCI_IO_DEVICE *PciDevice1,
IN PCI_IO_DEVICE *PciDevice2
);
#endif

1359
IntelFrameworkModulePkg/Bus/Pci/PciBusDxe/PciLib.c

File diff suppressed because it is too large Load Diff

144
IntelFrameworkModulePkg/Bus/Pci/PciBusDxe/PciLib.h

@ -1,144 +0,0 @@
/** @file
Internal library declaration for PCI Bus module.
Copyright (c) 2006 - 2009, Intel Corporation
All rights reserved. This program and the accompanying materials
are licensed and made available under the terms and conditions of the BSD License
which accompanies this distribution. The full text of the license may be found at
http://opensource.org/licenses/bsd-license.php
THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
**/
#ifndef _EFI_PCI_LIB_H_
#define _EFI_PCI_LIB_H_
typedef struct {
EFI_HANDLE Handle;
} EFI_DEVICE_HANDLE_EXTENDED_DATA_PAYLOAD;
typedef struct {
UINT32 Bar;
UINT16 DevicePathSize;
UINT16 ReqResSize;
UINT16 AllocResSize;
UINT8 *DevicePath;
UINT8 *ReqRes;
UINT8 *AllocRes;
} EFI_RESOURCE_ALLOC_FAILURE_ERROR_DATA_PAYLOAD;
/**
Retrieve the PCI Card device BAR information via PciIo interface.
@param PciIoDevice PCI Card device instance.
**/
VOID
GetBackPcCardBar (
IN PCI_IO_DEVICE *PciIoDevice
);
/**
Remove rejected pci device from specific root bridge
handle.
@param RootBridgeHandle Specific parent root bridge handle.
@param Bridge Bridge device instance.
**/
VOID
RemoveRejectedPciDevices (
IN EFI_HANDLE RootBridgeHandle,
IN PCI_IO_DEVICE *Bridge
);
/**
Submits the I/O and memory resource requirements for the specified PCI Host Bridge.
@param PciResAlloc Point to protocol instance of EFI_PCI_HOST_BRIDGE_RESOURCE_ALLOCATION_PROTOCOL.
@retval EFI_SUCCESS Successfully finished resource allocation.
@retval EFI_NOT_FOUND Cannot get root bridge instance.
@retval EFI_OUT_OF_RESOURCES Platform failed to program the resources if no hot plug supported.
@retval other Some error occurred when allocating resources for the PCI Host Bridge.
@note Feature flag PcdPciBusHotplugDeviceSupport determine whether need support hotplug.
**/
EFI_STATUS
PciHostBridgeResourceAllocator (
IN EFI_PCI_HOST_BRIDGE_RESOURCE_ALLOCATION_PROTOCOL *PciResAlloc
);
/**
Scan pci bus and assign bus number to the given PCI bus system.
@param Bridge Bridge device instance.
@param StartBusNumber start point.
@param SubBusNumber Point to sub bus number.
@param PaddedBusRange Customized bus number.
@retval EFI_SUCCESS Successfully scanned and assigned bus number.
@retval other Some error occurred when scanning pci bus.
@note Feature flag PcdPciBusHotplugDeviceSupport determine whether need support hotplug.
**/
EFI_STATUS
PciScanBus (
IN PCI_IO_DEVICE *Bridge,
IN UINT8 StartBusNumber,
OUT UINT8 *SubBusNumber,
OUT UINT8 *PaddedBusRange
);
/**
Process Option Rom on the specified root bridge.
@param Bridge Pci root bridge device instance.
@retval EFI_SUCCESS Success process.
@retval other Some error occurred when processing Option Rom on the root bridge.
**/
EFI_STATUS
PciRootBridgeP2CProcess (
IN PCI_IO_DEVICE *Bridge
);
/**
Process Option Rom on the specified host bridge.
@param PciResAlloc Pointer to instance of EFI_PCI_HOST_BRIDGE_RESOURCE_ALLOCATION_PROTOCOL.
@retval EFI_SUCCESS Success process.
@retval EFI_NOT_FOUND Can not find the root bridge instance.
@retval other Some error occurred when processing Option Rom on the host bridge.
**/
EFI_STATUS
PciHostBridgeP2CProcess (
IN EFI_PCI_HOST_BRIDGE_RESOURCE_ALLOCATION_PROTOCOL *PciResAlloc
);
/**
This function is used to enumerate the entire host bridge
in a given platform.
@param PciResAlloc A pointer to the PCI Host Resource Allocation protocol.
@retval EFI_SUCCESS Successfully enumerated the host bridge.
@retval EFI_OUT_OF_RESOURCES No enough memory available.
@retval other Some error occurred when enumerating the host bridge.
**/
EFI_STATUS
PciHostBridgeEnumerator (
IN EFI_PCI_HOST_BRIDGE_RESOURCE_ALLOCATION_PROTOCOL *PciResAlloc
);
#endif

735
IntelFrameworkModulePkg/Bus/Pci/PciBusDxe/PciOptionRomSupport.c

@ -1,735 +0,0 @@
/** @file
PCI Rom supporting funtions implementation for PCI Bus module.
Copyright (c) 2006 - 2009, Intel Corporation
All rights reserved. This program and the accompanying materials
are licensed and made available under the terms and conditions of the BSD License
which accompanies this distribution. The full text of the license may be found at
http://opensource.org/licenses/bsd-license.php
THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
**/
#include "PciBus.h"
/**
Load the EFI Image from Option ROM
@param PciIoDevice PCI IO device instance.
@param FilePath The file path of the EFI Image
@param BufferSize On input the size of Buffer in bytes. On output with a return
code of EFI_SUCCESS, the amount of data transferred to Buffer.
On output with a return code of EFI_BUFFER_TOO_SMALL,
the size of Buffer required to retrieve the requested file.
@param Buffer The memory buffer to transfer the file to. If Buffer is NULL,
then no the size of the requested file is returned in BufferSize.
@retval EFI_SUCCESS The file was loaded.
@retval EFI_INVALID_PARAMETER FilePath is not a valid device path, or
BufferSize is NULL.
@retval EFI_NOT_FOUND Not found PCI Option Rom on PCI device.
@retval EFI_DEVICE_ERROR Failed to decompress PCI Option Rom image.
@retval EFI_BUFFER_TOO_SMALL The BufferSize is too small to read the current directory entry.
BufferSize has been updated with the size needed to complete the request.
**/
EFI_STATUS
LocalLoadFile2 (
IN PCI_IO_DEVICE *PciIoDevice,
IN EFI_DEVICE_PATH_PROTOCOL *FilePath,
IN OUT UINTN *BufferSize,
IN VOID *Buffer OPTIONAL
)
{
EFI_STATUS Status;
MEDIA_RELATIVE_OFFSET_RANGE_DEVICE_PATH *EfiOpRomImageNode;
EFI_PCI_EXPANSION_ROM_HEADER *EfiRomHeader;
PCI_DATA_STRUCTURE *Pcir;
UINT32 ImageSize;
UINT8 *ImageBuffer;
UINT32 ImageLength;
UINT32 DestinationSize;
UINT32 ScratchSize;
VOID *Scratch;
EFI_DECOMPRESS_PROTOCOL *Decompress;
EfiOpRomImageNode = (MEDIA_RELATIVE_OFFSET_RANGE_DEVICE_PATH *) FilePath;
if ((EfiOpRomImageNode == NULL) ||
(DevicePathType (FilePath) != MEDIA_DEVICE_PATH) ||
(DevicePathSubType (FilePath) != MEDIA_RELATIVE_OFFSET_RANGE_DP) ||
(DevicePathNodeLength (FilePath) != sizeof (MEDIA_RELATIVE_OFFSET_RANGE_DEVICE_PATH)) ||
(!IsDevicePathEnd (NextDevicePathNode (FilePath))) ||
(EfiOpRomImageNode->StartingOffset > EfiOpRomImageNode->EndingOffset) ||
(EfiOpRomImageNode->EndingOffset >= PciIoDevice->RomSize) ||
(BufferSize == NULL)
) {
return EFI_INVALID_PARAMETER;
}
EfiRomHeader = (EFI_PCI_EXPANSION_ROM_HEADER *) (
(UINT8 *) PciIoDevice->PciIo.RomImage + EfiOpRomImageNode->StartingOffset
);
if (EfiRomHeader->Signature != PCI_EXPANSION_ROM_HEADER_SIGNATURE) {
return EFI_NOT_FOUND;
}
Pcir = (PCI_DATA_STRUCTURE *) ((UINT8 *) EfiRomHeader + EfiRomHeader->PcirOffset);
if ((Pcir->CodeType == PCI_CODE_TYPE_EFI_IMAGE) &&
(EfiRomHeader->EfiSignature == EFI_PCI_EXPANSION_ROM_HEADER_EFISIGNATURE) &&
((EfiRomHeader->EfiSubsystem == EFI_IMAGE_SUBSYSTEM_EFI_BOOT_SERVICE_DRIVER) ||
(EfiRomHeader->EfiSubsystem == EFI_IMAGE_SUBSYSTEM_EFI_RUNTIME_DRIVER)) &&
(EfiRomHeader->CompressionType <= EFI_PCI_EXPANSION_ROM_HEADER_COMPRESSED)
) {
ImageSize = (UINT32) EfiRomHeader->InitializationSize * 512;
ImageBuffer = (UINT8 *) EfiRomHeader + EfiRomHeader->EfiImageHeaderOffset;
ImageLength = ImageSize - EfiRomHeader->EfiImageHeaderOffset;
if (EfiRomHeader->CompressionType != EFI_PCI_EXPANSION_ROM_HEADER_COMPRESSED) {
//
// Uncompressed: Copy the EFI Image directly to user's buffer
//
if (Buffer == NULL || *BufferSize < ImageLength) {
*BufferSize = ImageLength;
return EFI_BUFFER_TOO_SMALL;
}
*BufferSize = ImageLength;
CopyMem (Buffer, ImageBuffer, ImageLength);
return EFI_SUCCESS;
} else {
//
// Compressed: Uncompress before copying
//
Status = gBS->LocateProtocol (&gEfiDecompressProtocolGuid, NULL, (VOID **) &Decompress);
if (EFI_ERROR (Status)) {
return EFI_DEVICE_ERROR;
}
Status = Decompress->GetInfo (
Decompress,
ImageBuffer,
ImageLength,
&DestinationSize,
&ScratchSize
);
if (EFI_ERROR (Status)) {
return EFI_DEVICE_ERROR;
}
if (Buffer == NULL || *BufferSize < DestinationSize) {
*BufferSize = DestinationSize;
return EFI_BUFFER_TOO_SMALL;
}
*BufferSize = DestinationSize;
Scratch = AllocatePool (ScratchSize);
if (Scratch == NULL) {
return EFI_DEVICE_ERROR;
}
Status = Decompress->Decompress (
Decompress,
ImageBuffer,
ImageLength,
Buffer,
DestinationSize,
Scratch,
ScratchSize
);
FreePool (Scratch);
if (EFI_ERROR (Status)) {
return EFI_DEVICE_ERROR;
}
return EFI_SUCCESS;
}
}
return EFI_NOT_FOUND;
}
/**
Initialize a PCI LoadFile2 instance.
@param PciIoDevice PCI IO Device.
**/
VOID
InitializePciLoadFile2 (
IN PCI_IO_DEVICE *PciIoDevice
)
{
PciIoDevice->LoadFile2.LoadFile = LoadFile2;
}
/**
Causes the driver to load a specified file.
@param This Indicates a pointer to the calling context.
@param FilePath The device specific path of the file to load.
@param BootPolicy Should always be FALSE.
@param BufferSize On input the size of Buffer in bytes. On output with a return
code of EFI_SUCCESS, the amount of data transferred to Buffer.
On output with a return code of EFI_BUFFER_TOO_SMALL,
the size of Buffer required to retrieve the requested file.
@param Buffer The memory buffer to transfer the file to. If Buffer is NULL,
then no the size of the requested file is returned in BufferSize.
@retval EFI_SUCCESS The file was loaded.
@retval EFI_UNSUPPORTED BootPolicy is TRUE.
@retval EFI_INVALID_PARAMETER FilePath is not a valid device path, or
BufferSize is NULL.
@retval EFI_NOT_FOUND Not found PCI Option Rom on PCI device.
@retval EFI_DEVICE_ERROR Failed to decompress PCI Option Rom image.
@retval EFI_BUFFER_TOO_SMALL The BufferSize is too small to read the current directory entry.
BufferSize has been updated with the size needed to complete the request.
**/
EFI_STATUS
EFIAPI
LoadFile2 (
IN EFI_LOAD_FILE2_PROTOCOL *This,
IN EFI_DEVICE_PATH_PROTOCOL *FilePath,
IN BOOLEAN BootPolicy,
IN OUT UINTN *BufferSize,
IN VOID *Buffer OPTIONAL
)
{
PCI_IO_DEVICE *PciIoDevice;
if (BootPolicy) {
return EFI_UNSUPPORTED;
}
PciIoDevice = PCI_IO_DEVICE_FROM_LOAD_FILE2_THIS (This);
return LocalLoadFile2 (
PciIoDevice,
FilePath,
BufferSize,
Buffer
);
}
/**
Get Pci device's oprom information.
@param PciIoDevice Input Pci device instance.
Output Pci device instance with updated OptionRom size.
@retval EFI_NOT_FOUND Pci device has not Option Rom.
@retval EFI_SUCCESS Pci device has Option Rom.
**/
EFI_STATUS
GetOpRomInfo (
IN OUT PCI_IO_DEVICE *PciIoDevice
)
{
UINT8 RomBarIndex;
UINT32 AllOnes;
UINT64 Address;
EFI_STATUS Status;
UINT8 Bus;
UINT8 Device;
UINT8 Function;
EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL *PciRootBridgeIo;
Bus = PciIoDevice->BusNumber;
Device = PciIoDevice->DeviceNumber;
Function = PciIoDevice->FunctionNumber;
PciRootBridgeIo = PciIoDevice->PciRootBridgeIo;
//
// Offset is 0x30 if is not ppb
//
//
// 0x30
//
RomBarIndex = PCI_EXPANSION_ROM_BASE;
if (IS_PCI_BRIDGE (&PciIoDevice->Pci)) {
//
// If is ppb, 0x38
//
RomBarIndex = PCI_BRIDGE_ROMBAR;
}
//
// The bit0 is 0 to prevent the enabling of the Rom address decoder
//
AllOnes = 0xfffffffe;
Address = EFI_PCI_ADDRESS (Bus, Device, Function, RomBarIndex);
Status = PciRootBridgeIo->Pci.Write (
PciRootBridgeIo,
EfiPciWidthUint32,
Address,
1,
&AllOnes
);
if (EFI_ERROR (Status)) {
return EFI_NOT_FOUND;
}
//
// Read back
//
Status = PciRootBridgeIo->Pci.Read(
PciRootBridgeIo,
EfiPciWidthUint32,
Address,
1,
&AllOnes
);
if (EFI_ERROR (Status)) {
return EFI_NOT_FOUND;
}
//
// Bits [1, 10] are reserved
//
AllOnes &= 0xFFFFF800;
if ((AllOnes == 0) || (AllOnes == 0xFFFFF800)) {
return EFI_NOT_FOUND;
}
PciIoDevice->RomSize = (UINT64) ((~AllOnes) + 1);
return EFI_SUCCESS;
}
/**
Check if the RomImage contains EFI Images.
@param RomImage The ROM address of Image for check.
@param RomSize Size of ROM for check.
@retval TRUE ROM contain EFI Image.
@retval FALSE ROM not contain EFI Image.
**/
BOOLEAN
ContainEfiImage (
IN VOID *RomImage,
IN UINT64 RomSize
)
{
PCI_EXPANSION_ROM_HEADER *RomHeader;
PCI_DATA_STRUCTURE *RomPcir;
BOOLEAN FirstCheck;
FirstCheck = TRUE;
RomHeader = RomImage;
while ((UINT8 *) RomHeader < (UINT8 *) RomImage + RomSize) {
if (RomHeader->Signature != PCI_EXPANSION_ROM_HEADER_SIGNATURE) {
if (FirstCheck) {
return FALSE;
} else {
RomHeader = (PCI_EXPANSION_ROM_HEADER *) ((UINT8 *) RomHeader + 512);
continue;
}
}
FirstCheck = FALSE;
RomPcir = (PCI_DATA_STRUCTURE *) ((UINT8 *) RomHeader + RomHeader->PcirOffset);
if (RomPcir->CodeType == PCI_CODE_TYPE_EFI_IMAGE) {
return TRUE;
}
RomHeader = (PCI_EXPANSION_ROM_HEADER *) ((UINT8 *) RomHeader + RomPcir->Length * 512);
}
return FALSE;
}
/**
Load Option Rom image for specified PCI device.
@param PciDevice Pci device instance.
@param RomBase Base address of Option Rom.
@retval EFI_OUT_OF_RESOURCES No enough memory to hold image.
@retval EFI_SUCESS Successfully loaded Option Rom.
**/
EFI_STATUS
LoadOpRomImage (
IN PCI_IO_DEVICE *PciDevice,
IN UINT64 RomBase
)
{
UINT8 RomBarIndex;
UINT8 Indicator;
UINT16 OffsetPcir;
UINT32 RomBarOffset;
UINT32 RomBar;
EFI_STATUS RetStatus;
BOOLEAN FirstCheck;
UINT8 *Image;
PCI_EXPANSION_ROM_HEADER *RomHeader;
PCI_DATA_STRUCTURE *RomPcir;
UINT64 RomSize;
UINT64 RomImageSize;
UINT8 *RomInMemory;
UINT8 CodeType;
RomSize = PciDevice->RomSize;
Indicator = 0;
RomImageSize = 0;
RomInMemory = NULL;
CodeType = 0xFF;
//
// Get the RomBarIndex
//
//
// 0x30
//
RomBarIndex = PCI_EXPANSION_ROM_BASE;
if (IS_PCI_BRIDGE (&(PciDevice->Pci))) {
//
// if is ppb
//
//
// 0x38
//
RomBarIndex = PCI_BRIDGE_ROMBAR;
}
//
// Allocate memory for Rom header and PCIR
//
RomHeader = AllocatePool (sizeof (PCI_EXPANSION_ROM_HEADER));
if (RomHeader == NULL) {
return EFI_OUT_OF_RESOURCES;
}
RomPcir = AllocatePool (sizeof (PCI_DATA_STRUCTURE));
if (RomPcir == NULL) {
FreePool (RomHeader);
return EFI_OUT_OF_RESOURCES;
}
RomBar = (UINT32) RomBase;
//
// Enable RomBar
//
RomDecode (PciDevice, RomBarIndex, RomBar, TRUE);
RomBarOffset = RomBar;
RetStatus = EFI_NOT_FOUND;
FirstCheck = TRUE;
do {
PciDevice->PciRootBridgeIo->Mem.Read (
PciDevice->PciRootBridgeIo,
EfiPciWidthUint8,
RomBarOffset,
sizeof (PCI_EXPANSION_ROM_HEADER),
(UINT8 *) RomHeader
);
if (RomHeader->Signature != PCI_EXPANSION_ROM_HEADER_SIGNATURE) {
RomBarOffset = RomBarOffset + 512;
if (FirstCheck) {
break;
} else {
RomImageSize = RomImageSize + 512;
continue;
}
}
FirstCheck = FALSE;
OffsetPcir = RomHeader->PcirOffset;
PciDevice->PciRootBridgeIo->Mem.Read (
PciDevice->PciRootBridgeIo,
EfiPciWidthUint8,
RomBarOffset + OffsetPcir,
sizeof (PCI_DATA_STRUCTURE),
(UINT8 *) RomPcir
);
if (RomPcir->CodeType == PCI_CODE_TYPE_PCAT_IMAGE) {
CodeType = PCI_CODE_TYPE_PCAT_IMAGE;
}
Indicator = RomPcir->Indicator;
RomImageSize = RomImageSize + RomPcir->ImageLength * 512;
RomBarOffset = RomBarOffset + RomPcir->ImageLength * 512;
} while (((Indicator & 0x80) == 0x00) && ((RomBarOffset - RomBar) < RomSize));
//
// Some Legacy Cards do not report the correct ImageLength so used the maximum
// of the legacy length and the PCIR Image Length
//
if (CodeType == PCI_CODE_TYPE_PCAT_IMAGE) {
RomImageSize = MAX(RomImageSize, (((EFI_LEGACY_EXPANSION_ROM_HEADER *)RomHeader)->Size512 * 512));
}
if (RomImageSize > 0) {
RetStatus = EFI_SUCCESS;
Image = AllocatePool ((UINT32) RomImageSize);
if (Image == NULL) {
RomDecode (PciDevice, RomBarIndex, RomBar, FALSE);
FreePool (RomHeader);
FreePool (RomPcir);
return EFI_OUT_OF_RESOURCES;
}
//
// Copy Rom image into memory
//
PciDevice->PciRootBridgeIo->Mem.Read (
PciDevice->PciRootBridgeIo,
EfiPciWidthUint8,
RomBar,
(UINT32) RomImageSize,
Image
);
RomInMemory = Image;
}
RomDecode (PciDevice, RomBarIndex, RomBar, FALSE);
PciDevice->PciIo.RomSize = RomImageSize;
PciDevice->PciIo.RomImage = RomInMemory;
//
// For OpROM read from PCI device:
// Add the Rom Image to internal database for later PCI light enumeration
//
PciRomAddImageMapping (
NULL,
PciDevice->PciRootBridgeIo->SegmentNumber,
PciDevice->BusNumber,
PciDevice->DeviceNumber,
PciDevice->FunctionNumber,
(UINT64) (UINTN) PciDevice->PciIo.RomImage,
PciDevice->PciIo.RomSize
);
//
// Free allocated memory
//
FreePool (RomHeader);
FreePool (RomPcir);
return RetStatus;
}
/**
Enable/Disable Option Rom decode.
@param PciDevice Pci device instance.
@param RomBarIndex The BAR index of the standard PCI Configuration header to use as the
base address for resource range. The legal range for this field is 0..5.
@param RomBar Base address of Option Rom.
@param Enable Flag for enable/disable decode.
**/
VOID
RomDecode (
IN PCI_IO_DEVICE *PciDevice,
IN UINT8 RomBarIndex,
IN UINT32 RomBar,
IN BOOLEAN Enable
)
{
UINT32 Value32;
UINT32 Offset;
EFI_PCI_IO_PROTOCOL *PciIo;
PciIo = &PciDevice->PciIo;
if (Enable) {
//
// Clear all bars
//
for (Offset = 0x10; Offset <= 0x24; Offset += sizeof (UINT32)) {
PciIo->Pci.Write (PciIo, EfiPciIoWidthUint32, Offset, 1, &gAllZero);
}
//
// set the Rom base address: now is hardcode
// enable its decoder
//
Value32 = RomBar | 0x1;
PciIo->Pci.Write (
PciIo,
(EFI_PCI_IO_PROTOCOL_WIDTH) EfiPciWidthUint32,
RomBarIndex,
1,
&Value32
);
//
// Programe all upstream bridge
//
ProgrameUpstreamBridgeForRom(PciDevice, RomBar, TRUE);
//
// Setting the memory space bit in the function's command register
//
PCI_ENABLE_COMMAND_REGISTER(PciDevice, EFI_PCI_COMMAND_MEMORY_SPACE);
} else {
//
// disable command register decode to memory
//
PCI_DISABLE_COMMAND_REGISTER(PciDevice, EFI_PCI_COMMAND_MEMORY_SPACE);
//
// Destroy the programmed bar in all the upstream bridge.
//
ProgrameUpstreamBridgeForRom(PciDevice, RomBar, FALSE);
//
// disable rom decode
//
Value32 = 0xFFFFFFFE;
PciIo->Pci.Write (
PciIo,
(EFI_PCI_IO_PROTOCOL_WIDTH) EfiPciWidthUint32,
RomBarIndex,
1,
&Value32
);
}
}
/**
Load and start the Option Rom image.
@param PciDevice Pci device instance.
@retval EFI_SUCCESS Successfully loaded and started PCI Option Rom image.
@retval EFI_NOT_FOUND Failed to process PCI Option Rom image.
**/
EFI_STATUS
ProcessOpRomImage (
IN PCI_IO_DEVICE *PciDevice
)
{
UINT8 Indicator;
UINT32 ImageSize;
VOID *RomBar;
UINT8 *RomBarOffset;
EFI_HANDLE ImageHandle;
EFI_STATUS Status;
EFI_STATUS RetStatus;
BOOLEAN FirstCheck;
EFI_PCI_EXPANSION_ROM_HEADER *EfiRomHeader;
PCI_DATA_STRUCTURE *Pcir;
EFI_DEVICE_PATH_PROTOCOL *PciOptionRomImageDevicePath;
MEDIA_RELATIVE_OFFSET_RANGE_DEVICE_PATH EfiOpRomImageNode;
VOID *Buffer;
UINTN BufferSize;
Indicator = 0;
//
// Get the Address of the Option Rom image
//
RomBar = PciDevice->PciIo.RomImage;
RomBarOffset = (UINT8 *) RomBar;
RetStatus = EFI_NOT_FOUND;
FirstCheck = TRUE;
do {
EfiRomHeader = (EFI_PCI_EXPANSION_ROM_HEADER *) RomBarOffset;
if (EfiRomHeader->Signature != PCI_EXPANSION_ROM_HEADER_SIGNATURE) {
RomBarOffset += 512;
if (FirstCheck) {
break;
} else {
continue;
}
}
FirstCheck = FALSE;
Pcir = (PCI_DATA_STRUCTURE *) (RomBarOffset + EfiRomHeader->PcirOffset);
ImageSize = (UINT32) (Pcir->ImageLength * 512);
Indicator = Pcir->Indicator;
//
// Create Pci Option Rom Image device path header
//
EfiOpRomImageNode.Header.Type = MEDIA_DEVICE_PATH;
EfiOpRomImageNode.Header.SubType = MEDIA_RELATIVE_OFFSET_RANGE_DP;
SetDevicePathNodeLength (&EfiOpRomImageNode.Header, sizeof (EfiOpRomImageNode));
EfiOpRomImageNode.StartingOffset = (UINTN) RomBarOffset - (UINTN) RomBar;
EfiOpRomImageNode.EndingOffset = (UINTN) RomBarOffset + ImageSize - 1 - (UINTN) RomBar;
PciOptionRomImageDevicePath = AppendDevicePathNode (PciDevice->DevicePath, &EfiOpRomImageNode.Header);
ASSERT (PciOptionRomImageDevicePath != NULL);
//
// load image and start image
//
BufferSize = 0;
Buffer = NULL;
Status = EFI_SUCCESS;
ImageHandle = NULL;
if (!EFI_ERROR (Status)) {
Status = gBS->LoadImage (
FALSE,
gPciBusDriverBinding.DriverBindingHandle,
PciOptionRomImageDevicePath,
Buffer,
BufferSize,
&ImageHandle
);
}
//
// load image and start image
//
if (!EFI_ERROR (Status)) {
Status = gBS->LoadImage (
FALSE,
gPciBusDriverBinding.DriverBindingHandle,
PciOptionRomImageDevicePath,
Buffer,
BufferSize,
&ImageHandle
);
}
FreePool (PciOptionRomImageDevicePath);
if (!EFI_ERROR (Status)) {
Status = gBS->StartImage (ImageHandle, NULL, NULL);
if (!EFI_ERROR (Status)) {
AddDriver (PciDevice, ImageHandle);
PciRomAddImageMapping (
ImageHandle,
PciDevice->PciRootBridgeIo->SegmentNumber,
PciDevice->BusNumber,
PciDevice->DeviceNumber,
PciDevice->FunctionNumber,
(UINT64) (UINTN) PciDevice->PciIo.RomImage,
PciDevice->PciIo.RomSize
);
RetStatus = EFI_SUCCESS;
}
}
RomBarOffset += ImageSize;
} while (((Indicator & 0x80) == 0x00) && ((UINTN) (RomBarOffset - (UINT8 *) RomBar) < PciDevice->RomSize));
return RetStatus;
}

143
IntelFrameworkModulePkg/Bus/Pci/PciBusDxe/PciOptionRomSupport.h

@ -1,143 +0,0 @@
/** @file
PCI Rom supporting funtions declaration for PCI Bus module.
Copyright (c) 2006 - 2009, Intel Corporation
All rights reserved. This program and the accompanying materials
are licensed and made available under the terms and conditions of the BSD License
which accompanies this distribution. The full text of the license may be found at
http://opensource.org/licenses/bsd-license.php
THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
**/
#ifndef _EFI_PCI_OPTION_ROM_SUPPORT_H_
#define _EFI_PCI_OPTION_ROM_SUPPORT_H_
/**
Initialize a PCI LoadFile2 instance.
@param PciIoDevice PCI IO Device.
**/
VOID
InitializePciLoadFile2 (
IN PCI_IO_DEVICE *PciIoDevice
);
/**
Causes the driver to load a specified file.
@param This Indicates a pointer to the calling context.
@param FilePath The device specific path of the file to load.
@param BootPolicy Should always be FALSE.
@param BufferSize On input the size of Buffer in bytes. On output with a return
code of EFI_SUCCESS, the amount of data transferred to Buffer.
On output with a return code of EFI_BUFFER_TOO_SMALL,
the size of Buffer required to retrieve the requested file.
@param Buffer The memory buffer to transfer the file to. If Buffer is NULL,
then no the size of the requested file is returned in BufferSize.
@retval EFI_SUCCESS The file was loaded.
@retval EFI_UNSUPPORTED BootPolicy is TRUE.
@retval EFI_INVALID_PARAMETER FilePath is not a valid device path, or
BufferSize is NULL.
@retval EFI_NOT_FOUND Not found PCI Option Rom on PCI device.
@retval EFI_DEVICE_ERROR Failed to decompress PCI Option Rom image.
@retval EFI_BUFFER_TOO_SMALL The BufferSize is too small to read the current directory entry.
BufferSize has been updated with the size needed to complete the request.
**/
EFI_STATUS
EFIAPI
LoadFile2 (
IN EFI_LOAD_FILE2_PROTOCOL *This,
IN EFI_DEVICE_PATH_PROTOCOL *FilePath,
IN BOOLEAN BootPolicy,
IN OUT UINTN *BufferSize,
IN VOID *Buffer OPTIONAL
);
/**
Check if the RomImage contains EFI Images.
@param RomImage The ROM address of Image for check.
@param RomSize Size of ROM for check.
@retval TRUE ROM contain EFI Image.
@retval FALSE ROM not contain EFI Image.
**/
BOOLEAN
ContainEfiImage (
IN VOID *RomImage,
IN UINT64 RomSize
);
/**
Get Pci device's oprom information.
@param PciIoDevice Input Pci device instance.
Output Pci device instance with updated OptionRom size.
@retval EFI_NOT_FOUND Pci device has not Option Rom.
@retval EFI_SUCCESS Pci device has Option Rom.
**/
EFI_STATUS
GetOpRomInfo (
IN OUT PCI_IO_DEVICE *PciIoDevice
);
/**
Load Option Rom image for specified PCI device.
@param PciDevice Pci device instance.
@param RomBase Base address of Option Rom.
@retval EFI_OUT_OF_RESOURCES No enough memory to hold image.
@retval EFI_SUCESS Successfully loaded Option Rom.
**/
EFI_STATUS
LoadOpRomImage (
IN PCI_IO_DEVICE *PciDevice,
IN UINT64 RomBase
);
/**
Enable/Disable Option Rom decode.
@param PciDevice Pci device instance.
@param RomBarIndex The BAR index of the standard PCI Configuration header to use as the
base address for resource range. The legal range for this field is 0..5.
@param RomBar Base address of Option Rom.
@param Enable Flag for enable/disable decode.
**/
VOID
RomDecode (
IN PCI_IO_DEVICE *PciDevice,
IN UINT8 RomBarIndex,
IN UINT32 RomBar,
IN BOOLEAN Enable
);
/**
Load and start the Option Rom image.
@param PciDevice Pci device instance.
@retval EFI_SUCCESS Successfully loaded and started PCI Option Rom image.
@retval EFI_NOT_FOUND Failed to process PCI Option Rom image.
**/
EFI_STATUS
ProcessOpRomImage (
IN PCI_IO_DEVICE *PciDevice
);
#endif

68
IntelFrameworkModulePkg/Bus/Pci/PciBusDxe/PciPowerManagement.c

@ -1,68 +0,0 @@
/** @file
Power management support fucntions implementation for PCI Bus module.
Copyright (c) 2006 - 2009, Intel Corporation
All rights reserved. This program and the accompanying materials
are licensed and made available under the terms and conditions of the BSD License
which accompanies this distribution. The full text of the license may be found at
http://opensource.org/licenses/bsd-license.php
THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
**/
#include "PciBus.h"
/**
This function is intended to turn off PWE assertion and
put the device to D0 state if the device supports
PCI Power Management.
@param PciIoDevice PCI device instance.
@retval EFI_UNSUPPORTED PCI Device does not support power management.
@retval EFI_SUCCESS Turned off PWE successfully.
**/
EFI_STATUS
ResetPowerManagementFeature (
IN PCI_IO_DEVICE *PciIoDevice
)
{
EFI_STATUS Status;
UINT8 PowerManagementRegBlock;
UINT16 PowerManagementCSR;
PowerManagementRegBlock = 0;
Status = LocateCapabilityRegBlock (
PciIoDevice,
EFI_PCI_CAPABILITY_ID_PMI,
&PowerManagementRegBlock,
NULL
);
if (EFI_ERROR (Status)) {
return EFI_UNSUPPORTED;
}
//
// Turn off the PWE assertion and put the device into D0 State
//
PowerManagementCSR = 0x8000;
//
// Write PMCSR
//
PciIoDevice->PciIo.Pci.Write (
&PciIoDevice->PciIo,
EfiPciIoWidthUint16,
PowerManagementRegBlock + 4,
1,
&PowerManagementCSR
);
return EFI_SUCCESS;
}

34
IntelFrameworkModulePkg/Bus/Pci/PciBusDxe/PciPowerManagement.h

@ -1,34 +0,0 @@
/** @file
Power management support fucntions delaration for PCI Bus module.
Copyright (c) 2006 - 2009, Intel Corporation
All rights reserved. This program and the accompanying materials
are licensed and made available under the terms and conditions of the BSD License
which accompanies this distribution. The full text of the license may be found at
http://opensource.org/licenses/bsd-license.php
THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
**/
#ifndef _EFI_PCI_POWER_MANAGEMENT_H_
#define _EFI_PCI_POWER_MANAGEMENT_H_
/**
This function is intended to turn off PWE assertion and
put the device to D0 state if the device supports
PCI Power Management.
@param PciIoDevice PCI device instance.
@retval EFI_UNSUPPORTED PCI Device does not support power management.
@retval EFI_SUCCESS Turned off PWE successfully.
**/
EFI_STATUS
ResetPowerManagementFeature (
IN PCI_IO_DEVICE *PciIoDevice
);
#endif

2331
IntelFrameworkModulePkg/Bus/Pci/PciBusDxe/PciResourceSupport.c

File diff suppressed because it is too large Load Diff

492
IntelFrameworkModulePkg/Bus/Pci/PciBusDxe/PciResourceSupport.h

@ -1,492 +0,0 @@
/** @file
PCI resouces support functions declaration for PCI Bus module.
Copyright (c) 2006 - 2009, Intel Corporation
All rights reserved. This program and the accompanying materials
are licensed and made available under the terms and conditions of the BSD License
which accompanies this distribution. The full text of the license may be found at
http://opensource.org/licenses/bsd-license.php
THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
**/
#ifndef _EFI_PCI_RESOURCE_SUPPORT_H_
#define _EFI_PCI_RESOURCE_SUPPORT_H_
typedef enum {
PciResUsageTypical = 0,
PciResUsagePadding,
PciResUsageOptionRomProcessing
} PCI_RESOURCE_USAGE;
#define PCI_RESOURCE_SIGNATURE SIGNATURE_32 ('p', 'c', 'r', 'c')
typedef struct {
UINT32 Signature;
LIST_ENTRY Link;
LIST_ENTRY ChildList;
PCI_IO_DEVICE *PciDev;
UINT64 Alignment;
UINT64 Offset;
UINT8 Bar;
PCI_BAR_TYPE ResType;
UINT64 Length;
BOOLEAN Reserved;
PCI_RESOURCE_USAGE ResourceUsage;
BOOLEAN Virtual;
} PCI_RESOURCE_NODE;
#define RESOURCE_NODE_FROM_LINK(a) \
CR (a, PCI_RESOURCE_NODE, Link, PCI_RESOURCE_SIGNATURE)
/**
The function is used to skip VGA range.
@param Start Returned start address including VGA range.
@param Length The length of VGA range.
**/
VOID
SkipVGAAperture (
OUT UINT64 *Start,
IN UINT64 Length
);
/**
This function is used to skip ISA aliasing aperture.
@param Start Returned start address including ISA aliasing aperture.
@param Length The length of ISA aliasing aperture.
**/
VOID
SkipIsaAliasAperture (
OUT UINT64 *Start,
IN UINT64 Length
);
/**
This function inserts a resource node into the resource list.
The resource list is sorted in descend order.
@param Bridge PCI resource node for bridge.
@param ResNode Resource node want to be inserted.
**/
VOID
InsertResourceNode (
IN OUT PCI_RESOURCE_NODE *Bridge,
IN PCI_RESOURCE_NODE *ResNode
);
/**
This routine is used to merge two different resource trees in need of
resoure degradation.
For example, if an upstream PPB doesn't support,
prefetchable memory decoding, the PCI bus driver will choose to call this function
to merge prefectchable memory resource list into normal memory list.
If the TypeMerge is TRUE, Res resource type is changed to the type of destination resource
type.
If Dst is NULL or Res is NULL, ASSERT ().
@param Dst Point to destination resource tree.
@param Res Point to source resource tree.
@param TypeMerge If the TypeMerge is TRUE, Res resource type is changed to the type of
destination resource type.
**/
VOID
MergeResourceTree (
IN PCI_RESOURCE_NODE *Dst,
IN PCI_RESOURCE_NODE *Res,
IN BOOLEAN TypeMerge
);
/**
This function is used to calculate the IO16 aperture
for a bridge.
@param Bridge PCI resource node for bridge.
**/
VOID
CalculateApertureIo16 (
IN PCI_RESOURCE_NODE *Bridge
);
/**
This function is used to calculate the resource aperture
for a given bridge device.
@param Bridge PCI resouce node for given bridge device.
**/
VOID
CalculateResourceAperture (
IN PCI_RESOURCE_NODE *Bridge
);
/**
Get IO/Memory resource infor for given PCI device.
@param PciDev Pci device instance.
@param IoNode Resource info node for IO .
@param Mem32Node Resource info node for 32-bit memory.
@param PMem32Node Resource info node for 32-bit Prefetchable Memory.
@param Mem64Node Resource info node for 64-bit memory.
@param PMem64Node Resource info node for 64-bit Prefetchable Memory.
**/
VOID
GetResourceFromDevice (
IN PCI_IO_DEVICE *PciDev,
IN OUT PCI_RESOURCE_NODE *IoNode,
IN OUT PCI_RESOURCE_NODE *Mem32Node,
IN OUT PCI_RESOURCE_NODE *PMem32Node,
IN OUT PCI_RESOURCE_NODE *Mem64Node,
IN OUT PCI_RESOURCE_NODE *PMem64Node
);
/**
This function is used to create a resource node.
@param PciDev Pci device instance.
@param Length Length of Io/Memory resource.
@param Alignment Alignment of resource.
@param Bar Bar index.
@param ResType Type of resource: IO/Memory.
@param ResUsage Resource usage.
@return PCI resource node created for given PCI device.
NULL means PCI resource node is not created.
**/
PCI_RESOURCE_NODE *
CreateResourceNode (
IN PCI_IO_DEVICE *PciDev,
IN UINT64 Length,
IN UINT64 Alignment,
IN UINT8 Bar,
IN PCI_BAR_TYPE ResType,
IN PCI_RESOURCE_USAGE ResUsage
);
/**
This function is used to extract resource request from
IOV VF device node list.
@param Bridge Pci device instance.
@param IoNode Resource info node for IO.
@param Mem32Node Resource info node for 32-bit memory.
@param PMem32Node Resource info node for 32-bit Prefetchable Memory.
@param Mem64Node Resource info node for 64-bit memory.
@param PMem64Node Resource info node for 64-bit Prefetchable Memory.
**/
PCI_RESOURCE_NODE *
CreateVfResourceNode (
IN PCI_IO_DEVICE *PciDev,
IN UINT64 Length,
IN UINT64 Alignment,
IN UINT8 Bar,
IN PCI_BAR_TYPE ResType,
IN PCI_RESOURCE_USAGE ResUsage
);
/**
This function is used to extract resource request from
device node list.
@param Bridge Pci device instance.
@param IoNode Resource info node for IO.
@param Mem32Node Resource info node for 32-bit memory.
@param PMem32Node Resource info node for 32-bit Prefetchable Memory.
@param Mem64Node Resource info node for 64-bit memory.
@param PMem64Node Resource info node for 64-bit Prefetchable Memory.
**/
VOID
CreateResourceMap (
IN PCI_IO_DEVICE *Bridge,
IN OUT PCI_RESOURCE_NODE *IoNode,
IN OUT PCI_RESOURCE_NODE *Mem32Node,
IN OUT PCI_RESOURCE_NODE *PMem32Node,
IN OUT PCI_RESOURCE_NODE *Mem64Node,
IN OUT PCI_RESOURCE_NODE *PMem64Node
);
/**
This function is used to do the resource padding for a specific platform.
@param PciDev Pci device instance.
@param IoNode Resource info node for IO.
@param Mem32Node Resource info node for 32-bit memory.
@param PMem32Node Resource info node for 32-bit Prefetchable Memory.
@param Mem64Node Resource info node for 64-bit memory.
@param PMem64Node Resource info node for 64-bit Prefetchable Memory.
**/
VOID
ResourcePaddingPolicy (
IN PCI_IO_DEVICE *PciDev,
IN PCI_RESOURCE_NODE *IoNode,
IN PCI_RESOURCE_NODE *Mem32Node,
IN PCI_RESOURCE_NODE *PMem32Node,
IN PCI_RESOURCE_NODE *Mem64Node,
IN PCI_RESOURCE_NODE *PMem64Node
);
/**
This function is used to degrade resource if the upstream bridge
doesn't support certain resource. Degradation path is
PMEM64 -> MEM64 -> MEM32
PMEM64 -> PMEM32 -> MEM32
IO32 -> IO16.
@param Bridge Pci device instance.
@param Mem32Node Resource info node for 32-bit memory.
@param PMem32Node Resource info node for 32-bit Prefetchable Memory.
@param Mem64Node Resource info node for 64-bit memory.
@param PMem64Node Resource info node for 64-bit Prefetchable Memory.
**/
VOID
DegradeResource (
IN PCI_IO_DEVICE *Bridge,
IN PCI_RESOURCE_NODE *Mem32Node,
IN PCI_RESOURCE_NODE *PMem32Node,
IN PCI_RESOURCE_NODE *Mem64Node,
IN PCI_RESOURCE_NODE *PMem64Node
);
/**
Test whether bridge device support decode resource.
@param Bridge Bridge device instance.
@param Decode Decode type according to resource type.
@return TRUE The bridge device support decode resource.
@return FALSE The bridge device don't support decode resource.
**/
BOOLEAN
BridgeSupportResourceDecode (
IN PCI_IO_DEVICE *Bridge,
IN UINT32 Decode
);
/**
This function is used to program the resource allocated
for each resource node under specified bridge.
@param Base Base address of resource to be progammed.
@param Bridge PCI resource node for the bridge device.
@retval EFI_SUCCESS Successfully to program all resouces
on given PCI bridge device.
@retval EFI_OUT_OF_RESOURCES Base is all one.
**/
EFI_STATUS
ProgramResource (
IN UINT64 Base,
IN PCI_RESOURCE_NODE *Bridge
);
/**
Program Bar register for PCI device.
@param Base Base address for PCI device resource to be progammed.
@param Node Point to resoure node structure.
**/
VOID
ProgramBar (
IN UINT64 Base,
IN PCI_RESOURCE_NODE *Node
);
/**
Program IOV VF Bar register for PCI device.
@param Base Base address for PCI device resource to be progammed.
@param Node Point to resoure node structure.
**/
EFI_STATUS
ProgramVfBar (
IN UINT64 Base,
IN PCI_RESOURCE_NODE *Node
);
/**
Program PCI-PCI bridge apperture.
@param Base Base address for resource.
@param Node Point to resoure node structure.
**/
VOID
ProgramPpbApperture (
IN UINT64 Base,
IN PCI_RESOURCE_NODE *Node
);
/**
Program parent bridge for Option Rom.
@param PciDevice Pci deivce instance.
@param OptionRomBase Base address for Optiona Rom.
@param Enable Enable or disable PCI memory.
**/
VOID
ProgrameUpstreamBridgeForRom (
IN PCI_IO_DEVICE *PciDevice,
IN UINT32 OptionRomBase,
IN BOOLEAN Enable
);
/**
Test whether resource exists for a bridge.
@param Bridge Point to resource node for a bridge.
@retval TRUE There is resource on the given bridge.
@retval FALSE There isn't resource on the given bridge.
**/
BOOLEAN
ResourceRequestExisted (
IN PCI_RESOURCE_NODE *Bridge
);
/**
Initialize resource pool structure.
@param ResourcePool Point to resource pool structure. This pool
is reset to all zero when returned.
@param ResourceType Type of resource.
**/
VOID
InitializeResourcePool (
IN OUT PCI_RESOURCE_NODE *ResourcePool,
IN PCI_BAR_TYPE ResourceType
);
/**
Get all resource information for given Pci device.
@param PciDev Pci device instance.
@param IoBridge Io resource node.
@param Mem32Bridge 32-bit memory node.
@param PMem32Bridge 32-bit Pmemory node.
@param Mem64Bridge 64-bit memory node.
@param PMem64Bridge 64-bit PMemory node.
@param IoPool Link list header for Io resource.
@param Mem32Pool Link list header for 32-bit memory.
@param PMem32Pool Link list header for 32-bit Prefetchable memory.
@param Mem64Pool Link list header for 64-bit memory.
@param PMem64Pool Link list header for 64-bit Prefetchable memory.
**/
VOID
GetResourceMap (
IN PCI_IO_DEVICE *PciDev,
IN PCI_RESOURCE_NODE **IoBridge,
IN PCI_RESOURCE_NODE **Mem32Bridge,
IN PCI_RESOURCE_NODE **PMem32Bridge,
IN PCI_RESOURCE_NODE **Mem64Bridge,
IN PCI_RESOURCE_NODE **PMem64Bridge,
IN PCI_RESOURCE_NODE *IoPool,
IN PCI_RESOURCE_NODE *Mem32Pool,
IN PCI_RESOURCE_NODE *PMem32Pool,
IN PCI_RESOURCE_NODE *Mem64Pool,
IN PCI_RESOURCE_NODE *PMem64Pool
);
/**
Destory given resource tree.
@param Bridge PCI resource root node of resource tree.
**/
VOID
DestroyResourceTree (
IN PCI_RESOURCE_NODE *Bridge
);
/**
Insert resource padding for P2C.
@param PciDev Pci device instance.
@param IoNode Resource info node for IO.
@param Mem32Node Resource info node for 32-bit memory.
@param PMem32Node Resource info node for 32-bit Prefetchable Memory.
@param Mem64Node Resource info node for 64-bit memory.
@param PMem64Node Resource info node for 64-bit Prefetchable Memory.
**/
VOID
ResourcePaddingForCardBusBridge (
IN PCI_IO_DEVICE *PciDev,
IN PCI_RESOURCE_NODE *IoNode,
IN PCI_RESOURCE_NODE *Mem32Node,
IN PCI_RESOURCE_NODE *PMem32Node,
IN PCI_RESOURCE_NODE *Mem64Node,
IN PCI_RESOURCE_NODE *PMem64Node
);
/**
Program PCI Card device register for given resource node.
@param Base Base address of PCI Card device to be programmed.
@param Node Given resource node.
**/
VOID
ProgramP2C (
IN UINT64 Base,
IN PCI_RESOURCE_NODE *Node
);
/**
Create padding resource node.
@param PciDev Pci device instance.
@param IoNode Resource info node for IO.
@param Mem32Node Resource info node for 32-bit memory.
@param PMem32Node Resource info node for 32-bit Prefetchable Memory.
@param Mem64Node Resource info node for 64-bit memory.
@param PMem64Node Resource info node for 64-bit Prefetchable Memory.
**/
VOID
ApplyResourcePadding (
IN PCI_IO_DEVICE *PciDev,
IN PCI_RESOURCE_NODE *IoNode,
IN PCI_RESOURCE_NODE *Mem32Node,
IN PCI_RESOURCE_NODE *PMem32Node,
IN PCI_RESOURCE_NODE *Mem64Node,
IN PCI_RESOURCE_NODE *PMem64Node
);
/**
Get padding resource for PCI-PCI bridge.
@param PciIoDevice PCI-PCI bridge device instance.
@note Feature flag PcdPciBusHotplugDeviceSupport determines
whether need to pad resource for them.
**/
VOID
GetResourcePaddingPpb (
IN PCI_IO_DEVICE *PciIoDevice
);
#endif

126
IntelFrameworkModulePkg/Bus/Pci/PciBusDxe/PciRomTable.c

@ -1,126 +0,0 @@
/** @file
Set up ROM Table for PCI Bus module.
Copyright (c) 2006 - 2009, Intel Corporation
All rights reserved. This program and the accompanying materials
are licensed and made available under the terms and conditions of the BSD License
which accompanies this distribution. The full text of the license may be found at
http://opensource.org/licenses/bsd-license.php
THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
**/
#include "PciBus.h"
//
// PCI ROM image information
//
typedef struct {
EFI_HANDLE ImageHandle;
UINTN Seg;
UINT8 Bus;
UINT8 Dev;
UINT8 Func;
UINT64 RomAddress;
UINT64 RomLength;
} EFI_PCI_ROM_IMAGE_MAPPING;
UINTN mNumberOfPciRomImages = 0;
UINTN mMaxNumberOfPciRomImages = 0;
EFI_PCI_ROM_IMAGE_MAPPING *mRomImageTable = NULL;
/**
Add the Rom Image to internal database for later PCI light enumeration.
@param ImageHandle Option Rom image handle.
@param Seg Segment of PCI space.
@param Bus Bus NO of PCI space.
@param Dev Dev NO of PCI space.
@param Func Func NO of PCI space.
@param RomAddress Base address of OptionRom.
@param RomLength Length of rom image.
**/
VOID
PciRomAddImageMapping (
IN EFI_HANDLE ImageHandle,
IN UINTN Seg,
IN UINT8 Bus,
IN UINT8 Dev,
IN UINT8 Func,
IN UINT64 RomAddress,
IN UINT64 RomLength
)
{
EFI_PCI_ROM_IMAGE_MAPPING *TempMapping;
if (mNumberOfPciRomImages >= mMaxNumberOfPciRomImages) {
mMaxNumberOfPciRomImages += 0x20;
TempMapping = NULL;
TempMapping = AllocatePool (mMaxNumberOfPciRomImages * sizeof (EFI_PCI_ROM_IMAGE_MAPPING));
if (TempMapping == NULL) {
return ;
}
CopyMem (TempMapping, mRomImageTable, mNumberOfPciRomImages * sizeof (EFI_PCI_ROM_IMAGE_MAPPING));
if (mRomImageTable != NULL) {
FreePool (mRomImageTable);
}
mRomImageTable = TempMapping;
}
mRomImageTable[mNumberOfPciRomImages].ImageHandle = ImageHandle;
mRomImageTable[mNumberOfPciRomImages].Seg = Seg;
mRomImageTable[mNumberOfPciRomImages].Bus = Bus;
mRomImageTable[mNumberOfPciRomImages].Dev = Dev;
mRomImageTable[mNumberOfPciRomImages].Func = Func;
mRomImageTable[mNumberOfPciRomImages].RomAddress = RomAddress;
mRomImageTable[mNumberOfPciRomImages].RomLength = RomLength;
mNumberOfPciRomImages++;
}
/**
Get Option rom driver's mapping for PCI device.
@param PciIoDevice Device instance.
@retval TRUE Found Image mapping.
@retval FALSE Cannot found image mapping.
**/
BOOLEAN
PciRomGetImageMapping (
IN PCI_IO_DEVICE *PciIoDevice
)
{
EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL *PciRootBridgeIo;
UINTN Index;
BOOLEAN Found;
PciRootBridgeIo = PciIoDevice->PciRootBridgeIo;
Found = FALSE;
for (Index = 0; Index < mNumberOfPciRomImages; Index++) {
if (mRomImageTable[Index].Seg == PciRootBridgeIo->SegmentNumber &&
mRomImageTable[Index].Bus == PciIoDevice->BusNumber &&
mRomImageTable[Index].Dev == PciIoDevice->DeviceNumber &&
mRomImageTable[Index].Func == PciIoDevice->FunctionNumber ) {
Found = TRUE;
if (mRomImageTable[Index].ImageHandle != NULL) {
AddDriver (PciIoDevice, mRomImageTable[Index].ImageHandle);
} else {
PciIoDevice->PciIo.RomImage = (VOID *) (UINTN) mRomImageTable[Index].RomAddress;
PciIoDevice->PciIo.RomSize = (UINTN) mRomImageTable[Index].RomLength;
}
}
}
return Found;
}

55
IntelFrameworkModulePkg/Bus/Pci/PciBusDxe/PciRomTable.h

@ -1,55 +0,0 @@
/** @file
Set up ROM Table for PCI Bus module.
Copyright (c) 2006 - 2009, Intel Corporation
All rights reserved. This program and the accompanying materials
are licensed and made available under the terms and conditions of the BSD License
which accompanies this distribution. The full text of the license may be found at
http://opensource.org/licenses/bsd-license.php
THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
**/
#ifndef _EFI_PCI_ROM_TABLE_H_
#define _EFI_PCI_ROM_TABLE_H_
/**
Add the Rom Image to internal database for later PCI light enumeration.
@param ImageHandle Option Rom image handle.
@param Seg Segment of PCI space.
@param Bus Bus NO of PCI space.
@param Dev Dev NO of PCI space.
@param Func Func NO of PCI space.
@param RomAddress Base address of OptionRom.
@param RomLength Length of rom image.
**/
VOID
PciRomAddImageMapping (
IN EFI_HANDLE ImageHandle,
IN UINTN Seg,
IN UINT8 Bus,
IN UINT8 Dev,
IN UINT8 Func,
IN UINT64 RomAddress,
IN UINT64 RomLength
);
/**
Get Option rom driver's mapping for PCI device.
@param PciIoDevice Device instance.
@retval TRUE Found Image mapping.
@retval FALSE Cannot found image mapping.
**/
BOOLEAN
PciRomGetImageMapping (
IN PCI_IO_DEVICE *PciIoDevice
);
#endif

19
IntelFrameworkModulePkg/IntelFrameworkModulePkg.dec

@ -96,22 +96,9 @@
## This PCD specifies whether Peiphase StatusCode is replayed in DxePhase.
gEfiIntelFrameworkModulePkgTokenSpaceGuid.PcdStatusCodeReplayIn|FALSE|BOOLEAN|0x0001002d
## This PCD specifies whether PciBus supports the hot plug device.
gEfiIntelFrameworkModulePkgTokenSpaceGuid.PcdPciBusHotplugDeviceSupport|TRUE|BOOLEAN|0x0001003d
## This PCD specifies whether Serial device use half hand shake.
gEfiIntelFrameworkModulePkgTokenSpaceGuid.PcdIsaBusSerialUseHalfHandshake|FALSE|BOOLEAN|0x00010043
## This PCD specifies whether the Single Root I/O virtualization support.
gEfiIntelFrameworkModulePkgTokenSpaceGuid.PcdSrIovSupport|TRUE|BOOLEAN|0x10000044
## This PCD specifies whether the Alternative Routing-ID support.
gEfiIntelFrameworkModulePkgTokenSpaceGuid.PcdAriSupport|TRUE|BOOLEAN|0x10000045
## This PCD specifies whether the Multi Root I/O virtualization support.
gEfiIntelFrameworkModulePkgTokenSpaceGuid.PcdMrIovSupport|FALSE|BOOLEAN|0x10000046
[PcdsFixedAtBuild]
## FFS filename to find the default BMP Logo file.
gEfiIntelFrameworkModulePkgTokenSpaceGuid.PcdLogoFile |{ 0x99, 0x8b, 0xB2, 0x7B, 0xBB, 0x61, 0xD5, 0x11, 0x9A, 0x5D, 0x00, 0x90, 0x27, 0x3F, 0xC1, 0x4D }|VOID*|16
@ -125,12 +112,6 @@
# BIT2 indicates if ISA memory is supported
gEfiIntelFrameworkModulePkgTokenSpaceGuid.PcdIsaBusSupportedFeatures|0x05|UINT8|0x00010040
## Single root I/O virtualization virtual function memory BAR alignment
# BITN set indicates 2 of n+12 power
# BIT0 set indicates 4KB alignment
# BIT1 set indicates 8KB alignment
gEfiIntelFrameworkModulePkgTokenSpaceGuid.PcdSrIovSystemPageSize|0x1|UINT32|0x10000047
[PcdsFixedAtBuild,PcdsPatchableInModule,PcdsDynamic]
## PcdStatusCodeMemorySize is used when PcdStatusCodeUseMemory is set to true
# (PcdStatusCodeMemorySize * KBytes) is the total taken memory size.

3
IntelFrameworkModulePkg/IntelFrameworkModulePkg.dsc

@ -130,7 +130,6 @@
gEfiMdePkgTokenSpaceGuid.PcdComponentName2Disable|FALSE
gEfiMdePkgTokenSpaceGuid.PcdDriverDiagnostics2Disable|FALSE
gEfiIntelFrameworkModulePkgTokenSpaceGuid.PcdStatusCodeUseSerial|FALSE
gEfiIntelFrameworkModulePkgTokenSpaceGuid.PcdPciBusHotplugDeviceSupport|TRUE
gEfiIntelFrameworkModulePkgTokenSpaceGuid.PcdIsaBusSerialUseHalfHandshake|FALSE
[PcdsFixedAtBuild.common]
@ -193,7 +192,6 @@
IntelFrameworkModulePkg/Library/PlatformBdsLibNull/PlatformBdsLibNull.inf
IntelFrameworkModulePkg/Library/GenericBdsLib/GenericBdsLib.inf
IntelFrameworkModulePkg/Bus/Pci/PciBusDxe/PciBusDxe.inf
IntelFrameworkModulePkg/Bus/Pci/IdeBusDxe/IdeBusDxe.inf
IntelFrameworkModulePkg/Bus/Isa/IsaBusDxe/IsaBusDxe.inf
IntelFrameworkModulePkg/Bus/Isa/IsaFloppyDxe/IsaFloppyDxe.inf
@ -202,7 +200,6 @@
IntelFrameworkModulePkg/Bus/Isa/Ps2MouseDxe/Ps2MouseDxe.inf
IntelFrameworkModulePkg/Bus/Isa/Ps2MouseAbsolutePointerDxe/Ps2MouseAbsolutePointerDxe.inf
IntelFrameworkModulePkg/Bus/Pci/VgaMiniPortDxe/VgaMiniPortDxe.inf
IntelFrameworkModulePkg/Bus/Pci/IncompatiblePciDeviceSupportDxe/IncompatiblePciDeviceSupportDxe.inf
IntelFrameworkModulePkg/Universal/SectionExtractionDxe/SectionExtractionDxe.inf
IntelFrameworkModulePkg/Universal/DataHubDxe/DataHubDxe.inf