mirror of https://github.com/acidanthera/audk.git
OvmfPkg/AcpiTables: remove unused module
The "OvmfPkg/AcpiTables/AcpiTables.inf" module is no longer used by any module in edk2; remove it. Cc: Ard Biesheuvel <ardb+tianocore@kernel.org> Cc: Jordan Justen <jordan.l.justen@intel.com> Cc: Philippe Mathieu-Daudé <philmd@redhat.com> Ref: https://bugzilla.tianocore.org/show_bug.cgi?id=2122 Signed-off-by: Laszlo Ersek <lersek@redhat.com> Message-Id: <20210526201446.12554-19-lersek@redhat.com> Reviewed-by: Ard Biesheuvel <ardb@kernel.org> Reviewed-by: Philippe Mathieu-Daudé <philmd@redhat.com>
This commit is contained in:
Laszlo Ersek
mergify[bot]
parent
4174c5c787
commit
d491c88a0c
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@ -1,38 +0,0 @@
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## @file
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# Component description file for PlatformAcpiTables module.
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#
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# ACPI table data and ASL sources required to boot the platform.
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#
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# Copyright (c) 2008 - 2018, Intel Corporation. All rights reserved.<BR>
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# SPDX-License-Identifier: BSD-2-Clause-Patent
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#
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##
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[Defines]
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INF_VERSION = 0x00010005
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BASE_NAME = PlatformAcpiTables
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FILE_GUID = 7E374E25-8E01-4FEE-87F2-390C23C606CD
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MODULE_TYPE = USER_DEFINED
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VERSION_STRING = 1.0
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#
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# The following information is for reference only and not required by the build tools.
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#
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# VALID_ARCHITECTURES = IA32 X64 EBC
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#
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[Sources]
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Platform.h
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Madt.aslc
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Facp.aslc
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Facs.aslc
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Dsdt.asl
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Ssdt.asl
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[Packages]
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MdePkg/MdePkg.dec
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OvmfPkg/OvmfPkg.dec
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[Pcd]
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gUefiOvmfPkgTokenSpaceGuid.PcdDebugIoPort
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@ -1,692 +0,0 @@
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/** @file
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Contains root level name space objects for the platform
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Copyright (c) 2008, Intel Corporation. All rights reserved.<BR>
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SPDX-License-Identifier: BSD-2-Clause-Patent
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**/
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DefinitionBlock ("Dsdt.aml", "DSDT", 1, "INTEL ", "OVMF ", 4) {
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//
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// System Sleep States
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//
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// We build S3 and S4 with GetSuspendStates() in
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// "OvmfPkg/AcpiPlatformDxe/Qemu.c".
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//
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Name (\_S0, Package () {5, 0, 0, 0}) // Working
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Name (\_S5, Package () {0, 0, 0, 0}) // Soft Off
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//
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// System Bus
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//
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Scope (\_SB) {
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//
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// PCI Root Bridge
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//
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Device (PCI0) {
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Name (_HID, EISAID ("PNP0A03"))
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Name (_ADR, 0x00000000)
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Name (_BBN, 0x00)
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Name (_UID, 0x00)
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//
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// BUS, I/O, and MMIO resources
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//
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Name (CRES, ResourceTemplate () {
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WORDBusNumber ( // Bus number resource (0); the bridge produces bus numbers for its subsequent buses
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ResourceProducer, // bit 0 of general flags is 1
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MinFixed, // Range is fixed
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MaxFixed, // Range is fixed
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PosDecode, // PosDecode
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0x0000, // Granularity
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0x0000, // Min
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0x00FF, // Max
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0x0000, // Translation
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0x0100 // Range Length = Max-Min+1
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)
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IO (Decode16, 0xCF8, 0xCF8, 0x01, 0x08) //Consumed resource (0xCF8-0xCFF)
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WORDIO ( // Consumed-and-produced resource (all I/O below CF8)
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ResourceProducer, // bit 0 of general flags is 0
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MinFixed, // Range is fixed
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MaxFixed, // Range is fixed
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PosDecode,
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EntireRange,
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0x0000, // Granularity
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0x0000, // Min
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0x0CF7, // Max
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0x0000, // Translation
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0x0CF8 // Range Length
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)
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WORDIO ( // Consumed-and-produced resource (all I/O above CFF)
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ResourceProducer, // bit 0 of general flags is 0
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MinFixed, // Range is fixed
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MaxFixed, // Range is fixed
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PosDecode,
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EntireRange,
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0x0000, // Granularity
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0x0D00, // Min
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0xFFFF, // Max
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0x0000, // Translation
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0xF300 // Range Length
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)
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DWORDMEMORY ( // Descriptor for legacy VGA video RAM
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ResourceProducer, // bit 0 of general flags is 0
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PosDecode,
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MinFixed, // Range is fixed
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MaxFixed, // Range is Fixed
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Cacheable,
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ReadWrite,
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0x00000000, // Granularity
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0x000A0000, // Min
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0x000BFFFF, // Max
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0x00000000, // Translation
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0x00020000 // Range Length
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)
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DWORDMEMORY ( // Descriptor for 32-bit MMIO
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ResourceProducer, // bit 0 of general flags is 0
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PosDecode,
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MinFixed, // Range is fixed
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MaxFixed, // Range is Fixed
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NonCacheable,
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ReadWrite,
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0x00000000, // Granularity
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0xF8000000, // Min
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0xFFFBFFFF, // Max
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0x00000000, // Translation
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0x07FC0000, // Range Length
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, // ResourceSourceIndex
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, // ResourceSource
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PW32 // DescriptorName
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)
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})
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Name (CR64, ResourceTemplate () {
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QWordMemory ( // Descriptor for 64-bit MMIO
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ResourceProducer, // bit 0 of general flags is 0
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PosDecode,
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MinFixed, // Range is fixed
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MaxFixed, // Range is Fixed
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Cacheable,
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ReadWrite,
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0x00000000, // Granularity
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0x8000000000, // Min
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0xFFFFFFFFFF, // Max
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0x00000000, // Translation
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0x8000000000, // Range Length
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, // ResourceSourceIndex
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, // ResourceSource
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PW64 // DescriptorName
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)
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})
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Method (_CRS, 0, Serialized) {
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//
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// see the FIRMWARE_DATA structure in "OvmfPkg/AcpiPlatformDxe/Qemu.c"
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//
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External (FWDT, OpRegionObj)
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Field(FWDT, QWordAcc, NoLock, Preserve) {
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P0S, 64, // PciWindow32.Base
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P0E, 64, // PciWindow32.End
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P0L, 64, // PciWindow32.Length
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P1S, 64, // PciWindow64.Base
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P1E, 64, // PciWindow64.End
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P1L, 64 // PciWindow64.Length
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}
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Field(FWDT, DWordAcc, NoLock, Preserve) {
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P0SL, 32, // PciWindow32.Base, low 32 bits
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P0SH, 32, // PciWindow32.Base, high 32 bits
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P0EL, 32, // PciWindow32.End, low 32 bits
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P0EH, 32, // PciWindow32.End, high 32 bits
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P0LL, 32, // PciWindow32.Length, low 32 bits
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P0LH, 32, // PciWindow32.Length, high 32 bits
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P1SL, 32, // PciWindow64.Base, low 32 bits
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P1SH, 32, // PciWindow64.Base, high 32 bits
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P1EL, 32, // PciWindow64.End, low 32 bits
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P1EH, 32, // PciWindow64.End, high 32 bits
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P1LL, 32, // PciWindow64.Length, low 32 bits
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P1LH, 32 // PciWindow64.Length, high 32 bits
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}
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//
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// fixup 32-bit PCI IO window
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//
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CreateDWordField (CRES, \_SB.PCI0.PW32._MIN, PS32)
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CreateDWordField (CRES, \_SB.PCI0.PW32._MAX, PE32)
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CreateDWordField (CRES, \_SB.PCI0.PW32._LEN, PL32)
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Store (P0SL, PS32)
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Store (P0EL, PE32)
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Store (P0LL, PL32)
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If (LAnd (LEqual (P1SL, 0x00), LEqual (P1SH, 0x00))) {
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Return (CRES)
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} Else {
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//
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// fixup 64-bit PCI IO window
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//
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CreateQWordField (CR64, \_SB.PCI0.PW64._MIN, PS64)
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CreateQWordField (CR64, \_SB.PCI0.PW64._MAX, PE64)
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CreateQWordField (CR64, \_SB.PCI0.PW64._LEN, PL64)
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Store (P1S, PS64)
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Store (P1E, PE64)
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Store (P1L, PL64)
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//
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// add window and return result
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//
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ConcatenateResTemplate (CRES, CR64, Local0)
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Return (Local0)
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}
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}
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//
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// PCI Interrupt Routing Table - PIC Mode Only
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//
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Method (_PRT, 0, NotSerialized) {
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Return (
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Package () {
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//
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// Bus 0; Devices 0 to 15
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//
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Package () {0x0000FFFF, 0x00, \_SB.PCI0.LPC.LNKD, 0x00},
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Package () {0x0000FFFF, 0x01, \_SB.PCI0.LPC.LNKA, 0x00},
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Package () {0x0000FFFF, 0x02, \_SB.PCI0.LPC.LNKB, 0x00},
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Package () {0x0000FFFF, 0x03, \_SB.PCI0.LPC.LNKC, 0x00},
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//
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// Bus 0, Device 1, Pin 0 (INTA) is special; it corresponds to the
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// internally generated SCI (System Control Interrupt), which is
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// always routed to GSI 9. By setting the third (= Source) field to
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// zero, we could use the fourth (= Source Index) field to hardwire
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// the pin to GSI 9 directly.
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//
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// That way however, in accordance with the ACPI spec's description
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// of SCI, the interrupt would be treated as "active low,
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// shareable, level", and that doesn't match qemu.
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//
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// In QemuInstallAcpiMadtTable() [OvmfPkg/AcpiPlatformDxe/Qemu.c]
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// we install an Interrupt Override Structure for the identity
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// mapped IRQ#9 / GSI 9 (the corresponding bit being set in
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// Pcd8259LegacyModeEdgeLevel), which describes the correct
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// polarity (active high). As a consequence, some OS'en (eg. Linux)
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// override the default (active low) polarity originating from the
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// _PRT; others (eg. FreeBSD) don't. Therefore we need a separate
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// link device just to specify a polarity that matches the MADT.
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//
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Package () {0x0001FFFF, 0x00, \_SB.PCI0.LPC.LNKS, 0x00},
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Package () {0x0001FFFF, 0x01, \_SB.PCI0.LPC.LNKB, 0x00},
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Package () {0x0001FFFF, 0x02, \_SB.PCI0.LPC.LNKC, 0x00},
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Package () {0x0001FFFF, 0x03, \_SB.PCI0.LPC.LNKD, 0x00},
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Package () {0x0002FFFF, 0x00, \_SB.PCI0.LPC.LNKB, 0x00},
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Package () {0x0002FFFF, 0x01, \_SB.PCI0.LPC.LNKC, 0x00},
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Package () {0x0002FFFF, 0x02, \_SB.PCI0.LPC.LNKD, 0x00},
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Package () {0x0002FFFF, 0x03, \_SB.PCI0.LPC.LNKA, 0x00},
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Package () {0x0003FFFF, 0x00, \_SB.PCI0.LPC.LNKC, 0x00},
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Package () {0x0003FFFF, 0x01, \_SB.PCI0.LPC.LNKD, 0x00},
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Package () {0x0003FFFF, 0x02, \_SB.PCI0.LPC.LNKA, 0x00},
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Package () {0x0003FFFF, 0x03, \_SB.PCI0.LPC.LNKB, 0x00},
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Package () {0x0004FFFF, 0x00, \_SB.PCI0.LPC.LNKD, 0x00},
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Package () {0x0004FFFF, 0x01, \_SB.PCI0.LPC.LNKA, 0x00},
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Package () {0x0004FFFF, 0x02, \_SB.PCI0.LPC.LNKB, 0x00},
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Package () {0x0004FFFF, 0x03, \_SB.PCI0.LPC.LNKC, 0x00},
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Package () {0x0005FFFF, 0x00, \_SB.PCI0.LPC.LNKA, 0x00},
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Package () {0x0005FFFF, 0x01, \_SB.PCI0.LPC.LNKB, 0x00},
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Package () {0x0005FFFF, 0x02, \_SB.PCI0.LPC.LNKC, 0x00},
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Package () {0x0005FFFF, 0x03, \_SB.PCI0.LPC.LNKD, 0x00},
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Package () {0x0006FFFF, 0x00, \_SB.PCI0.LPC.LNKB, 0x00},
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Package () {0x0006FFFF, 0x01, \_SB.PCI0.LPC.LNKC, 0x00},
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Package () {0x0006FFFF, 0x02, \_SB.PCI0.LPC.LNKD, 0x00},
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Package () {0x0006FFFF, 0x03, \_SB.PCI0.LPC.LNKA, 0x00},
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Package () {0x0007FFFF, 0x00, \_SB.PCI0.LPC.LNKC, 0x00},
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Package () {0x0007FFFF, 0x01, \_SB.PCI0.LPC.LNKD, 0x00},
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Package () {0x0007FFFF, 0x02, \_SB.PCI0.LPC.LNKA, 0x00},
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Package () {0x0007FFFF, 0x03, \_SB.PCI0.LPC.LNKB, 0x00},
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Package () {0x0008FFFF, 0x00, \_SB.PCI0.LPC.LNKD, 0x00},
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Package () {0x0008FFFF, 0x01, \_SB.PCI0.LPC.LNKA, 0x00},
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Package () {0x0008FFFF, 0x02, \_SB.PCI0.LPC.LNKB, 0x00},
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Package () {0x0008FFFF, 0x03, \_SB.PCI0.LPC.LNKC, 0x00},
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Package () {0x0009FFFF, 0x00, \_SB.PCI0.LPC.LNKA, 0x00},
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Package () {0x0009FFFF, 0x01, \_SB.PCI0.LPC.LNKB, 0x00},
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Package () {0x0009FFFF, 0x02, \_SB.PCI0.LPC.LNKC, 0x00},
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Package () {0x0009FFFF, 0x03, \_SB.PCI0.LPC.LNKD, 0x00},
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Package () {0x000AFFFF, 0x00, \_SB.PCI0.LPC.LNKB, 0x00},
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Package () {0x000AFFFF, 0x01, \_SB.PCI0.LPC.LNKC, 0x00},
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Package () {0x000AFFFF, 0x02, \_SB.PCI0.LPC.LNKD, 0x00},
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Package () {0x000AFFFF, 0x03, \_SB.PCI0.LPC.LNKA, 0x00},
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Package () {0x000BFFFF, 0x00, \_SB.PCI0.LPC.LNKC, 0x00},
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Package () {0x000BFFFF, 0x01, \_SB.PCI0.LPC.LNKD, 0x00},
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Package () {0x000BFFFF, 0x02, \_SB.PCI0.LPC.LNKA, 0x00},
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Package () {0x000BFFFF, 0x03, \_SB.PCI0.LPC.LNKB, 0x00},
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Package () {0x000CFFFF, 0x00, \_SB.PCI0.LPC.LNKD, 0x00},
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Package () {0x000CFFFF, 0x01, \_SB.PCI0.LPC.LNKA, 0x00},
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Package () {0x000CFFFF, 0x02, \_SB.PCI0.LPC.LNKB, 0x00},
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Package () {0x000CFFFF, 0x03, \_SB.PCI0.LPC.LNKC, 0x00},
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Package () {0x000DFFFF, 0x00, \_SB.PCI0.LPC.LNKA, 0x00},
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Package () {0x000DFFFF, 0x01, \_SB.PCI0.LPC.LNKB, 0x00},
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Package () {0x000DFFFF, 0x02, \_SB.PCI0.LPC.LNKC, 0x00},
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Package () {0x000DFFFF, 0x03, \_SB.PCI0.LPC.LNKD, 0x00},
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Package () {0x000EFFFF, 0x00, \_SB.PCI0.LPC.LNKB, 0x00},
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Package () {0x000EFFFF, 0x01, \_SB.PCI0.LPC.LNKC, 0x00},
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Package () {0x000EFFFF, 0x02, \_SB.PCI0.LPC.LNKD, 0x00},
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Package () {0x000EFFFF, 0x03, \_SB.PCI0.LPC.LNKA, 0x00},
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Package () {0x000FFFFF, 0x00, \_SB.PCI0.LPC.LNKC, 0x00},
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Package () {0x000FFFFF, 0x01, \_SB.PCI0.LPC.LNKD, 0x00},
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Package () {0x000FFFFF, 0x02, \_SB.PCI0.LPC.LNKA, 0x00},
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Package () {0x000FFFFF, 0x03, \_SB.PCI0.LPC.LNKB, 0x00}
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}
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)
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}
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//
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// PCI to ISA Bridge (Bus 0, Device 1, Function 0)
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// "Low Pin Count"
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//
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Device (LPC) {
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Name (_ADR, 0x00010000)
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//
|
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// The SCI cannot be rerouted or disabled with PIRQRC[A:D]; we only
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// need this link device in order to specify the polarity.
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//
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Device (LNKS) {
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Name (_HID, EISAID("PNP0C0F"))
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Name (_UID, 0)
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Name (_STA, 0xB) // 0x1: device present
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// 0x2: enabled and decoding resources
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// 0x8: functioning properly
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Method (_SRS, 1, NotSerialized) { /* no-op */ }
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Method (_DIS, 0, NotSerialized) { /* no-op */ }
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Name (_PRS, ResourceTemplate () {
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Interrupt (ResourceConsumer, Level, ActiveHigh, Shared) { 9 }
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//
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// list of IRQs occupied thus far: 9
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//
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})
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Method (_CRS, 0, NotSerialized) { Return (_PRS) }
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}
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//
|
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// PCI Interrupt Routing Configuration Registers, PIRQRC[A:D]
|
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//
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OperationRegion (PRR0, PCI_Config, 0x60, 0x04)
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Field (PRR0, ANYACC, NOLOCK, PRESERVE) {
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PIRA, 8,
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PIRB, 8,
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PIRC, 8,
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PIRD, 8
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}
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//
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// _STA method for LNKA, LNKB, LNKC, LNKD
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// Arg0[in]: value of PIRA / PIRB / PIRC / PIRD
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//
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Method (PSTA, 1, NotSerialized) {
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If (And (Arg0, 0x80)) { // disable-bit set?
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Return (0x9) // "device present" | "functioning properly"
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} Else {
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Return (0xB) // same | "enabled and decoding resources"
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||||
}
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}
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//
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// _CRS method for LNKA, LNKB, LNKC, LNKD
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// Arg0[in]: value of PIRA / PIRB / PIRC / PIRD
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//
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Method (PCRS, 1, Serialized) {
|
||||
//
|
||||
// create temporary buffer with an Extended Interrupt Descriptor
|
||||
// whose single vector defaults to zero
|
||||
//
|
||||
Name (BUF0, ResourceTemplate () {
|
||||
Interrupt (ResourceConsumer, Level, ActiveHigh, Shared){0}
|
||||
}
|
||||
)
|
||||
|
||||
//
|
||||
// define reference to first interrupt vector in buffer
|
||||
//
|
||||
CreateDWordField (BUF0, 0x05, IRQW)
|
||||
|
||||
//
|
||||
// If the disable-bit is clear, overwrite the default zero vector
|
||||
// with the value in Arg0 (ie. PIRQRC[A:D]). Reserved bits are read
|
||||
// as 0.
|
||||
//
|
||||
If (LNot (And (Arg0, 0x80))) {
|
||||
Store (Arg0, IRQW)
|
||||
}
|
||||
Return (BUF0)
|
||||
}
|
||||
|
||||
//
|
||||
// _PRS resource for LNKA, LNKB, LNKC, LNKD
|
||||
//
|
||||
Name (PPRS, ResourceTemplate () {
|
||||
Interrupt (ResourceConsumer, Level, ActiveHigh, Shared) {5, 10, 11}
|
||||
//
|
||||
// list of IRQs occupied thus far: 9, 5, 10, 11
|
||||
//
|
||||
})
|
||||
|
||||
//
|
||||
// PCI IRQ Link A
|
||||
//
|
||||
Device (LNKA) {
|
||||
Name (_HID, EISAID("PNP0C0F"))
|
||||
Name (_UID, 1)
|
||||
|
||||
Method (_STA, 0, NotSerialized) { Return (PSTA (PIRA)) }
|
||||
Method (_DIS, 0, NotSerialized) {
|
||||
Or (PIRA, 0x80, PIRA) // set disable-bit
|
||||
}
|
||||
Method (_CRS, 0, NotSerialized) { Return (PCRS (PIRA)) }
|
||||
Method (_PRS, 0, NotSerialized) { Return (PPRS) }
|
||||
Method (_SRS, 1, NotSerialized) {
|
||||
CreateDWordField (Arg0, 0x05, IRQW)
|
||||
Store (IRQW, PIRA)
|
||||
}
|
||||
}
|
||||
|
||||
//
|
||||
// PCI IRQ Link B
|
||||
//
|
||||
Device (LNKB) {
|
||||
Name (_HID, EISAID("PNP0C0F"))
|
||||
Name (_UID, 2)
|
||||
|
||||
Method (_STA, 0, NotSerialized) { Return (PSTA (PIRB)) }
|
||||
Method (_DIS, 0, NotSerialized) {
|
||||
Or (PIRB, 0x80, PIRB) // set disable-bit
|
||||
}
|
||||
Method (_CRS, 0, NotSerialized) { Return (PCRS (PIRB)) }
|
||||
Method (_PRS, 0, NotSerialized) { Return (PPRS) }
|
||||
Method (_SRS, 1, NotSerialized) {
|
||||
CreateDWordField (Arg0, 0x05, IRQW)
|
||||
Store (IRQW, PIRB)
|
||||
}
|
||||
}
|
||||
|
||||
//
|
||||
// PCI IRQ Link C
|
||||
//
|
||||
Device (LNKC) {
|
||||
Name (_HID, EISAID("PNP0C0F"))
|
||||
Name (_UID, 3)
|
||||
|
||||
Method (_STA, 0, NotSerialized) { Return (PSTA (PIRC)) }
|
||||
Method (_DIS, 0, NotSerialized) {
|
||||
Or (PIRC, 0x80, PIRC) // set disable-bit
|
||||
}
|
||||
Method (_CRS, 0, NotSerialized) { Return (PCRS (PIRC)) }
|
||||
Method (_PRS, 0, NotSerialized) { Return (PPRS) }
|
||||
Method (_SRS, 1, NotSerialized) {
|
||||
CreateDWordField (Arg0, 0x05, IRQW)
|
||||
Store (IRQW, PIRC)
|
||||
}
|
||||
}
|
||||
|
||||
//
|
||||
// PCI IRQ Link D
|
||||
//
|
||||
Device (LNKD) {
|
||||
Name (_HID, EISAID("PNP0C0F"))
|
||||
Name (_UID, 4)
|
||||
|
||||
Method (_STA, 0, NotSerialized) { Return (PSTA (PIRD)) }
|
||||
Method (_DIS, 0, NotSerialized) {
|
||||
Or (PIRD, 0x80, PIRD) // set disable-bit
|
||||
}
|
||||
Method (_CRS, 0, NotSerialized) { Return (PCRS (PIRD)) }
|
||||
Method (_PRS, 0, NotSerialized) { Return (PPRS) }
|
||||
Method (_SRS, 1, NotSerialized) {
|
||||
CreateDWordField (Arg0, 0x05, IRQW)
|
||||
Store (IRQW, PIRD)
|
||||
}
|
||||
}
|
||||
|
||||
//
|
||||
// Programmable Interrupt Controller (PIC)
|
||||
//
|
||||
Device(PIC) {
|
||||
Name (_HID, EISAID ("PNP0000"))
|
||||
Name (_CRS, ResourceTemplate () {
|
||||
IO (Decode16, 0x020, 0x020, 0x00, 0x02)
|
||||
IO (Decode16, 0x0A0, 0x0A0, 0x00, 0x02)
|
||||
IO (Decode16, 0x4D0, 0x4D0, 0x00, 0x02)
|
||||
IRQNoFlags () {2}
|
||||
//
|
||||
// list of IRQs occupied thus far: 9, 5, 10, 11, 2
|
||||
//
|
||||
})
|
||||
}
|
||||
|
||||
//
|
||||
// ISA DMA
|
||||
//
|
||||
Device (DMAC) {
|
||||
Name (_HID, EISAID ("PNP0200"))
|
||||
Name (_CRS, ResourceTemplate () {
|
||||
IO (Decode16, 0x00, 0x00, 0, 0x10)
|
||||
IO (Decode16, 0x81, 0x81, 0, 0x03)
|
||||
IO (Decode16, 0x87, 0x87, 0, 0x01)
|
||||
IO (Decode16, 0x89, 0x89, 0, 0x03)
|
||||
IO (Decode16, 0x8f, 0x8f, 0, 0x01)
|
||||
IO (Decode16, 0xc0, 0xc0, 0, 0x20)
|
||||
DMA (Compatibility, NotBusMaster, Transfer8) {4}
|
||||
})
|
||||
}
|
||||
|
||||
//
|
||||
// 8254 Timer
|
||||
//
|
||||
Device(TMR) {
|
||||
Name(_HID,EISAID("PNP0100"))
|
||||
Name(_CRS, ResourceTemplate () {
|
||||
IO (Decode16, 0x40, 0x40, 0x00, 0x04)
|
||||
IRQNoFlags () {0}
|
||||
//
|
||||
// list of IRQs occupied thus far: 9, 5, 10, 11, 2, 0
|
||||
//
|
||||
})
|
||||
}
|
||||
|
||||
//
|
||||
// Real Time Clock
|
||||
//
|
||||
Device (RTC) {
|
||||
Name (_HID, EISAID ("PNP0B00"))
|
||||
Name (_CRS, ResourceTemplate () {
|
||||
IO (Decode16, 0x70, 0x70, 0x00, 0x02)
|
||||
IRQNoFlags () {8}
|
||||
//
|
||||
// list of IRQs occupied thus far: 9, 5, 10, 11, 2, 0, 8
|
||||
//
|
||||
})
|
||||
}
|
||||
|
||||
//
|
||||
// PCAT Speaker
|
||||
//
|
||||
Device(SPKR) {
|
||||
Name (_HID, EISAID("PNP0800"))
|
||||
Name (_CRS, ResourceTemplate () {
|
||||
IO (Decode16, 0x61, 0x61, 0x01, 0x01)
|
||||
})
|
||||
}
|
||||
|
||||
//
|
||||
// Floating Point Coprocessor
|
||||
//
|
||||
Device(FPU) {
|
||||
Name (_HID, EISAID("PNP0C04"))
|
||||
Name (_CRS, ResourceTemplate () {
|
||||
IO (Decode16, 0xF0, 0xF0, 0x00, 0x10)
|
||||
IRQNoFlags () {13}
|
||||
//
|
||||
// list of IRQs occupied thus far: 9, 5, 10, 11, 2, 0, 8, 13
|
||||
//
|
||||
})
|
||||
}
|
||||
|
||||
//
|
||||
// Generic motherboard devices and pieces that don't fit anywhere else
|
||||
//
|
||||
Device(XTRA) {
|
||||
Name (_HID, EISAID ("PNP0C02"))
|
||||
Name (_UID, 0x01)
|
||||
Name (_CRS, ResourceTemplate () {
|
||||
IO (Decode16, 0x010, 0x010, 0x00, 0x10)
|
||||
IO (Decode16, 0x022, 0x022, 0x00, 0x1E)
|
||||
IO (Decode16, 0x044, 0x044, 0x00, 0x1C)
|
||||
IO (Decode16, 0x062, 0x062, 0x00, 0x02)
|
||||
IO (Decode16, 0x065, 0x065, 0x00, 0x0B)
|
||||
IO (Decode16, 0x072, 0x072, 0x00, 0x0E)
|
||||
IO (Decode16, 0x080, 0x080, 0x00, 0x01)
|
||||
IO (Decode16, 0x084, 0x084, 0x00, 0x03)
|
||||
IO (Decode16, 0x088, 0x088, 0x00, 0x01)
|
||||
IO (Decode16, 0x08c, 0x08c, 0x00, 0x03)
|
||||
IO (Decode16, 0x090, 0x090, 0x00, 0x10)
|
||||
IO (Decode16, 0x0A2, 0x0A2, 0x00, 0x1E)
|
||||
IO (Decode16, 0x0E0, 0x0E0, 0x00, 0x10)
|
||||
IO (Decode16, 0x1E0, 0x1E0, 0x00, 0x10)
|
||||
IO (Decode16, 0x160, 0x160, 0x00, 0x10)
|
||||
IO (Decode16, 0x278, 0x278, 0x00, 0x08)
|
||||
IO (Decode16, 0x370, 0x370, 0x00, 0x02)
|
||||
IO (Decode16, 0x378, 0x378, 0x00, 0x08)
|
||||
IO (Decode16, FixedPcdGet16 (PcdDebugIoPort), FixedPcdGet16 (PcdDebugIoPort), 0x00, 0x01)
|
||||
IO (Decode16, 0x440, 0x440, 0x00, 0x10)
|
||||
IO (Decode16, 0x678, 0x678, 0x00, 0x08)
|
||||
IO (Decode16, 0x778, 0x778, 0x00, 0x08)
|
||||
IO (Decode16, 0xafe0, 0xafe0, 0x00, 0x04) // QEMU GPE0 BLK
|
||||
IO (Decode16, 0xb000, 0xb000, 0x00, 0x40) // PMBLK1
|
||||
Memory32Fixed (ReadOnly, 0xFEC00000, 0x1000) // IO APIC
|
||||
Memory32Fixed (ReadOnly, 0xFEE00000, 0x100000) // LAPIC
|
||||
})
|
||||
}
|
||||
|
||||
//
|
||||
// PS/2 Keyboard and PC/AT Enhanced Keyboard 101/102
|
||||
//
|
||||
Device (PS2K) {
|
||||
Name (_HID, EISAID ("PNP0303"))
|
||||
Name (_CID, EISAID ("PNP030B"))
|
||||
Name(_CRS,ResourceTemplate() {
|
||||
IO (Decode16, 0x60, 0x60, 0x00, 0x01)
|
||||
IO (Decode16, 0x64, 0x64, 0x00, 0x01)
|
||||
IRQNoFlags () {1}
|
||||
//
|
||||
// list of IRQs occupied thus far: 9, 5, 10, 11, 2, 0, 8, 13, 1
|
||||
//
|
||||
})
|
||||
}
|
||||
|
||||
//
|
||||
// PS/2 Mouse and Microsoft Mouse
|
||||
//
|
||||
Device (PS2M) { // PS/2 stype mouse port
|
||||
Name (_HID, EISAID ("PNP0F03"))
|
||||
Name (_CID, EISAID ("PNP0F13"))
|
||||
Name (_CRS, ResourceTemplate() {
|
||||
IRQNoFlags () {12}
|
||||
//
|
||||
// list of IRQs occupied thus far:
|
||||
// 9, 5, 10, 11, 2, 0, 8, 13, 1, 12
|
||||
//
|
||||
})
|
||||
}
|
||||
|
||||
//
|
||||
// UART Serial Port - COM1
|
||||
//
|
||||
Device (UAR1) {
|
||||
Name (_HID, EISAID ("PNP0501"))
|
||||
Name (_DDN, "COM1")
|
||||
Name (_UID, 0x01)
|
||||
Name(_CRS,ResourceTemplate() {
|
||||
IO (Decode16, 0x3F8, 0x3F8, 0x01, 0x08)
|
||||
IRQ (Edge, ActiveHigh, Exclusive, ) {4}
|
||||
//
|
||||
// list of IRQs occupied thus far:
|
||||
// 9, 5, 10, 11, 2, 0, 8, 13, 1, 12, 4
|
||||
//
|
||||
})
|
||||
}
|
||||
|
||||
//
|
||||
// UART Serial Port - COM2
|
||||
//
|
||||
Device (UAR2) {
|
||||
Name (_HID, EISAID ("PNP0501"))
|
||||
Name (_DDN, "COM2")
|
||||
Name (_UID, 0x02)
|
||||
Name(_CRS,ResourceTemplate() {
|
||||
IO (Decode16, 0x2F8, 0x2F8, 0x01, 0x08)
|
||||
IRQ (Edge, ActiveHigh, Exclusive, ) {3}
|
||||
//
|
||||
// list of IRQs occupied thus far:
|
||||
// 9, 5, 10, 11, 2, 0, 8, 13, 1, 12, 4, 3
|
||||
//
|
||||
})
|
||||
}
|
||||
|
||||
//
|
||||
// Floppy Disk Controller
|
||||
//
|
||||
Device (FDC) {
|
||||
Name (_HID, EISAID ("PNP0700"))
|
||||
Name (_CRS,ResourceTemplate() {
|
||||
IO (Decode16, 0x3F0, 0x3F0, 0x01, 0x06)
|
||||
IO (Decode16, 0x3F7, 0x3F7, 0x01, 0x01)
|
||||
IRQNoFlags () {6}
|
||||
//
|
||||
// list of IRQs occupied thus far:
|
||||
// 9, 5, 10, 11, 2, 0, 8, 13, 1, 12, 4, 3, 6
|
||||
//
|
||||
DMA (Compatibility, NotBusMaster, Transfer8) {2}
|
||||
})
|
||||
}
|
||||
|
||||
//
|
||||
// parallel port -- no DMA for now
|
||||
//
|
||||
Device (PAR1) {
|
||||
Name (_HID, EISAID ("PNP0400"))
|
||||
Name (_DDN, "LPT1")
|
||||
Name (_UID, 0x01)
|
||||
Name(_CRS, ResourceTemplate() {
|
||||
IO (Decode16, 0x0378, 0x0378, 0x00, 0x08)
|
||||
IRQNoFlags () {7}
|
||||
//
|
||||
// list of IRQs occupied thus far:
|
||||
// 9, 5, 10, 11, 2, 0, 8, 13, 1, 12, 4, 3, 6, 7
|
||||
// in order:
|
||||
// 0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13
|
||||
//
|
||||
})
|
||||
}
|
||||
}
|
||||
}
|
||||
}
|
||||
}
|
||||
|
|
@ -1,89 +0,0 @@
|
|||
/** @file
|
||||
FACP Table
|
||||
|
||||
Copyright (c) 2013, Red Hat, Inc.
|
||||
Copyright (c) 2008 - 2012, Intel Corporation. All rights reserved.<BR>
|
||||
SPDX-License-Identifier: BSD-2-Clause-Patent
|
||||
|
||||
**/
|
||||
|
||||
#include "Platform.h"
|
||||
|
||||
EFI_ACPI_2_0_FIXED_ACPI_DESCRIPTION_TABLE FACP = {
|
||||
{
|
||||
EFI_ACPI_2_0_FIXED_ACPI_DESCRIPTION_TABLE_SIGNATURE,
|
||||
sizeof (EFI_ACPI_2_0_FIXED_ACPI_DESCRIPTION_TABLE),
|
||||
EFI_ACPI_2_0_FIXED_ACPI_DESCRIPTION_TABLE_REVISION,
|
||||
0, // to make sum of entire table == 0
|
||||
{EFI_ACPI_OEM_ID}, // OEMID is a 6 bytes long field
|
||||
EFI_ACPI_OEM_TABLE_ID, // OEM table identification(8 bytes long)
|
||||
EFI_ACPI_OEM_REVISION, // OEM revision number
|
||||
EFI_ACPI_CREATOR_ID, // ASL compiler vendor ID
|
||||
EFI_ACPI_CREATOR_REVISION // ASL compiler revision number
|
||||
},
|
||||
0, // Physical address of FACS
|
||||
0, // Physical address of DSDT
|
||||
RESERVED, // System Interrupt Model in ACPI 1.0, eliminated in 2.0
|
||||
EFI_ACPI_2_0_PM_PROFILE_UNSPECIFIED, // Preferred PM profile
|
||||
SCI_INT_VECTOR, // System vector of SCI interrupt
|
||||
SMI_CMD_IO_PORT, // Port address of SMI command port
|
||||
ACPI_ENABLE, // value to write to port smi_cmd to enable ACPI
|
||||
ACPI_DISABLE, // value to write to port smi_cmd to disable ACPI
|
||||
S4BIOS_REQ, // Value to write to SMI CMD port to enter the S4BIOS state
|
||||
0, // PState control
|
||||
PM1a_EVT_BLK, // Port address of Power Mgt 1a Event Reg Blk
|
||||
0, // Power Mgt 1b Event Reg Blk unsupported
|
||||
PM1a_CNT_BLK, // Port address of Power Mgt 1a Ctrl Reg Blk
|
||||
0, // Power Mgt 1b Ctrl Reg Blk unsupported
|
||||
0, // Power Mgt 2 Ctrl Reg Blk unsupported
|
||||
PM_TMR_BLK, // Port address of Power Mgt Timer Ctrl Reg Blk
|
||||
GPE0_BLK, // Port addr of General Purpose Event 0 Reg Blk
|
||||
0, // General Purpose Event 1 Reg Blk unsupported
|
||||
PM1_EVT_LEN, // Byte Length of ports at pm1X_evt_blk
|
||||
PM1_CNT_LEN, // Byte Length of ports at pm1X_cnt_blk
|
||||
0, // Power Mgt 2 Ctrl Reg Blk unsupported
|
||||
PM_TM_LEN, // Byte Length of ports at pm_tm_blk
|
||||
GPE0_BLK_LEN, // Byte Length of ports at gpe0_blk
|
||||
0, // General Purpose Event 1 Reg Blk unsupported
|
||||
0, // General Purpose Event 1 Reg Blk unsupported
|
||||
0, // _CST support
|
||||
P_LVL2_LAT, // worst case HW latency to enter/exit C2 state
|
||||
P_LVL3_LAT, // worst case HW latency to enter/exit C3 state
|
||||
FLUSH_SIZE, // Size of area read to flush caches
|
||||
FLUSH_STRIDE, // Stride used in flushing caches
|
||||
DUTY_OFFSET, // bit location of duty cycle field in p_cnt reg
|
||||
DUTY_WIDTH, // bit width of duty cycle field in p_cnt reg
|
||||
DAY_ALRM, // index to day-of-month alarm in RTC CMOS RAM
|
||||
MON_ALRM, // index to month-of-year alarm in RTC CMOS RAM
|
||||
CENTURY, // index to century in RTC CMOS RAM
|
||||
0x0000, // Boot architecture flag (16-bit)
|
||||
RESERVED, // reserved
|
||||
FLAG, // Fixed feature flags
|
||||
GAS2_IO(RESET_REG, 1), // Extended address of the Reset Register
|
||||
RESET_VALUE, // Value for the Reset Register to reset the system
|
||||
{ RESERVED }, // reserved[3]
|
||||
0, // 64-bit physical address of FACS, set at installation
|
||||
0, // 64-bit physical address of DSDT, set at installation
|
||||
|
||||
GAS2_IO(PM1a_EVT_BLK, PM1_EVT_LEN), // Ext. addr. of PM 1a Event Reg Blk
|
||||
{ 0 }, // PM 1b Event Reg Blk unsupported
|
||||
GAS2_IO(PM1a_CNT_BLK, PM1_CNT_LEN), // Ext. addr. of PM 1a Ctrl Reg Blk
|
||||
{ 0 }, // PM 1b Ctrl Reg Blk unsupported
|
||||
{ 0 }, // PM 2 Ctrl Reg Blk unsupported
|
||||
GAS2_IO(PM_TMR_BLK, PM_TM_LEN), // Ext. addr. of PM Timer Ctrl Reg Blk
|
||||
GAS2_IO(GPE0_BLK, GPE0_BLK_LEN), // Ext. addr. of GPE 0 Reg Blk
|
||||
{ 0 } // GPE 1 Reg Blk unsupported
|
||||
};
|
||||
|
||||
|
||||
VOID*
|
||||
ReferenceAcpiTable (
|
||||
VOID
|
||||
)
|
||||
{
|
||||
//
|
||||
// Reference the table being generated to prevent the optimizer from removing the
|
||||
// data structure from the executable
|
||||
//
|
||||
return (VOID*)&FACP;
|
||||
}
|
||||
|
|
@ -1,78 +0,0 @@
|
|||
/** @file
|
||||
FACS Table
|
||||
|
||||
Copyright (c) 2008 - 2012, Intel Corporation. All rights reserved.<BR>
|
||||
SPDX-License-Identifier: BSD-2-Clause-Patent
|
||||
|
||||
**/
|
||||
|
||||
#include <IndustryStandard/Acpi.h>
|
||||
|
||||
EFI_ACPI_1_0_FIRMWARE_ACPI_CONTROL_STRUCTURE FACS = {
|
||||
EFI_ACPI_1_0_FIRMWARE_ACPI_CONTROL_STRUCTURE_SIGNATURE,
|
||||
sizeof (EFI_ACPI_1_0_FIRMWARE_ACPI_CONTROL_STRUCTURE),
|
||||
|
||||
//
|
||||
// Hardware Signature will be updated at runtime
|
||||
//
|
||||
0x00000000,
|
||||
0x00,
|
||||
0x00,
|
||||
0x00,
|
||||
{
|
||||
EFI_ACPI_RESERVED_BYTE,
|
||||
EFI_ACPI_RESERVED_BYTE,
|
||||
EFI_ACPI_RESERVED_BYTE,
|
||||
EFI_ACPI_RESERVED_BYTE,
|
||||
EFI_ACPI_RESERVED_BYTE,
|
||||
EFI_ACPI_RESERVED_BYTE,
|
||||
EFI_ACPI_RESERVED_BYTE,
|
||||
EFI_ACPI_RESERVED_BYTE,
|
||||
EFI_ACPI_RESERVED_BYTE,
|
||||
EFI_ACPI_RESERVED_BYTE,
|
||||
EFI_ACPI_RESERVED_BYTE,
|
||||
EFI_ACPI_RESERVED_BYTE,
|
||||
EFI_ACPI_RESERVED_BYTE,
|
||||
EFI_ACPI_RESERVED_BYTE,
|
||||
EFI_ACPI_RESERVED_BYTE,
|
||||
EFI_ACPI_RESERVED_BYTE,
|
||||
EFI_ACPI_RESERVED_BYTE,
|
||||
EFI_ACPI_RESERVED_BYTE,
|
||||
EFI_ACPI_RESERVED_BYTE,
|
||||
EFI_ACPI_RESERVED_BYTE,
|
||||
EFI_ACPI_RESERVED_BYTE,
|
||||
EFI_ACPI_RESERVED_BYTE,
|
||||
EFI_ACPI_RESERVED_BYTE,
|
||||
EFI_ACPI_RESERVED_BYTE,
|
||||
EFI_ACPI_RESERVED_BYTE,
|
||||
EFI_ACPI_RESERVED_BYTE,
|
||||
EFI_ACPI_RESERVED_BYTE,
|
||||
EFI_ACPI_RESERVED_BYTE,
|
||||
EFI_ACPI_RESERVED_BYTE,
|
||||
EFI_ACPI_RESERVED_BYTE,
|
||||
EFI_ACPI_RESERVED_BYTE,
|
||||
EFI_ACPI_RESERVED_BYTE,
|
||||
EFI_ACPI_RESERVED_BYTE,
|
||||
EFI_ACPI_RESERVED_BYTE,
|
||||
EFI_ACPI_RESERVED_BYTE,
|
||||
EFI_ACPI_RESERVED_BYTE,
|
||||
EFI_ACPI_RESERVED_BYTE,
|
||||
EFI_ACPI_RESERVED_BYTE,
|
||||
EFI_ACPI_RESERVED_BYTE,
|
||||
EFI_ACPI_RESERVED_BYTE
|
||||
}
|
||||
};
|
||||
|
||||
|
||||
VOID*
|
||||
ReferenceAcpiTable (
|
||||
VOID
|
||||
)
|
||||
{
|
||||
//
|
||||
// Reference the table being generated to prevent the optimizer from removing the
|
||||
// data structure from the executable
|
||||
//
|
||||
return (VOID*)&FACS;
|
||||
}
|
||||
|
||||
|
|
@ -1,153 +0,0 @@
|
|||
/** @file
|
||||
MADT Table
|
||||
|
||||
This file contains a structure definition for the ACPI 1.0 Multiple APIC
|
||||
Description Table (MADT).
|
||||
|
||||
Copyright (c) 2008 - 2012, Intel Corporation. All rights reserved.<BR>
|
||||
SPDX-License-Identifier: BSD-2-Clause-Patent
|
||||
|
||||
**/
|
||||
|
||||
#include <IndustryStandard/Acpi.h>
|
||||
#include <Platform.h>
|
||||
|
||||
//
|
||||
// Local APIC address
|
||||
//
|
||||
#define EFI_ACPI_LOCAL_APIC_ADDRESS 0xFEE00000 // TBD
|
||||
|
||||
//
|
||||
// Multiple APIC Flags are defined in AcpiX.0.h
|
||||
//
|
||||
#define EFI_ACPI_1_0_MULTIPLE_APIC_FLAGS (EFI_ACPI_1_0_PCAT_COMPAT)
|
||||
|
||||
//
|
||||
// Define the number of each table type.
|
||||
// This is where the table layout is modified.
|
||||
//
|
||||
#define EFI_ACPI_PROCESSOR_LOCAL_APIC_COUNT 1
|
||||
#define EFI_ACPI_INTERRUPT_SOURCE_OVERRIDE_COUNT 2
|
||||
#define EFI_ACPI_IO_APIC_COUNT 1
|
||||
|
||||
//
|
||||
// Ensure proper structure formats
|
||||
//
|
||||
#pragma pack (1)
|
||||
|
||||
//
|
||||
// ACPI 1.0 MADT structure
|
||||
//
|
||||
typedef struct {
|
||||
EFI_ACPI_1_0_MULTIPLE_APIC_DESCRIPTION_TABLE_HEADER Header;
|
||||
|
||||
#if EFI_ACPI_PROCESSOR_LOCAL_APIC_COUNT > 0
|
||||
EFI_ACPI_1_0_PROCESSOR_LOCAL_APIC_STRUCTURE LocalApic[EFI_ACPI_PROCESSOR_LOCAL_APIC_COUNT];
|
||||
#endif
|
||||
|
||||
#if EFI_ACPI_INTERRUPT_SOURCE_OVERRIDE_COUNT > 0
|
||||
EFI_ACPI_1_0_INTERRUPT_SOURCE_OVERRIDE_STRUCTURE Iso[EFI_ACPI_INTERRUPT_SOURCE_OVERRIDE_COUNT];
|
||||
#endif
|
||||
|
||||
#if EFI_ACPI_IO_APIC_COUNT > 0
|
||||
EFI_ACPI_1_0_IO_APIC_STRUCTURE IoApic[EFI_ACPI_IO_APIC_COUNT];
|
||||
#endif
|
||||
|
||||
} EFI_ACPI_1_0_MULTIPLE_APIC_DESCRIPTION_TABLE;
|
||||
|
||||
#pragma pack ()
|
||||
|
||||
//
|
||||
// Multiple APIC Description Table
|
||||
//
|
||||
EFI_ACPI_1_0_MULTIPLE_APIC_DESCRIPTION_TABLE Madt = {
|
||||
{
|
||||
{
|
||||
EFI_ACPI_1_0_APIC_SIGNATURE,
|
||||
sizeof (EFI_ACPI_1_0_MULTIPLE_APIC_DESCRIPTION_TABLE),
|
||||
EFI_ACPI_1_0_MULTIPLE_APIC_DESCRIPTION_TABLE_REVISION,
|
||||
0x00, // Checksum will be updated at runtime
|
||||
{EFI_ACPI_OEM_ID},
|
||||
EFI_ACPI_OEM_TABLE_ID,
|
||||
EFI_ACPI_OEM_REVISION,
|
||||
EFI_ACPI_CREATOR_ID,
|
||||
EFI_ACPI_CREATOR_REVISION
|
||||
},
|
||||
|
||||
//
|
||||
// MADT specific fields
|
||||
//
|
||||
EFI_ACPI_LOCAL_APIC_ADDRESS,
|
||||
EFI_ACPI_1_0_MULTIPLE_APIC_FLAGS,
|
||||
},
|
||||
|
||||
//
|
||||
// Processor Local APIC Structure
|
||||
//
|
||||
{
|
||||
{
|
||||
EFI_ACPI_1_0_PROCESSOR_LOCAL_APIC, // Type
|
||||
sizeof (EFI_ACPI_1_0_PROCESSOR_LOCAL_APIC_STRUCTURE), // Length
|
||||
0x00, // Processor ID
|
||||
0x00, // Local APIC ID
|
||||
0x00000001 // Flags - Enabled by default
|
||||
}
|
||||
},
|
||||
|
||||
//
|
||||
// Interrupt Source Override Structure
|
||||
//
|
||||
|
||||
{
|
||||
{
|
||||
//
|
||||
// IRQ0=>IRQ2 Interrupt Source Override Structure
|
||||
//
|
||||
EFI_ACPI_1_0_INTERRUPT_SOURCE_OVERRIDE, // Type
|
||||
sizeof (EFI_ACPI_1_0_INTERRUPT_SOURCE_OVERRIDE_STRUCTURE),// Length
|
||||
0x00, // Bus - ISA
|
||||
0x00, // Source - IRQ0
|
||||
0x00000002, // Global System Interrupt - IRQ2
|
||||
0x0000 // Flags - Conforms to specifications of the bus
|
||||
},
|
||||
|
||||
{
|
||||
//
|
||||
// ISO (SCI Active High) Interrupt Source Override Structure
|
||||
//
|
||||
EFI_ACPI_1_0_INTERRUPT_SOURCE_OVERRIDE, // Type
|
||||
sizeof (EFI_ACPI_1_0_INTERRUPT_SOURCE_OVERRIDE_STRUCTURE),// Length
|
||||
0x00, // Bus - ISA
|
||||
0x09, // Source - IRQ0
|
||||
0x00000009, // Global System Interrupt - IRQ2
|
||||
0x000D // Flags - Level-tiggered, Active High
|
||||
}
|
||||
},
|
||||
|
||||
//
|
||||
// IO APIC Structure
|
||||
//
|
||||
{
|
||||
{
|
||||
EFI_ACPI_1_0_IO_APIC, // Type
|
||||
sizeof (EFI_ACPI_1_0_IO_APIC_STRUCTURE), // Length
|
||||
0x02, // IO APIC ID
|
||||
EFI_ACPI_RESERVED_BYTE, // Reserved
|
||||
0xFEC00000, // IO APIC Address (physical)
|
||||
0x00000000 // Global System Interrupt Base
|
||||
}
|
||||
},
|
||||
};
|
||||
|
||||
|
||||
VOID*
|
||||
ReferenceAcpiTable (
|
||||
VOID
|
||||
)
|
||||
{
|
||||
//
|
||||
// Reference the table being generated to prevent the optimizer from removing the
|
||||
// data structure from the executable
|
||||
//
|
||||
return (VOID*)&Madt;
|
||||
}
|
||||
|
|
@ -1,68 +0,0 @@
|
|||
/** @file
|
||||
Platform specific defines for constructing ACPI tables
|
||||
|
||||
Copyright (c) 2012, 2013, Red Hat, Inc.
|
||||
Copyright (c) 2008, Intel Corporation. All rights reserved.<BR>
|
||||
SPDX-License-Identifier: BSD-2-Clause-Patent
|
||||
|
||||
**/
|
||||
|
||||
#ifndef _Platform_h_INCLUDED_
|
||||
#define _Platform_h_INCLUDED_
|
||||
|
||||
#include <PiDxe.h>
|
||||
#include <IndustryStandard/Acpi.h>
|
||||
|
||||
//
|
||||
// ACPI table information used to initialize tables.
|
||||
//
|
||||
#define EFI_ACPI_OEM_ID 'O','V','M','F',' ',' ' // OEMID 6 bytes long
|
||||
#define EFI_ACPI_OEM_TABLE_ID SIGNATURE_64('O','V','M','F','E','D','K','2') // OEM table id 8 bytes long
|
||||
#define EFI_ACPI_OEM_REVISION 0x20130221
|
||||
#define EFI_ACPI_CREATOR_ID SIGNATURE_32('O','V','M','F')
|
||||
#define EFI_ACPI_CREATOR_REVISION 0x00000099
|
||||
|
||||
#define SCI_INT_VECTOR 0x0009
|
||||
#define SMI_CMD_IO_PORT 0xB2
|
||||
#define ACPI_ENABLE 0xF1
|
||||
#define ACPI_DISABLE 0xF0
|
||||
#define S4BIOS_REQ 0x00
|
||||
#define PM1a_EVT_BLK 0x0000b000
|
||||
#define PM1a_CNT_BLK 0x0000b004
|
||||
#define PM_TMR_BLK 0x0000b008
|
||||
#define GPE0_BLK 0x0000afe0
|
||||
#define PM1_EVT_LEN 0x04
|
||||
#define PM1_CNT_LEN 0x02
|
||||
#define PM_TM_LEN 0x04
|
||||
#define GPE0_BLK_LEN 0x04
|
||||
#define RESERVED 0x00
|
||||
#define P_LVL2_LAT 0x0065
|
||||
#define P_LVL3_LAT 0x03E9
|
||||
#define FLUSH_SIZE 0x0000
|
||||
#define FLUSH_STRIDE 0x0000
|
||||
#define DUTY_OFFSET 0x00
|
||||
#define DUTY_WIDTH 0x00
|
||||
#define DAY_ALRM 0x00
|
||||
#define MON_ALRM 0x00
|
||||
#define CENTURY 0x00
|
||||
#define FLAG (EFI_ACPI_2_0_WBINVD | \
|
||||
EFI_ACPI_2_0_PROC_C1 | \
|
||||
EFI_ACPI_2_0_SLP_BUTTON | \
|
||||
EFI_ACPI_2_0_RTC_S4 | \
|
||||
EFI_ACPI_2_0_RESET_REG_SUP)
|
||||
#define RESET_REG 0xCF9
|
||||
#define RESET_VALUE (BIT2 | BIT1) // PIIX3 Reset CPU + System Reset
|
||||
|
||||
//
|
||||
// Byte-aligned IO port register block initializer for
|
||||
// EFI_ACPI_2_0_GENERIC_ADDRESS_STRUCTURE
|
||||
//
|
||||
#define GAS2_IO(Base, Size) { \
|
||||
EFI_ACPI_2_0_SYSTEM_IO, /* AddressSpaceId */ \
|
||||
(Size) * 8, /* RegisterBitWidth */ \
|
||||
0, /* RegisterBitOffset */ \
|
||||
0, /* Reserved */ \
|
||||
(Base) /* Address */ \
|
||||
}
|
||||
|
||||
#endif
|
||||
|
|
@ -1,13 +0,0 @@
|
|||
/** @file
|
||||
Placeholder for runtime-generated objects.
|
||||
|
||||
This empty table provides only a header for dynamic copying and extension,
|
||||
and a trigger for QemuInstallAcpiSsdtTable().
|
||||
|
||||
Copyright (C) 2012 Red Hat, Inc.
|
||||
|
||||
SPDX-License-Identifier: BSD-2-Clause-Patent
|
||||
**/
|
||||
|
||||
DefinitionBlock ("Ssdt.aml", "SSDT", 1, "REDHAT", "OVMF ", 1) {
|
||||
}
|
||||
Loading…
Reference in New Issue