mirror of https://github.com/acidanthera/audk.git
MdeModulePkg/EhciDxe: Update async polling interval to 1ms.
Updating the async polling interval from 50ms to 1ms for better performance. Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Tian Feng <feng.tian@intel.com> Reviewed-by: Star Zeng <star.zeng@intel.com> git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@17586 6f19259b-4bc3-4df7-8a09-765794883524
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@ -2,7 +2,7 @@
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Provides some data struct used by EHCI controller driver.
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Copyright (c) 2006 - 2012, Intel Corporation. All rights reserved.<BR>
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Copyright (c) 2006 - 2015, Intel Corporation. All rights reserved.<BR>
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This program and the accompanying materials
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are licensed and made available under the terms and conditions of the BSD License
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which accompanies this distribution. The full text of the license may be found at
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@ -66,10 +66,10 @@ typedef struct _USB2_HC_DEV USB2_HC_DEV;
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//
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// Sync and Async transfer polling interval, set by experience,
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// and the unit of Async is 100us, means 50ms as interval.
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// and the unit of Async is 100us, means 1ms as interval.
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//
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#define EHC_SYNC_POLL_INTERVAL (1 * EHC_1_MILLISECOND)
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#define EHC_ASYNC_POLL_INTERVAL (50 * 10000U)
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#define EHC_ASYNC_POLL_INTERVAL EFI_TIMER_PERIOD_MILLISECONDS(1)
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//
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// EHCI debug port control status register bit definition
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