mirror of https://github.com/acidanthera/audk.git
Update IntelFspPkg according to FSP1.1.
Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: "Yao, Jiewen" <jiewen.yao@intel.com> Reviewed-by: "Rangarajan, Ravi P" <ravi.p.rangarajan@intel.com> git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@16825 6f19259b-4bc3-4df7-8a09-765794883524
This commit is contained in:
Yao, Jiewen
jyao1
parent
6cffee0cb0
commit
d5fb1edfb1
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@ -1,6 +1,7 @@
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;------------------------------------------------------------------------------
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;; @file
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; Provide FSP API entry points.
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;
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; Copyright (c) 2014, Intel Corporation. All rights reserved.<BR>
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; Copyright (c) 2014 - 2015, Intel Corporation. All rights reserved.<BR>
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; This program and the accompanying materials
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; are licensed and made available under the terms and conditions of the BSD License
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; which accompanies this distribution. The full text of the license may be found at
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@ -8,12 +9,7 @@
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;
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; THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
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; WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
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;
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; Abstract:
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;
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; Provide FSP API entry points.
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;
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;------------------------------------------------------------------------------
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;;
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.586p
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.model flat,C
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@ -29,11 +25,12 @@ INCLUDE UcodeLoad.inc
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EXTERN PcdGet32(PcdTemporaryRamBase):DWORD
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EXTERN PcdGet32(PcdTemporaryRamSize):DWORD
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EXTERN PcdGet32(PcdFspTemporaryRamSize):DWORD
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EXTERN PcdGet32(PcdFspAreaSize):DWORD
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;
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; Following functions will be provided in C
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;
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EXTERN FspImageSizeOffset:DWORD
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EXTERN SecStartup:PROC
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EXTERN FspApiCallingCheck:PROC
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@ -42,11 +39,12 @@ EXTERN FspApiCallingCheck:PROC
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;
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EXTERN GetFspBaseAddress:PROC
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EXTERN GetBootFirmwareVolumeOffset:PROC
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EXTERN PlatformTempRamInit:PROC
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EXTERN Pei2LoaderSwitchStack:PROC
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EXTERN FspSelfCheck(FspSelfCheckDflt):PROC
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EXTERN PlatformBasicInit(PlatformBasicInitDflt):PROC
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EXTERN LoadUcode(LoadUcodeDflt):PROC
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EXTERN SecPlatformInit:PROC
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EXTERN SecCarInit:PROC
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;
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; Define the data length that we saved on the stack top
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@ -55,6 +53,35 @@ DATA_LEN_OF_PER0 EQU 18h
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DATA_LEN_OF_MCUD EQU 18h
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DATA_LEN_AT_STACK_TOP EQU (DATA_LEN_OF_PER0 + DATA_LEN_OF_MCUD + 4)
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;
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; Define SSE macros
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;
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LOAD_MMX_EXT MACRO ReturnAddress, MmxRegister
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mov esi, ReturnAddress
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movd MmxRegister, esi ; save ReturnAddress into MM7
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ENDM
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CALL_MMX_EXT MACRO RoutineLabel, MmxRegister
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local ReturnAddress
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mov esi, offset ReturnAddress
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movd MmxRegister, esi ; save ReturnAddress into MM7
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jmp RoutineLabel
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ReturnAddress:
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ENDM
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RET_ESI_EXT MACRO MmxRegister
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movd esi, MmxRegister ; restore ESP from MM7
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jmp esi
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ENDM
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CALL_MMX MACRO RoutineLabel
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CALL_MMX_EXT RoutineLabel, mm7
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ENDM
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RET_ESI MACRO
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RET_ESI_EXT mm7
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ENDM
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;------------------------------------------------------------------------------
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FspSelfCheckDflt PROC NEAR PUBLIC
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; Inputs:
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@ -106,7 +133,7 @@ LoadUcodeDflt PROC NEAR PUBLIC
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;
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;
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; Save return address to EBP
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mov ebp, eax
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movd ebp, mm7
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cmp esp, 0
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jz paramerror
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@ -276,6 +303,67 @@ exit:
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LoadUcodeDflt ENDP
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EstablishStackFsp PROC NEAR PRIVATE
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; Following is the code copied from BYTFSP, need to figure out what it is doing..
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;
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; Save parameter pointer in edx
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;
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mov edx, dword ptr [esp + 4]
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;
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; Enable FSP STACK
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;
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mov esp, PcdGet32 (PcdTemporaryRamBase)
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add esp, PcdGet32 (PcdTemporaryRamSize)
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push DATA_LEN_OF_MCUD ; Size of the data region
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push 4455434Dh ; Signature of the data region 'MCUD'
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push dword ptr [edx + 12] ; Code size
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push dword ptr [edx + 8] ; Code base
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cmp edx, 0 ; Is parameter pointer valid ?
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jz InvalidMicrocodeRegion
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push dword ptr [edx + 4] ; Microcode size
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push dword ptr [edx] ; Microcode base
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jmp @F
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InvalidMicrocodeRegion:
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push 0 ; Microcode size
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push 0 ; Microcode base
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@@:
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;
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; Save API entry/exit timestamp into stack
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;
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push DATA_LEN_OF_PER0 ; Size of the data region
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push 30524550h ; Signature of the data region 'PER0'
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movd eax, xmm4
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push eax
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movd eax, xmm5
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push eax
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rdtsc
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push edx
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push eax
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;
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; Terminator for the data on stack
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;
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push 0
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;
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; Set ECX/EDX to the bootloader temporary memory range
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;
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mov ecx, PcdGet32 (PcdTemporaryRamBase)
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mov edx, ecx
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add edx, PcdGet32 (PcdTemporaryRamSize)
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sub edx, PcdGet32 (PcdFspTemporaryRamSize)
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xor eax, eax
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RET_ESI
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EstablishStackFsp ENDP
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;----------------------------------------------------------------------------
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; TempRamInit API
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;
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@ -299,17 +387,9 @@ TempRamInitApi PROC NEAR PUBLIC
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; Save timestamp into XMM4 & XMM5
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;
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rdtsc
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SAVE_EAX
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SAVE_EDX
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;
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; Check Parameter
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;
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mov eax, dword ptr [esp + 4]
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cmp eax, 0
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mov eax, 80000002h
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jz NemInitExit
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movd xmm4, edx
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movd xmm5, eax
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;
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; CPUID/DeviceID check
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;
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@ -319,82 +399,18 @@ TempRamInitApi PROC NEAR PUBLIC
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cmp eax, 0
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jnz NemInitExit
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;
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; Platform Basic Init.
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;
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mov eax, @F
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jmp PlatformBasicInit
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@@:
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cmp eax, 0
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jnz NemInitExit
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CALL_MMX SecPlatformInit
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;
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; Call Sec CAR Init
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CALL_MMX SecCarInit
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; @todo: ESP has been modified, we need to restore here.
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LOAD_REGS
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SAVE_REGS
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; Load microcode
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;
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mov eax, @F
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add esp, 4
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jmp LoadUcode
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@@:
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LOAD_ESP
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cmp eax, 0
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jnz NemInitExit
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CALL_MMX LoadUcode
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;
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; Call platform NEM init
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;
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mov eax, @F
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add esp, 4
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jmp PlatformTempRamInit
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@@:
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LOAD_ESP
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cmp eax, 0
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jnz NemInitExit
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;
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; Save parameter pointer in edx
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;
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mov edx, dword ptr [esp + 4]
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;
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; Enable FSP STACK
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;
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mov esp, PcdGet32(PcdTemporaryRamBase)
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add esp, PcdGet32(PcdTemporaryRamSize)
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push DATA_LEN_OF_MCUD ; Size of the data region
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push 4455434Dh ; Signature of the data region 'MCUD'
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push dword ptr [edx + 4] ; Microcode size
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push dword ptr [edx + 0] ; Microcode base
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push dword ptr [edx + 12] ; Code size
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push dword ptr [edx + 8] ; Code base
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;
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; Save API entry/exit timestamp into stack
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;
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push DATA_LEN_OF_PER0 ; Size of the data region
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push 30524550h ; Signature of the data region 'PER0'
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rdtsc
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push edx
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push eax
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LOAD_EAX
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LOAD_EDX
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push edx
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push eax
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;
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; Terminator for the data on stack
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;
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push 0
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;
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; Set ECX/EDX to the bootloader temporary memory range
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;
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mov ecx, PcdGet32(PcdTemporaryRamBase)
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mov edx, ecx
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add edx, PcdGet32(PcdTemporaryRamSize)
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sub edx, PcdGet32(PcdFspTemporaryRamSize)
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xor eax, eax
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CALL_MMX EstablishStackFsp
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NemInitExit:
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;
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@ -413,31 +429,106 @@ TempRamInitApi ENDP
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;
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;----------------------------------------------------------------------------
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FspInitApi PROC NEAR PUBLIC
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mov eax, 1
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jmp FspApiCommon
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FspInitApi ENDP
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;----------------------------------------------------------------------------
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; NotifyPhase API
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;
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; This FSP API will notify the FSP about the different phases in the boot
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; process
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;
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;----------------------------------------------------------------------------
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NotifyPhaseApi PROC C PUBLIC
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mov eax, 2
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jmp FspApiCommon
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NotifyPhaseApi ENDP
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;----------------------------------------------------------------------------
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; FspMemoryInit API
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;
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; This FSP API is called after TempRamInit and initializes the memory.
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;
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;----------------------------------------------------------------------------
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FspMemoryInitApi PROC NEAR PUBLIC
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mov eax, 3
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jmp FspApiCommon
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FspMemoryInitApi ENDP
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;----------------------------------------------------------------------------
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; TempRamExitApi API
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;
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; This API tears down temporary RAM
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;
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;----------------------------------------------------------------------------
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TempRamExitApi PROC C PUBLIC
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mov eax, 4
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jmp FspApiCommon
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TempRamExitApi ENDP
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;----------------------------------------------------------------------------
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; FspSiliconInit API
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;
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; This FSP API initializes the CPU and the chipset including the IO
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; controllers in the chipset to enable normal operation of these devices.
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;
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;----------------------------------------------------------------------------
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FspSiliconInitApi PROC C PUBLIC
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mov eax, 5
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jmp FspApiCommon
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FspSiliconInitApi ENDP
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;----------------------------------------------------------------------------
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; FspApiCommon API
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;
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; This is the FSP API common entry point to resume the FSP execution
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;
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;----------------------------------------------------------------------------
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FspApiCommon PROC C PUBLIC
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;
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; EAX holds the API index
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;
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;
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; Stack must be ready
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;
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push 087654321h
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pop eax
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cmp eax, 087654321h
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;
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push eax
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add esp, 4
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cmp eax, dword ptr [esp - 4]
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jz @F
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mov eax, 080000003h
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jmp exit
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@@:
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;
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; Additional check
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; Verify the calling condition
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;
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pushad
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push 1
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push eax
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call FspApiCallingCheck
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add esp, 4
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mov dword ptr [esp + 4 * 7], eax
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popad
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cmp eax, 0
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jz @F
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jmp exit
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mov dword ptr [esp + 4 * 7], eax
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popad
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ret
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@@:
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popad
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cmp eax, 1 ; FspInit API
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jz @F
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cmp eax, 3 ; FspMemoryInit API
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jz @F
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jmp Pei2LoaderSwitchStack
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@@:
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;
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; FspInit and FspMemoryInit APIs, setup the initial stack frame
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;
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;
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; Store the address in FSP which will return control to the BL
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;
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@ -452,30 +543,34 @@ FspInitApi PROC NEAR PUBLIC
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; Reserve 8 bytes for IDT save/restore
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sub esp, 8
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sidt fword ptr [esp]
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sidt fword ptr [esp]
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;
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; Setup new FSP stack
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;
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mov eax, esp
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mov edi, esp
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mov esp, PcdGet32(PcdTemporaryRamBase)
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add esp, PcdGet32(PcdTemporaryRamSize)
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sub esp, (DATA_LEN_AT_STACK_TOP + 40h)
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;
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; Save the bootloader's stack pointer
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; Pass the API Idx to SecStartup
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;
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push eax
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;
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; Pass the bootloader stack to SecStartup
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;
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push edi
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;
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; Pass entry point of the PEI core
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;
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call GetFspBaseAddress
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mov edi, FspImageSizeOffset
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mov edi, DWORD PTR [eax + edi]
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add edi, eax
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mov edi, eax
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add edi, PcdGet32 (PcdFspAreaSize)
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sub edi, 20h
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add eax, DWORD PTR [edi]
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add eax, DWORD PTR ds:[edi]
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push eax
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;
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@ -505,53 +600,9 @@ FspInitApi PROC NEAR PUBLIC
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;
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call SecStartup
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exit:
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exit:
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ret
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FspInitApi ENDP
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;----------------------------------------------------------------------------
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; NotifyPhase API
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;
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; This FSP API will notify the FSP about the different phases in the boot
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; process
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;
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;----------------------------------------------------------------------------
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NotifyPhaseApi PROC C PUBLIC
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;
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; Stack must be ready
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;
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push 087654321h
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pop eax
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cmp eax, 087654321h
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jz @F
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mov eax, 080000003h
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jmp err_exit
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@@:
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;
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; Verify the calling condition
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;
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pushad
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push 2
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call FspApiCallingCheck
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add esp, 4
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mov dword ptr [esp + 4 * 7], eax
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popad
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cmp eax, 0
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jz @F
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;
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; Error return
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;
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err_exit:
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ret
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@@:
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jmp Pei2LoaderSwitchStack
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NotifyPhaseApi ENDP
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FspApiCommon ENDP
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END
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|
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@ -1,6 +1,6 @@
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#------------------------------------------------------------------------------
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#
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# Copyright (c) 2014, Intel Corporation. All rights reserved.<BR>
|
||||
# Copyright (c) 2014 - 2015, Intel Corporation. All rights reserved.<BR>
|
||||
# This program and the accompanying materials
|
||||
# are licensed and made available under the terms and conditions of the BSD License
|
||||
# which accompanies this distribution. The full text of the license may be found at
|
||||
|
|
@ -165,7 +165,6 @@ ASM_GLOBAL ASM_PFX(_gPcd_FixedAtBuild_PcdFspTemporaryRamSize)
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#
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# Following functions will be provided in C
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#
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ASM_GLOBAL ASM_PFX(FspImageSizeOffset)
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ASM_GLOBAL ASM_PFX(SecStartup)
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ASM_GLOBAL ASM_PFX(FspApiCallingCheck)
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@ -245,7 +244,8 @@ ASM_PFX(LoadUcode):
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#
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# Save return address to EBP
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#
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movl %eax, %ebp
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movd %xmm7, %ebp
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cmpl $0x00, %esp
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jz ParamError
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movl (%esp), %eax #dword ptr [] Parameter pointer
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|
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@ -448,6 +448,71 @@ LoadUcodeExit:
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jmp *%ebp
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|
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|
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#----------------------------------------------------------------------------
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# EstablishStackFsp
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#
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# Following is the code copied from BYTFSP, need to figure out what it is doing..
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#
|
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#----------------------------------------------------------------------------
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ASM_GLOBAL ASM_PFX(EstablishStackFsp)
|
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ASM_PFX(EstablishStackFsp):
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#
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# Save parameter pointer in edx
|
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#
|
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movl 4(%esp), %edx
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|
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#
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# Enable FSP STACK
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#
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movl PcdGet32(PcdTemporaryRamBase), %esp
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addl PcdGet32(PcdTemporaryRamSize), %esp
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|
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pushl $DATA_LEN_OF_MCUD # Size of the data region
|
||||
pushl $0x4455434D # Signature of the data region 'MCUD'
|
||||
pushl 12(%edx) # Code size
|
||||
pushl 8(%edx) # Code base
|
||||
cmpl $0, %edx # Is parameter pointer valid ?
|
||||
jz InvalidMicrocodeRegion
|
||||
pushl 4(%edx) # Microcode size
|
||||
pushl (%edx) # Microcode base
|
||||
jmp EstablishStackFspExit
|
||||
|
||||
InvalidMicrocodeRegion:
|
||||
push $0 # Microcode size
|
||||
push $0 # Microcode base
|
||||
|
||||
EstablishStackFspExit:
|
||||
#
|
||||
# Save API entry/exit timestamp into stack
|
||||
#
|
||||
pushl $DATA_LEN_OF_PER0 # Size of the data region
|
||||
pushl $0x30524550 # Signature of the data region 'PER0'
|
||||
movd %xmm4, %eax
|
||||
pushl %eax
|
||||
movd %xmm5, %eax
|
||||
pushl %eax
|
||||
rdtsc
|
||||
pushl %edx
|
||||
pushl %eax
|
||||
|
||||
#
|
||||
# Terminator for the data on stack
|
||||
#
|
||||
push $0x00
|
||||
|
||||
#
|
||||
# Set ECX/EDX to the bootloader temporary memory range
|
||||
#
|
||||
movl PcdGet32 (PcdTemporaryRamBase), %ecx
|
||||
movl %ecx, %edx
|
||||
addl PcdGet32 (PcdTemporaryRamSize), %edx
|
||||
subl PcdGet32 (PcdFspTemporaryRamSize), %edx
|
||||
|
||||
xorl %eax, %eax
|
||||
|
||||
movd %mm7, %esi #RET_ESI
|
||||
jmp *%esi
|
||||
|
||||
#----------------------------------------------------------------------------
|
||||
# TempRamInit API
|
||||
#
|
||||
|
|
@ -472,103 +537,54 @@ ASM_PFX(TempRamInitApi):
|
|||
# Save timestamp into XMM4 & XMM5
|
||||
#
|
||||
rdtsc
|
||||
SAVE_EAX
|
||||
SAVE_EDX
|
||||
|
||||
#
|
||||
# Check Parameter
|
||||
#
|
||||
movl 4(%esp), %eax
|
||||
cmpl $0x00, %eax
|
||||
movl $0x80000002, %eax
|
||||
jz NemInitExit
|
||||
movd %edx, %xmm4
|
||||
movd %eax, %xmm5
|
||||
|
||||
#
|
||||
# CPUID/DeviceID check
|
||||
#
|
||||
movl $TempRamInitApiL0, %eax
|
||||
jmp ASM_PFX(FspSelfCheckDflt) # Note: ESP can not be changed.
|
||||
jmp ASM_PFX(FspSelfCheckDflt) # @note: ESP can not be changed.
|
||||
TempRamInitApiL0:
|
||||
cmpl $0x00, %eax
|
||||
jnz NemInitExit
|
||||
|
||||
#
|
||||
# Platform Basic Init.
|
||||
# Sec Platform Init
|
||||
#
|
||||
movl $TempRamInitApiL1, %eax
|
||||
jmp ASM_PFX(PlatformBasicInitDflt)
|
||||
movl $TempRamInitApiL1, %esi #CALL_MMX SecPlatformInit
|
||||
movd %mm7, %esi
|
||||
jmp ASM_PFX(SecPlatformInit)
|
||||
TempRamInitApiL1:
|
||||
cmpl $0x00, %eax
|
||||
jnz NemInitExit
|
||||
|
||||
#
|
||||
# Call Sec CAR Init
|
||||
#
|
||||
movl $TempRamInitApiL2, %esi #CALL_MMX SecCarInit
|
||||
movd %mm7, %esi
|
||||
jmp ASM_PFX(SecCarInit)
|
||||
TempRamInitApiL2:
|
||||
|
||||
# @todo: ESP has been modified, we need to restore here.
|
||||
|
||||
LOAD_REGS
|
||||
SAVE_REGS
|
||||
|
||||
#
|
||||
# Load microcode
|
||||
#
|
||||
movl $TempRamInitApiL2, %eax
|
||||
addl $0x04, %esp
|
||||
jmp LoadUcode
|
||||
|
||||
TempRamInitApiL2:
|
||||
LOAD_ESP
|
||||
cmpl $0x00, %eax
|
||||
jnz NemInitExit
|
||||
|
||||
#
|
||||
# Call platform NEM init
|
||||
#
|
||||
movl $TempRamInitApiL3, %eax
|
||||
addl $0x04, %esp
|
||||
jmp ASM_PFX(PlatformTempRamInit)
|
||||
movl $TempRamInitApiL3, %esi #CALL_MMX LoadUcode
|
||||
movd %mm7, %esi
|
||||
jmp ASM_PFX(LoadUcode)
|
||||
TempRamInitApiL3:
|
||||
subl $0x04, %esp
|
||||
cmpl $0x00, %eax
|
||||
jnz NemInitExit
|
||||
|
||||
#
|
||||
# Save parameter pointer in edx
|
||||
# EstablishStackFsp
|
||||
#
|
||||
movl 4(%esp), %edx
|
||||
|
||||
#
|
||||
# Enable FSP STACK
|
||||
#
|
||||
movl ASM_PFX(_gPcd_FixedAtBuild_PcdTemporaryRamBase), %esp
|
||||
addl ASM_PFX(_gPcd_FixedAtBuild_PcdTemporaryRamSize), %esp
|
||||
|
||||
pushl $DATA_LEN_OF_MCUD # Size of the data region
|
||||
pushl $0x4455434D # Signature of the data region 'MCUD'
|
||||
pushl 4(%edx) # Microcode size
|
||||
pushl (%edx) # Microcode base
|
||||
pushl 12(%edx) # Code size
|
||||
pushl 8(%edx) # Code base
|
||||
|
||||
#
|
||||
# Save API entry/exit timestamp into stack
|
||||
#
|
||||
pushl $DATA_LEN_OF_PER0 # Size of the data region
|
||||
pushl $0x30524550 # Signature of the data region 'PER0'
|
||||
rdtsc
|
||||
pushl %edx
|
||||
pushl %eax
|
||||
LOAD_EAX
|
||||
LOAD_EDX
|
||||
pushl %edx
|
||||
pushl %eax
|
||||
|
||||
#
|
||||
# Terminator for the data on stack
|
||||
#
|
||||
pushl $0x00
|
||||
|
||||
#
|
||||
# Set ECX/EDX to the bootloader temporary memory range
|
||||
#
|
||||
movl ASM_PFX(_gPcd_FixedAtBuild_PcdTemporaryRamBase), %ecx
|
||||
movl %ecx, %edx
|
||||
addl ASM_PFX(_gPcd_FixedAtBuild_PcdTemporaryRamSize), %edx
|
||||
subl ASM_PFX(_gPcd_FixedAtBuild_PcdFspTemporaryRamSize), %edx
|
||||
|
||||
xorl %eax, %eax
|
||||
movl $TempRamInitApiL4, %esi #CALL_MMX EstablishStackFsp
|
||||
movd %mm7, %esi
|
||||
jmp ASM_PFX(EstablishStackFsp)
|
||||
TempRamInitApiL4:
|
||||
|
||||
NemInitExit:
|
||||
#
|
||||
|
|
@ -577,7 +593,6 @@ NemInitExit:
|
|||
LOAD_REGS
|
||||
ret
|
||||
|
||||
|
||||
#----------------------------------------------------------------------------
|
||||
# FspInit API
|
||||
#
|
||||
|
|
@ -588,40 +603,113 @@ NemInitExit:
|
|||
#----------------------------------------------------------------------------
|
||||
ASM_GLOBAL ASM_PFX(FspInitApi)
|
||||
ASM_PFX(FspInitApi):
|
||||
movl $0x01, %eax
|
||||
jmp FspApiCommon
|
||||
|
||||
#----------------------------------------------------------------------------
|
||||
# NotifyPhase API
|
||||
#
|
||||
# This FSP API will notify the FSP about the different phases in the boot
|
||||
# process
|
||||
#
|
||||
#----------------------------------------------------------------------------
|
||||
ASM_GLOBAL ASM_PFX(NotifyPhaseApi)
|
||||
ASM_PFX(NotifyPhaseApi):
|
||||
movl $0x02, %eax
|
||||
jmp FspApiCommon
|
||||
|
||||
#----------------------------------------------------------------------------
|
||||
# FspMemoryInit API
|
||||
#
|
||||
# This FSP API is called after TempRamInit and initializes the memory.
|
||||
#
|
||||
#----------------------------------------------------------------------------
|
||||
ASM_GLOBAL ASM_PFX(FspMemoryInitApi)
|
||||
ASM_PFX(FspMemoryInitApi):
|
||||
movl $0x03, %eax
|
||||
jmp FspApiCommon
|
||||
|
||||
#----------------------------------------------------------------------------
|
||||
# TempRamExitApi API
|
||||
#
|
||||
# This API tears down temporary RAM
|
||||
#
|
||||
#----------------------------------------------------------------------------
|
||||
ASM_GLOBAL ASM_PFX(TempRamExitApi)
|
||||
ASM_PFX(TempRamExitApi):
|
||||
movl $0x04, %eax
|
||||
jmp FspApiCommon
|
||||
|
||||
#----------------------------------------------------------------------------
|
||||
# FspSiliconInit API
|
||||
#
|
||||
# This FSP API initializes the CPU and the chipset including the IO
|
||||
# controllers in the chipset to enable normal operation of these devices.
|
||||
#
|
||||
#----------------------------------------------------------------------------
|
||||
ASM_GLOBAL ASM_PFX(FspSiliconInitApi)
|
||||
ASM_PFX(FspSiliconInitApi):
|
||||
movl $0x05, %eax
|
||||
jmp FspApiCommon
|
||||
|
||||
#----------------------------------------------------------------------------
|
||||
# FspApiCommon API
|
||||
#
|
||||
# This is the FSP API common entry point to resume the FSP execution
|
||||
#
|
||||
#----------------------------------------------------------------------------
|
||||
ASM_GLOBAL ASM_PFX(FspApiCommon)
|
||||
ASM_PFX(FspApiCommon):
|
||||
#
|
||||
# EAX holds the API index
|
||||
#
|
||||
|
||||
#
|
||||
# Stack must be ready
|
||||
#
|
||||
pushl $0x087654321
|
||||
popl %eax
|
||||
cmpl $0x087654321, %eax
|
||||
jz FspInitApiL0
|
||||
#
|
||||
pushl %eax
|
||||
addl $0x04, %esp
|
||||
cmpl -4(%esp), %eax
|
||||
jz FspApiCommonL0
|
||||
movl $0x080000003, %eax
|
||||
jmp FspInitApiexit
|
||||
jmp FspApiCommonExit
|
||||
|
||||
FspInitApiL0:
|
||||
FspApiCommonL0:
|
||||
#
|
||||
# Additional check
|
||||
# Verify the calling condition
|
||||
#
|
||||
pusha
|
||||
pushl $0x01
|
||||
pushal
|
||||
pushl %eax
|
||||
call ASM_PFX(FspApiCallingCheck)
|
||||
addl $0x04, %esp
|
||||
movl %eax, 28(%esp)
|
||||
popa
|
||||
cmpl $0x00, %eax
|
||||
jz FspInitApiL1
|
||||
jmp FspInitApiexit
|
||||
jz FspApiCommonL1
|
||||
movl %eax, 0x1C(%esp) # mov dword ptr [esp + 4 * 7], eax
|
||||
popal
|
||||
ret
|
||||
|
||||
FspInitApiL1:
|
||||
FspApiCommonL1:
|
||||
popal
|
||||
cmpl $0x01, %eax # FspInit API
|
||||
jz FspApiCommonL2
|
||||
cmpl $0x03, %eax # FspMemoryInit API
|
||||
jz FspApiCommonL2
|
||||
jmp Pei2LoaderSwitchStack
|
||||
|
||||
FspApiCommonL2:
|
||||
#
|
||||
# FspInit and FspMemoryInit APIs, setup the initial stack frame
|
||||
#
|
||||
|
||||
#
|
||||
# Store the address in FSP which will return control to the BL
|
||||
#
|
||||
pushl $FspInitApiexit
|
||||
pushl $FspApiCommonExit
|
||||
|
||||
#
|
||||
# Create a Task Frame in the stack for the Boot Loader
|
||||
#
|
||||
pushfl # 2 pushf for 4 byte alignment
|
||||
pushfl # 2 pushf for 4 byte alignment
|
||||
cli
|
||||
pushal
|
||||
|
||||
|
|
@ -634,25 +722,30 @@ FspInitApiL1:
|
|||
#
|
||||
# Setup new FSP stack
|
||||
#
|
||||
movl %esp, %eax
|
||||
movl ASM_PFX(_gPcd_FixedAtBuild_PcdTemporaryRamBase), %esp
|
||||
addl ASM_PFX(_gPcd_FixedAtBuild_PcdTemporaryRamSize), %esp
|
||||
movl %esp, %edi
|
||||
movl PcdGet32(PcdTemporaryRamBase), %esp
|
||||
addl PcdGet32(PcdTemporaryRamSize), %esp
|
||||
subl $(DATA_LEN_AT_STACK_TOP + 0x40), %esp
|
||||
|
||||
# Save the bootloader's stack pointer
|
||||
#
|
||||
pushl %eax
|
||||
# Pass the API Idx to SecStartup
|
||||
#
|
||||
pushl %eax
|
||||
|
||||
#
|
||||
# Pass the bootloader stack to SecStartup
|
||||
#
|
||||
pushl %edi
|
||||
|
||||
#
|
||||
# Pass entry point of the PEI core
|
||||
#
|
||||
call ASM_PFX(GetFspBaseAddress)
|
||||
movl ASM_PFX(FspImageSizeOffset), %edi
|
||||
movl (%eax, %edi), %edi
|
||||
addl %eax, %edi
|
||||
subl $0x20, %edi
|
||||
addl (%edi), %eax
|
||||
pushl %eax
|
||||
call ASM_PFX(GetFspBaseAddress)
|
||||
movl %eax, %edi
|
||||
addl PcdGet32(PcdFspAreaSize), %edi
|
||||
subl $0x20, %edi
|
||||
addl %ds:(%edi), %eax
|
||||
pushl %eax
|
||||
|
||||
#
|
||||
# Pass BFV into the PEI Core
|
||||
|
|
@ -661,72 +754,27 @@ FspInitApiL1:
|
|||
# PcdFspAreaBaseAddress are the same. For FSP with mulitple FVs,
|
||||
# they are different. The code below can handle both cases.
|
||||
#
|
||||
call ASM_PFX(GetFspBaseAddress)
|
||||
movl %eax , %edi
|
||||
call ASM_PFX(GetBootFirmwareVolumeOffset)
|
||||
addl %edi ,%eax
|
||||
pushl %eax
|
||||
call ASM_PFX(GetFspBaseAddress)
|
||||
movl %eax, %edi
|
||||
call ASM_PFX(GetBootFirmwareVolumeOffset)
|
||||
addl %edi, %eax
|
||||
pushl %eax
|
||||
|
||||
#
|
||||
# Pass stack base and size into the PEI Core
|
||||
#
|
||||
movl ASM_PFX(_gPcd_FixedAtBuild_PcdTemporaryRamBase), %eax
|
||||
addl ASM_PFX(_gPcd_FixedAtBuild_PcdTemporaryRamSize), %eax
|
||||
subl ASM_PFX(_gPcd_FixedAtBuild_PcdFspTemporaryRamSize), %eax
|
||||
pushl %eax
|
||||
pushl ASM_PFX(_gPcd_FixedAtBuild_PcdFspTemporaryRamSize)
|
||||
movl PcdGet32(PcdTemporaryRamBase), %eax
|
||||
addl PcdGet32(PcdTemporaryRamSize), %eax
|
||||
subl PcdGet32(PcdFspTemporaryRamSize), %eax
|
||||
pushl %eax
|
||||
pushl PcdGet32(PcdFspTemporaryRamSize)
|
||||
|
||||
#
|
||||
# Pass Control into the PEI Core
|
||||
#
|
||||
call ASM_PFX(SecStartup)
|
||||
|
||||
FspInitApiexit:
|
||||
FspApiCommonExit:
|
||||
ret
|
||||
|
||||
|
||||
#----------------------------------------------------------------------------
|
||||
# NotifyPhase API
|
||||
#
|
||||
# This FSP API will notify the FSP about the different phases in the boot
|
||||
# process
|
||||
#
|
||||
#----------------------------------------------------------------------------
|
||||
ASM_GLOBAL ASM_PFX(NotifyPhaseApi)
|
||||
ASM_PFX(NotifyPhaseApi):
|
||||
#
|
||||
# Stack must be ready
|
||||
#
|
||||
pushl $0x0087654321
|
||||
popl %eax
|
||||
cmpl $0x087654321, %eax
|
||||
jz NotifyPhaseApiL0
|
||||
movl $0x080000003, %eax
|
||||
jmp NotifyPhaseApiErrExit
|
||||
|
||||
NotifyPhaseApiL0:
|
||||
#
|
||||
# Verify the calling condition
|
||||
#
|
||||
pusha
|
||||
pushl $0x02
|
||||
call ASM_PFX(FspApiCallingCheck)
|
||||
addl $0x04, %esp
|
||||
movl %eax, 28(%esp)
|
||||
popa
|
||||
|
||||
cmpl $0x00, %eax
|
||||
jz NotifyPhaseApiL1
|
||||
|
||||
#
|
||||
# Error return
|
||||
#
|
||||
NotifyPhaseApiErrExit:
|
||||
ret
|
||||
|
||||
NotifyPhaseApiL1:
|
||||
jmp ASM_PFX(Pei2LoaderSwitchStack)
|
||||
|
||||
|
||||
|
||||
#END
|
||||
|
|
|
|||
|
|
@ -1,6 +1,6 @@
|
|||
#------------------------------------------------------------------------------
|
||||
#
|
||||
# Copyright (c) 2014, Intel Corporation. All rights reserved.<BR>
|
||||
# Copyright (c) 2014 - 2015, Intel Corporation. All rights reserved.<BR>
|
||||
# This program and the accompanying materials
|
||||
# are licensed and made available under the terms and conditions of the BSD License
|
||||
# which accompanies this distribution. The full text of the license may be found at
|
||||
|
|
@ -58,7 +58,7 @@ ASM_PFX(InitializeFloatingPointUnits):
|
|||
# Set OSFXSR bit 9 in CR4
|
||||
#
|
||||
movl %cr4, %eax
|
||||
or BIT9, %eax
|
||||
orl $BIT9, %eax
|
||||
movl %eax, %cr4
|
||||
|
||||
#
|
||||
|
|
|
|||
|
|
@ -1,6 +1,6 @@
|
|||
#------------------------------------------------------------------------------
|
||||
#
|
||||
# Copyright (c) 2014, Intel Corporation. All rights reserved.<BR>
|
||||
# Copyright (c) 2014 - 2015, Intel Corporation. All rights reserved.<BR>
|
||||
# This program and the accompanying materials
|
||||
# are licensed and made available under the terms and conditions of the BSD License
|
||||
# which accompanies this distribution. The full text of the license may be found at
|
||||
|
|
@ -28,12 +28,12 @@ ASM_GLOBAL ASM_PFX(SecSwitchStack)
|
|||
ASM_GLOBAL ASM_PFX(SecSwitchStack)
|
||||
ASM_PFX(SecSwitchStack):
|
||||
#
|
||||
# Save three register: eax, ebx, ecx
|
||||
# Save four registers: eax, ebx, ecx, edx
|
||||
#
|
||||
push %eax
|
||||
push %ebx
|
||||
push %ecx
|
||||
push %edx
|
||||
pushl %eax
|
||||
pushl %ebx
|
||||
pushl %ecx
|
||||
pushl %edx
|
||||
|
||||
#
|
||||
# !!CAUTION!! this function address's is pushed into stack after
|
||||
|
|
@ -67,7 +67,6 @@ ASM_PFX(SecSwitchStack):
|
|||
#
|
||||
# Fixup the ebp point to permenent memory
|
||||
#
|
||||
|
||||
movl %ebp, %eax
|
||||
subl %ebx, %eax
|
||||
addl %ecx, %eax
|
||||
|
|
@ -76,13 +75,12 @@ ASM_PFX(SecSwitchStack):
|
|||
#
|
||||
# Fixup callee's ebp point for PeiDispatch
|
||||
#
|
||||
movl %ebp, %eax
|
||||
subl %ebx, %eax
|
||||
addl %ecx, %eax
|
||||
movl %eax, %ebp # From now, ebp is pointed to permenent memory
|
||||
|
||||
pop %edx
|
||||
pop %ecx
|
||||
pop %ebx
|
||||
pop %eax
|
||||
# movl %ebp, %eax
|
||||
# subl %ebx, %eax
|
||||
# addl %ecx, %eax
|
||||
# movl %eax, %ebp # From now, ebp is pointed to permenent memory
|
||||
popl %edx
|
||||
popl %ecx
|
||||
popl %ebx
|
||||
popl %eax
|
||||
ret
|
||||
|
|
@ -1,6 +1,6 @@
|
|||
/** @file
|
||||
|
||||
Copyright (c) 2014, Intel Corporation. All rights reserved.<BR>
|
||||
Copyright (c) 2014 - 2015, Intel Corporation. All rights reserved.<BR>
|
||||
This program and the accompanying materials
|
||||
are licensed and made available under the terms and conditions of the BSD License
|
||||
which accompanies this distribution. The full text of the license may be found at
|
||||
|
|
@ -13,8 +13,6 @@
|
|||
|
||||
#include "SecFsp.h"
|
||||
|
||||
UINT32 FspImageSizeOffset = FSP_INFO_HEADER_OFF + OFFSET_IN_FSP_INFO_HEADER(ImageSize);
|
||||
|
||||
/**
|
||||
|
||||
Calculate the FSP IDT gate descriptor.
|
||||
|
|
@ -140,13 +138,15 @@ SecGetPlatformData (
|
|||
It needs to be done as soon as possible after the stack is setup.
|
||||
|
||||
@param[in,out] PeiFspData Pointer of the FSP global data.
|
||||
@param[in] BootFirmwareVolume Point to the address of BootFirmwareVolume in stack.
|
||||
@param[in] BootloaderStack Bootloader stack.
|
||||
@param[in] ApiIdx The index of the FSP API.
|
||||
|
||||
**/
|
||||
VOID
|
||||
FspGlobalDataInit (
|
||||
IN OUT FSP_GLOBAL_DATA *PeiFspData,
|
||||
IN VOID **BootFirmwareVolume
|
||||
IN UINT32 BootloaderStack,
|
||||
IN UINT8 ApiIdx
|
||||
)
|
||||
{
|
||||
VOID *UpdDataRgnPtr;
|
||||
|
|
@ -162,7 +162,7 @@ FspGlobalDataInit (
|
|||
ZeroMem ((VOID *)PeiFspData, sizeof(FSP_GLOBAL_DATA));
|
||||
|
||||
PeiFspData->Signature = FSP_GLOBAL_DATA_SIGNATURE;
|
||||
PeiFspData->CoreStack = *(UINTN *)(BootFirmwareVolume + 2);
|
||||
PeiFspData->CoreStack = BootloaderStack;
|
||||
PeiFspData->PerfIdx = 2;
|
||||
|
||||
SetFspMeasurePoint (FSP_PERF_ID_API_FSPINIT_ENTRY);
|
||||
|
|
@ -174,6 +174,11 @@ FspGlobalDataInit (
|
|||
PeiFspData->FspInfoHeader = (FSP_INFO_HEADER *)(GetFspBaseAddress() + FSP_INFO_HEADER_OFF);
|
||||
SecGetPlatformData (PeiFspData);
|
||||
|
||||
//
|
||||
// Set API calling mode
|
||||
//
|
||||
SetFspApiCallingMode (ApiIdx == 1 ? 0 : 1);
|
||||
|
||||
//
|
||||
// Initialize UPD pointer.
|
||||
//
|
||||
|
|
@ -202,8 +207,13 @@ FspGlobalDataInit (
|
|||
}
|
||||
ImageId[Idx] = 0;
|
||||
|
||||
DEBUG ((DEBUG_INFO | DEBUG_INIT, "\n============= PEIM FSP (%a 0x%08X) =============\n", \
|
||||
ImageId, PeiFspData->FspInfoHeader->ImageRevision));
|
||||
DEBUG ((DEBUG_INFO | DEBUG_INIT, "\n============= PEIM FSP v1.%x (%a v%x.%x.%x.%x) =============\n", \
|
||||
PeiFspData->FspInfoHeader->HeaderRevision - 1, \
|
||||
ImageId, \
|
||||
(PeiFspData->FspInfoHeader->ImageRevision >> 24) & 0xff, \
|
||||
(PeiFspData->FspInfoHeader->ImageRevision >> 16) & 0xff, \
|
||||
(PeiFspData->FspInfoHeader->ImageRevision >> 8) & 0xff, \
|
||||
(PeiFspData->FspInfoHeader->ImageRevision >> 0) & 0xff));
|
||||
|
||||
}
|
||||
|
||||
|
|
@ -260,6 +270,35 @@ FspApiCallingCheck (
|
|||
Status = EFI_UNSUPPORTED;
|
||||
}
|
||||
}
|
||||
} else if (ApiIdx == 3) {
|
||||
//
|
||||
// FspMemoryInit check
|
||||
//
|
||||
if ((UINT32)FspData != 0xFFFFFFFF) {
|
||||
Status = EFI_UNSUPPORTED;
|
||||
}
|
||||
} else if (ApiIdx == 4) {
|
||||
//
|
||||
// TempRamExit check
|
||||
//
|
||||
if ((FspData == NULL) || ((UINT32)FspData == 0xFFFFFFFF)) {
|
||||
Status = EFI_UNSUPPORTED;
|
||||
} else {
|
||||
if (FspData->Signature != FSP_GLOBAL_DATA_SIGNATURE) {
|
||||
Status = EFI_UNSUPPORTED;
|
||||
}
|
||||
}
|
||||
} else if (ApiIdx == 5) {
|
||||
//
|
||||
// FspSiliconInit check
|
||||
//
|
||||
if ((FspData == NULL) || ((UINT32)FspData == 0xFFFFFFFF)) {
|
||||
Status = EFI_UNSUPPORTED;
|
||||
} else {
|
||||
if (FspData->Signature != FSP_GLOBAL_DATA_SIGNATURE) {
|
||||
Status = EFI_UNSUPPORTED;
|
||||
}
|
||||
}
|
||||
} else {
|
||||
Status = EFI_UNSUPPORTED;
|
||||
}
|
||||
|
|
|
|||
|
|
@ -1,6 +1,6 @@
|
|||
/** @file
|
||||
|
||||
Copyright (c) 2014, Intel Corporation. All rights reserved.<BR>
|
||||
Copyright (c) 2014 - 2015, Intel Corporation. All rights reserved.<BR>
|
||||
This program and the accompanying materials
|
||||
are licensed and made available under the terms and conditions of the BSD License
|
||||
which accompanies this distribution. The full text of the license may be found at
|
||||
|
|
@ -47,13 +47,15 @@ FspGetExceptionHandler(
|
|||
It needs to be done as soon as possible after the stack is setup.
|
||||
|
||||
@param[in,out] PeiFspData Pointer of the FSP global data.
|
||||
@param[in] BootFirmwareVolume Point to the address of BootFirmwareVolume in stack.
|
||||
@param[in] BootloaderStack Bootloader stack.
|
||||
@param[in] ApiIdx The index of the FSP API.
|
||||
|
||||
**/
|
||||
VOID
|
||||
FspGlobalDataInit (
|
||||
IN OUT FSP_GLOBAL_DATA *PeiFspData,
|
||||
IN VOID **BootFirmwareVolume
|
||||
IN UINT32 BootloaderStack,
|
||||
IN UINT8 ApiIdx
|
||||
);
|
||||
|
||||
|
||||
|
|
|
|||
|
|
@ -1,6 +1,6 @@
|
|||
/** @file
|
||||
|
||||
Copyright (c) 2014, Intel Corporation. All rights reserved.<BR>
|
||||
Copyright (c) 2014 - 2015, Intel Corporation. All rights reserved.<BR>
|
||||
This program and the accompanying materials
|
||||
are licensed and made available under the terms and conditions of the BSD License
|
||||
which accompanies this distribution. The full text of the license may be found at
|
||||
|
|
@ -41,7 +41,9 @@ UINT64 mIdtEntryTemplate = 0xffff8e000008ffe4ULL;
|
|||
@param[in] SizeOfRam Size of the temporary memory available for use.
|
||||
@param[in] TempRamBase Base address of tempory ram
|
||||
@param[in] BootFirmwareVolume Base address of the Boot Firmware Volume.
|
||||
@param[in] PeiCoreEntry Pei Core entrypoint.
|
||||
@param[in] PeiCore PeiCore entry point.
|
||||
@param[in] BootloaderStack Bootloader stack.
|
||||
@param[in] ApiIdx the index of API
|
||||
|
||||
@return This function never returns.
|
||||
|
||||
|
|
@ -52,7 +54,9 @@ SecStartup (
|
|||
IN UINT32 SizeOfRam,
|
||||
IN UINT32 TempRamBase,
|
||||
IN VOID *BootFirmwareVolume,
|
||||
IN UINTN PeiCoreEntry
|
||||
IN PEI_CORE_ENTRY PeiCore,
|
||||
IN UINT32 BootloaderStack,
|
||||
IN UINT32 ApiIdx
|
||||
)
|
||||
{
|
||||
EFI_SEC_PEI_HAND_OFF SecCoreData;
|
||||
|
|
@ -60,7 +64,6 @@ SecStartup (
|
|||
SEC_IDT_TABLE IdtTableInStack;
|
||||
UINT32 Index;
|
||||
FSP_GLOBAL_DATA PeiFspData;
|
||||
PEI_CORE_ENTRY PeiCore;
|
||||
UINT64 ExceptionHandler;
|
||||
|
||||
//
|
||||
|
|
@ -103,7 +106,7 @@ SecStartup (
|
|||
//
|
||||
// Iniitalize the global FSP data region
|
||||
//
|
||||
FspGlobalDataInit (&PeiFspData, &BootFirmwareVolume);
|
||||
FspGlobalDataInit (&PeiFspData, BootloaderStack, (UINT8)ApiIdx);
|
||||
|
||||
//
|
||||
// Update the base address and length of Pei temporary memory
|
||||
|
|
@ -120,8 +123,7 @@ SecStartup (
|
|||
|
||||
//
|
||||
// Call PeiCore Entry
|
||||
//
|
||||
PeiCore = (PEI_CORE_ENTRY)(PeiCoreEntry);
|
||||
//
|
||||
PeiCore (&SecCoreData, mPeiSecPlatformInformationPpi);
|
||||
|
||||
//
|
||||
|
|
|
|||
|
|
@ -1,6 +1,6 @@
|
|||
/** @file
|
||||
|
||||
Copyright (c) 2014, Intel Corporation. All rights reserved.<BR>
|
||||
Copyright (c) 2014 - 2015, Intel Corporation. All rights reserved.<BR>
|
||||
This program and the accompanying materials
|
||||
are licensed and made available under the terms and conditions of the BSD License
|
||||
which accompanies this distribution. The full text of the license may be found at
|
||||
|
|
@ -107,7 +107,8 @@ InitializeFloatingPointUnits (
|
|||
@param[in] SizeOfRam Size of the temporary memory available for use.
|
||||
@param[in] TempRamBase Base address of tempory ram
|
||||
@param[in] BootFirmwareVolume Base address of the Boot Firmware Volume.
|
||||
@param[in] PeiCoreEntry Pei Core entrypoint.
|
||||
@param[in] PeiCore PeiCore entry point.
|
||||
@param[in] BootloaderStack Bootloader stack.
|
||||
|
||||
@return This function never returns.
|
||||
|
||||
|
|
@ -118,7 +119,9 @@ SecStartup (
|
|||
IN UINT32 SizeOfRam,
|
||||
IN UINT32 TempRamBase,
|
||||
IN VOID *BootFirmwareVolume,
|
||||
IN UINTN PeiCoreEntry
|
||||
IN PEI_CORE_ENTRY PeiCore,
|
||||
IN UINT32 BootloaderStack,
|
||||
IN UINT32 ApiIdx
|
||||
);
|
||||
|
||||
/**
|
||||
|
|
|
|||
|
|
@ -2,7 +2,7 @@
|
|||
Intel FSP API definition from Intel Firmware Support Package External
|
||||
Architecture Specification, April 2014, revision 001.
|
||||
|
||||
Copyright (c) 2014, Intel Corporation. All rights reserved.<BR>
|
||||
Copyright (c) 2014 - 2015, Intel Corporation. All rights reserved.<BR>
|
||||
This program and the accompanying materials
|
||||
are licensed and made available under the terms and conditions of the BSD License
|
||||
which accompanies this distribution. The full text of the license may be found at
|
||||
|
|
@ -16,7 +16,7 @@
|
|||
#ifndef _FSP_API_H_
|
||||
#define _FSP_API_H_
|
||||
|
||||
typedef UINT32 FSP_STATUS;
|
||||
#define FSP_STATUS EFI_STATUS
|
||||
#define FSPAPI EFIAPI
|
||||
|
||||
/**
|
||||
|
|
@ -29,7 +29,7 @@ typedef UINT32 FSP_STATUS;
|
|||
typedef
|
||||
VOID
|
||||
(* CONTINUATION_PROC) (
|
||||
IN FSP_STATUS Status,
|
||||
IN EFI_STATUS Status,
|
||||
IN VOID *HobListPtr
|
||||
);
|
||||
|
||||
|
|
@ -107,6 +107,21 @@ typedef struct {
|
|||
FSP_INIT_PHASE Phase;
|
||||
} NOTIFY_PHASE_PARAMS;
|
||||
|
||||
typedef struct {
|
||||
///
|
||||
/// Non-volatile storage buffer pointer.
|
||||
///
|
||||
VOID *NvsBufferPtr;
|
||||
///
|
||||
/// Runtime buffer pointer
|
||||
///
|
||||
VOID *RtBufferPtr;
|
||||
///
|
||||
/// Pointer to the HOB data structure defined in the PI specification
|
||||
///
|
||||
VOID **HobListPtr;
|
||||
} FSP_MEMORY_INIT_PARAMS;
|
||||
|
||||
#pragma pack()
|
||||
|
||||
/**
|
||||
|
|
@ -126,11 +141,11 @@ typedef struct {
|
|||
|
||||
@param[in] TempRaminitParamPtr Address pointer to the FSP_TEMP_RAM_INIT_PARAMS structure.
|
||||
|
||||
@retval FSP_SUCCESS Temp RAM was initialized successfully.
|
||||
@retval FSP_INVALID_PARAMETER Input parameters are invalid..
|
||||
@retval FSP_NOT_FOUND No valid microcode was found in the microcode region.
|
||||
@retval FSP_UNSUPPORTED The FSP calling conditions were not met.
|
||||
@retval FSP_DEVICE_ERROR Temp RAM initialization failed.
|
||||
@retval EFI_SUCCESS Temp RAM was initialized successfully.
|
||||
@retval EFI_INVALID_PARAMETER Input parameters are invalid..
|
||||
@retval EFI_NOT_FOUND No valid microcode was found in the microcode region.
|
||||
@retval EFI_UNSUPPORTED The FSP calling conditions were not met.
|
||||
@retval EFI_DEVICE_ERROR Temp RAM initialization failed.
|
||||
|
||||
If this function is successful, the FSP initializes the ECX and EDX registers to point to
|
||||
a temporary but writeable memory range available to the boot loader and returns with
|
||||
|
|
@ -140,8 +155,8 @@ typedef struct {
|
|||
to the end of this returned range so that it can be used as a standard stack.
|
||||
**/
|
||||
typedef
|
||||
FSP_STATUS
|
||||
(FSPAPI *FSP_TEMP_RAM_INIT) (
|
||||
EFI_STATUS
|
||||
(EFIAPI *FSP_TEMP_RAM_INIT) (
|
||||
IN FSP_TEMP_RAM_INIT_PARAMS *FspTempRamInitPtr
|
||||
);
|
||||
|
||||
|
|
@ -158,17 +173,19 @@ FSP_STATUS
|
|||
|
||||
@param[in] FspInitParamPtr Address pointer to the FSP_INIT_PARAMS structure.
|
||||
|
||||
@retval FSP_SUCCESS FSP execution environment was initialized successfully.
|
||||
@retval FSP_INVALID_PARAMETER Input parameters are invalid.
|
||||
@retval FSP_UNSUPPORTED The FSP calling conditions were not met.
|
||||
@retval FSP_DEVICE_ERROR FSP initialization failed.
|
||||
@retval EFI_SUCCESS FSP execution environment was initialized successfully.
|
||||
@retval EFI_INVALID_PARAMETER Input parameters are invalid.
|
||||
@retval EFI_UNSUPPORTED The FSP calling conditions were not met.
|
||||
@retval EFI_DEVICE_ERROR FSP initialization failed.
|
||||
**/
|
||||
typedef
|
||||
FSP_STATUS
|
||||
(FSPAPI *FSP_FSP_INIT) (
|
||||
EFI_STATUS
|
||||
(EFIAPI *FSP_INIT) (
|
||||
IN OUT FSP_INIT_PARAMS *FspInitParamPtr
|
||||
);
|
||||
|
||||
#define FSP_FSP_INIT FSP_INIT
|
||||
|
||||
/**
|
||||
This FSP API is used to notify the FSP about the different phases in the boot process.
|
||||
This allows the FSP to take appropriate actions as needed during different initialization
|
||||
|
|
@ -179,31 +196,107 @@ FSP_STATUS
|
|||
|
||||
@param[in] NotifyPhaseParamPtr Address pointer to the NOTIFY_PHASE_PRAMS
|
||||
|
||||
@retval FSP_SUCCESS The notification was handled successfully.
|
||||
@retval FSP_UNSUPPORTED The notification was not called in the proper order.
|
||||
@retval FSP_INVALID_PARAMETER The notification code is invalid.
|
||||
@retval EFI_SUCCESS The notification was handled successfully.
|
||||
@retval EFI_UNSUPPORTED The notification was not called in the proper order.
|
||||
@retval EFI_INVALID_PARAMETER The notification code is invalid.
|
||||
**/
|
||||
typedef
|
||||
FSP_STATUS
|
||||
(FSPAPI *FSP_NOTIFY_PHASE) (
|
||||
EFI_STATUS
|
||||
(EFIAPI *FSP_NOTIFY_PHASE) (
|
||||
IN NOTIFY_PHASE_PARAMS *NotifyPhaseParamPtr
|
||||
);
|
||||
|
||||
/**
|
||||
This FSP API is called after TempRamInit and initializes the memory.
|
||||
This FSP API accepts a pointer to a data structure that will be platform dependent
|
||||
and defined for each FSP binary. This will be documented in Integration guide with
|
||||
each FSP release.
|
||||
After FspMemInit completes its execution, it passes the pointer to the HobList and
|
||||
returns to the boot loader from where it was called. Bootloader is responsible to
|
||||
migrate it’s stack and data to Memory.
|
||||
FspMemoryInit, TempRamExit and FspSiliconInit APIs provide an alternate method to
|
||||
complete the silicon initialization and provides bootloader an opportunity to get
|
||||
control after system memory is available and before the temporary RAM is torn down.
|
||||
These APIs are mutually exclusive to the FspInit API.
|
||||
|
||||
@param[in][out] FspMemoryInitParamPtr Address pointer to the FSP_MEMORY_INIT_PARAMS
|
||||
structure.
|
||||
|
||||
@retval EFI_SUCCESS FSP execution environment was initialized successfully.
|
||||
@retval EFI_INVALID_PARAMETER Input parameters are invalid.
|
||||
@retval EFI_UNSUPPORTED The FSP calling conditions were not met.
|
||||
@retval EFI_DEVICE_ERROR FSP initialization failed.
|
||||
**/
|
||||
typedef
|
||||
EFI_STATUS
|
||||
(EFIAPI *FSP_MEMORY_INIT) (
|
||||
IN OUT FSP_MEMORY_INIT_PARAMS *FspMemoryInitParamPtr
|
||||
);
|
||||
|
||||
|
||||
/**
|
||||
This FSP API is called after FspMemoryInit API. This FSP API tears down the temporary
|
||||
memory setup by TempRamInit API. This FSP API accepts a pointer to a data structure
|
||||
that will be platform dependent and defined for each FSP binary. This will be
|
||||
documented in Integration Guide.
|
||||
FspMemoryInit, TempRamExit and FspSiliconInit APIs provide an alternate method to
|
||||
complete the silicon initialization and provides bootloader an opportunity to get
|
||||
control after system memory is available and before the temporary RAM is torn down.
|
||||
These APIs are mutually exclusive to the FspInit API.
|
||||
|
||||
@param[in][out] TempRamExitParamPtr Pointer to the Temp Ram Exit parameters structure.
|
||||
This structure is normally defined in the Integration Guide.
|
||||
And if it is not defined in the Integration Guide, pass NULL.
|
||||
|
||||
@retval EFI_SUCCESS FSP execution environment was initialized successfully.
|
||||
@retval EFI_INVALID_PARAMETER Input parameters are invalid.
|
||||
@retval EFI_UNSUPPORTED The FSP calling conditions were not met.
|
||||
@retval EFI_DEVICE_ERROR FSP initialization failed.
|
||||
**/
|
||||
typedef
|
||||
EFI_STATUS
|
||||
(EFIAPI *FSP_TEMP_RAM_EXIT) (
|
||||
IN OUT VOID *TempRamExitParamPtr
|
||||
);
|
||||
|
||||
|
||||
/**
|
||||
This FSP API is called after TempRamExit API.
|
||||
FspMemoryInit, TempRamExit and FspSiliconInit APIs provide an alternate method to complete the
|
||||
silicon initialization.
|
||||
These APIs are mutually exclusive to the FspInit API.
|
||||
|
||||
@param[in][out] FspSiliconInitParamPtr Pointer to the Silicon Init parameters structure.
|
||||
This structure is normally defined in the Integration Guide.
|
||||
And if it is not defined in the Integration Guide, pass NULL.
|
||||
|
||||
@retval EFI_SUCCESS FSP execution environment was initialized successfully.
|
||||
@retval EFI_INVALID_PARAMETER Input parameters are invalid.
|
||||
@retval EFI_UNSUPPORTED The FSP calling conditions were not met.
|
||||
@retval EFI_DEVICE_ERROR FSP initialization failed.
|
||||
**/
|
||||
typedef
|
||||
EFI_STATUS
|
||||
(EFIAPI *FSP_SILICON_INIT) (
|
||||
IN OUT VOID *FspSiliconInitParamPtr
|
||||
);
|
||||
|
||||
///
|
||||
/// FSP API Return Status Code
|
||||
///
|
||||
#define FSP_SUCCESS 0x00000000
|
||||
#define FSP_INVALID_PARAMETER 0x80000002
|
||||
#define FSP_UNSUPPORTED 0x80000003
|
||||
#define FSP_NOT_READY 0x80000006
|
||||
#define FSP_DEVICE_ERROR 0x80000007
|
||||
#define FSP_OUT_OF_RESOURCES 0x80000009
|
||||
#define FSP_VOLUME_CORRUPTED 0x8000000A
|
||||
#define FSP_NOT_FOUND 0x8000000E
|
||||
#define FSP_TIMEOUT 0x80000012
|
||||
#define FSP_ABORTED 0x80000015
|
||||
#define FSP_INCOMPATIBLE_VERSION 0x80000010
|
||||
#define FSP_SECURITY_VIOLATION 0x8000001A
|
||||
#define FSP_CRC_ERROR 0x8000001B
|
||||
/// FSP API Return Status Code for backward compatibility with v1.0
|
||||
///@{
|
||||
#define FSP_SUCCESS EFI_SUCCESS
|
||||
#define FSP_INVALID_PARAMETER EFI_INVALID_PARAMETER
|
||||
#define FSP_UNSUPPORTED EFI_UNSUPPORTED
|
||||
#define FSP_NOT_READY EFI_NOT_READY
|
||||
#define FSP_DEVICE_ERROR EFI_DEVICE_ERROR
|
||||
#define FSP_OUT_OF_RESOURCES EFI_OUT_OF_RESOURCES
|
||||
#define FSP_VOLUME_CORRUPTED EFI_VOLUME_CORRUPTED
|
||||
#define FSP_NOT_FOUND EFI_NOT_FOUND
|
||||
#define FSP_TIMEOUT EFI_TIMEOUT
|
||||
#define FSP_ABORTED EFI_ABORTED
|
||||
#define FSP_INCOMPATIBLE_VERSION EFI_INCOMPATIBLE_VERSION
|
||||
#define FSP_SECURITY_VIOLATION EFI_SECURITY_VIOLATION
|
||||
#define FSP_CRC_ERROR EFI_CRC_ERROR
|
||||
///@}
|
||||
|
||||
#endif
|
||||
|
|
|
|||
|
|
@ -2,7 +2,7 @@
|
|||
Intel FSP Info Header definition from Intel Firmware Support Package External
|
||||
Architecture Specification, April 2014, revision 001.
|
||||
|
||||
Copyright (c) 2014, Intel Corporation. All rights reserved.<BR>
|
||||
Copyright (c) 2014 - 2015, Intel Corporation. All rights reserved.<BR>
|
||||
This program and the accompanying materials
|
||||
are licensed and made available under the terms and conditions of the BSD License
|
||||
which accompanies this distribution. The full text of the license may be found at
|
||||
|
|
@ -16,6 +16,12 @@
|
|||
#ifndef _FSP_INFO_HEADER_H_
|
||||
#define _FSP_INFO_HEADER_H_
|
||||
|
||||
#define FSP_HEADER_REVISION_1 1
|
||||
#define FSP_HEADER_REVISION_2 2
|
||||
|
||||
#define FSPE_HEADER_REVISION_1 1
|
||||
#define FSPP_HEADER_REVISION_1 1
|
||||
|
||||
///
|
||||
/// Fixed FSP header offset in the FSP image
|
||||
///
|
||||
|
|
@ -27,79 +33,125 @@
|
|||
|
||||
typedef struct {
|
||||
///
|
||||
/// Signature ('FSPH') for the FSP Information Header
|
||||
/// Byte 0x00: Signature ('FSPH') for the FSP Information Header
|
||||
///
|
||||
UINT32 Signature;
|
||||
///
|
||||
/// Length of the FSP Information Header
|
||||
/// Byte 0x04: Length of the FSP Information Header
|
||||
///
|
||||
UINT32 HeaderLength;
|
||||
///
|
||||
/// Reserved
|
||||
/// Byte 0x08: Reserved
|
||||
///
|
||||
UINT8 Reserved1[3];
|
||||
///
|
||||
/// Revision of the FSP Information Header
|
||||
/// Byte 0x0B: Revision of the FSP Information Header
|
||||
///
|
||||
UINT8 HeaderRevision;
|
||||
///
|
||||
/// Revision of the FSP binary
|
||||
/// Byte 0x0C: Revision of the FSP binary
|
||||
///
|
||||
UINT32 ImageRevision;
|
||||
|
||||
|
||||
///
|
||||
/// Signature string that will help match the FSP Binary to a supported
|
||||
/// Byte 0x10: Signature string that will help match the FSP Binary to a supported
|
||||
/// hardware configuration.
|
||||
///
|
||||
CHAR8 ImageId[8];
|
||||
///
|
||||
/// Size of the entire FSP binary
|
||||
/// Byte 0x18: Size of the entire FSP binary
|
||||
///
|
||||
UINT32 ImageSize;
|
||||
///
|
||||
/// FSP binary preferred base address
|
||||
/// Byte 0x18: FSP binary preferred base address
|
||||
///
|
||||
UINT32 ImageBase;
|
||||
|
||||
|
||||
///
|
||||
/// Attribute for the FSP binary
|
||||
/// Byte 0x20: Attribute for the FSP binary
|
||||
///
|
||||
UINT32 ImageAttribute;
|
||||
///
|
||||
/// Offset of the FSP configuration region
|
||||
/// Byte 0x24: Offset of the FSP configuration region
|
||||
///
|
||||
UINT32 CfgRegionOffset;
|
||||
///
|
||||
/// Size of the FSP configuration region
|
||||
/// Byte 0x24: Size of the FSP configuration region
|
||||
///
|
||||
UINT32 CfgRegionSize;
|
||||
///
|
||||
/// Number of API entries this FSP supports
|
||||
/// Byte 0x2C: Number of API entries this FSP supports
|
||||
///
|
||||
UINT32 ApiEntryNum;
|
||||
|
||||
|
||||
///
|
||||
/// TempRamInit API entry offset
|
||||
/// Byte 0x30: The offset for the API to setup a temporary stack till the memory
|
||||
/// is initialized.
|
||||
///
|
||||
UINT32 TempRamInitEntryOffset;
|
||||
///
|
||||
/// FspInit API entry offset
|
||||
/// Byte 0x34: The offset for the API to initialize the CPU and the chipset (SOC)
|
||||
///
|
||||
UINT32 FspInitEntryOffset;
|
||||
///
|
||||
/// NotifyPhase API entry offset
|
||||
/// Byte 0x38: The offset for the API to inform the FSP about the different stages
|
||||
/// in the boot process
|
||||
///
|
||||
UINT32 NotifyPhaseEntryOffset;
|
||||
|
||||
///
|
||||
/// Reserved
|
||||
/// Below field is added in FSP 1.1
|
||||
///
|
||||
UINT32 Reserved2;
|
||||
|
||||
///
|
||||
/// Byte 0x3C: The offset for the API to initialize the memory
|
||||
///
|
||||
UINT32 FspMemoryInitEntryOffset;
|
||||
///
|
||||
/// Byte 0x40: The offset for the API to tear down temporary RAM
|
||||
///
|
||||
UINT32 TempRamExitEntryOffset;
|
||||
///
|
||||
/// Byte 0x44: The offset for the API to initialize the CPU and chipset
|
||||
///
|
||||
UINT32 FspSiliconInitEntryOffset;
|
||||
|
||||
} FSP_INFO_HEADER;
|
||||
|
||||
///
|
||||
/// Below structure is added in FSP 1.1
|
||||
///
|
||||
typedef struct {
|
||||
///
|
||||
/// Byte 0x00: Signature ('FSPE') for the FSP Extended Information Header
|
||||
///
|
||||
UINT32 Signature;
|
||||
///
|
||||
/// Byte 0x04: Length of the FSP Extended Header
|
||||
///
|
||||
UINT32 HeaderLength;
|
||||
///
|
||||
/// Byte 0x08: Revision of the FSP Extended Header
|
||||
///
|
||||
UINT8 Revision;
|
||||
///
|
||||
/// Byte 0x09: Reserved for future use.
|
||||
///
|
||||
UINT8 Reserved;
|
||||
///
|
||||
/// Byte 0x0A: An OEM-supplied string that defines the OEM
|
||||
///
|
||||
CHAR8 OemId[6];
|
||||
///
|
||||
/// Byte 0x10: An OEM-supplied revision number. Larger numbers are assumed to be newer revisions.
|
||||
///
|
||||
UINT32 OemRevision;
|
||||
|
||||
} FSP_EXTENTED_HEADER;
|
||||
|
||||
#pragma pack()
|
||||
|
||||
#endif
|
||||
|
|
|
|||
|
|
@ -2,7 +2,7 @@
|
|||
Intel FSP Hob Guid definition from Intel Firmware Support Package External
|
||||
Architecture Specification, April 2014, revision 001.
|
||||
|
||||
Copyright (c) 2014, Intel Corporation. All rights reserved.<BR>
|
||||
Copyright (c) 2014 - 2015, Intel Corporation. All rights reserved.<BR>
|
||||
This program and the accompanying materials
|
||||
are licensed and made available under the terms and conditions of the BSD License
|
||||
which accompanies this distribution. The full text of the license may be found at
|
||||
|
|
@ -16,7 +16,9 @@
|
|||
#ifndef __GUID_HOB_FSP_EAS_GUID__
|
||||
#define __GUID_HOB_FSP_EAS_GUID__
|
||||
|
||||
extern EFI_GUID gFspBootLoaderTemporaryMemoryGuid;
|
||||
extern EFI_GUID gFspBootLoaderTempMemoryGuid;
|
||||
extern EFI_GUID gFspBootLoaderTemporaryMemoryGuid; // Same as gFspBootLoaderTempMemoryGuid
|
||||
|
||||
extern EFI_GUID gFspReservedMemoryResourceHobGuid;
|
||||
extern EFI_GUID gFspNonVolatileStorageHobGuid;
|
||||
|
||||
|
|
|
|||
|
|
@ -1,6 +1,6 @@
|
|||
/** @file
|
||||
|
||||
Copyright (c) 2014, Intel Corporation. All rights reserved.<BR>
|
||||
Copyright (c) 2014 - 2015, Intel Corporation. All rights reserved.<BR>
|
||||
This program and the accompanying materials
|
||||
are licensed and made available under the terms and conditions of the BSD License
|
||||
which accompanies this distribution. The full text of the license may be found at
|
||||
|
|
@ -170,4 +170,37 @@ SetFspMeasurePoint (
|
|||
IN UINT8 Id
|
||||
);
|
||||
|
||||
/**
|
||||
This function gets the FSP info header pointer.
|
||||
|
||||
@retval FspInfoHeader FSP info header pointer
|
||||
**/
|
||||
FSP_INFO_HEADER *
|
||||
EFIAPI
|
||||
GetFspInfoHeader (
|
||||
VOID
|
||||
);
|
||||
|
||||
/**
|
||||
This function gets FSP API calling mode
|
||||
|
||||
@retval API calling mode
|
||||
**/
|
||||
UINT8
|
||||
EFIAPI
|
||||
GetFspApiCallingMode (
|
||||
VOID
|
||||
);
|
||||
|
||||
/**
|
||||
This function sets FSP API calling mode
|
||||
|
||||
@param[in] Mode API calling mode
|
||||
**/
|
||||
VOID
|
||||
EFIAPI
|
||||
SetFspApiCallingMode (
|
||||
UINT8 Mode
|
||||
);
|
||||
|
||||
#endif
|
||||
|
|
|
|||
|
|
@ -1,6 +1,6 @@
|
|||
/** @file
|
||||
|
||||
Copyright (c) 2014, Intel Corporation. All rights reserved.<BR>
|
||||
Copyright (c) 2014 - 2015, Intel Corporation. All rights reserved.<BR>
|
||||
This program and the accompanying materials
|
||||
are licensed and made available under the terms and conditions of the BSD License
|
||||
which accompanies this distribution. The full text of the license may be found at
|
||||
|
|
@ -37,6 +37,16 @@ FspMigrateTemporaryMemory (
|
|||
VOID
|
||||
);
|
||||
|
||||
/**
|
||||
Set a new stack frame for the continuation function
|
||||
|
||||
**/
|
||||
VOID
|
||||
EFIAPI
|
||||
FspSetNewStackFrame (
|
||||
VOID
|
||||
);
|
||||
|
||||
/**
|
||||
This function transfer control to the ContinuationFunc passed in by the
|
||||
bootloader.
|
||||
|
|
|
|||
|
|
@ -1,27 +0,0 @@
|
|||
/** @file
|
||||
|
||||
Copyright (c) 2014, Intel Corporation. All rights reserved.<BR>
|
||||
This program and the accompanying materials
|
||||
are licensed and made available under the terms and conditions of the BSD License
|
||||
which accompanies this distribution. The full text of the license may be found at
|
||||
http://opensource.org/licenses/bsd-license.php.
|
||||
|
||||
THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
|
||||
WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
|
||||
|
||||
**/
|
||||
|
||||
#ifndef _FSP_RETURN_LIB_H_
|
||||
#define _FSP_RETURN_LIB_H_
|
||||
|
||||
/**
|
||||
Return the control from FSP to the Caller.
|
||||
|
||||
**/
|
||||
VOID
|
||||
EFIAPI
|
||||
AsmFspReturn (
|
||||
VOID
|
||||
);
|
||||
|
||||
#endif
|
||||
|
|
@ -1,6 +1,6 @@
|
|||
/** @file
|
||||
|
||||
Copyright (c) 2014, Intel Corporation. All rights reserved.<BR>
|
||||
Copyright (c) 2014 - 2015, Intel Corporation. All rights reserved.<BR>
|
||||
This program and the accompanying materials
|
||||
are licensed and made available under the terms and conditions of the BSD License
|
||||
which accompanies this distribution. The full text of the license may be found at
|
||||
|
|
@ -34,6 +34,8 @@ typedef struct {
|
|||
FSP_PLAT_DATA PlatformData;
|
||||
FSP_INFO_HEADER *FspInfoHeader;
|
||||
VOID *UpdDataRgnPtr;
|
||||
UINT8 ApiMode;
|
||||
UINT8 Reserved[3];
|
||||
UINT32 PerfIdx;
|
||||
UINT64 PerfData[32];
|
||||
// UINT64 PerfData[FixedPcdGet32(PcdFspMaxPerfEntry)];
|
||||
|
|
|
|||
|
|
@ -1,6 +1,6 @@
|
|||
/** @file
|
||||
|
||||
Copyright (c) 2014, Intel Corporation. All rights reserved.<BR>
|
||||
Copyright (c) 2014 - 2015, Intel Corporation. All rights reserved.<BR>
|
||||
This program and the accompanying materials
|
||||
are licensed and made available under the terms and conditions of the BSD License
|
||||
which accompanies this distribution. The full text of the license may be found at
|
||||
|
|
@ -25,6 +25,7 @@ typedef struct {
|
|||
UINT8 Reserved;
|
||||
UINT32 PatchEntryNum;
|
||||
UINT32 PatchData[FixedPcdGet32(PcdFspMaxPatchEntry)];
|
||||
UINT32 VpdBase;
|
||||
} FSP_PATCH_TABLE;
|
||||
|
||||
#pragma pack()
|
||||
|
|
|
|||
|
|
@ -21,6 +21,25 @@
|
|||
[Includes]
|
||||
Include
|
||||
Include/Private
|
||||
|
||||
[LibraryClasses]
|
||||
## @libraryclass Provides cache-as-ram support.
|
||||
CacheAsRamLib|IntelFspPkg/Include/Library/CacheAsRamLib.h
|
||||
|
||||
## @libraryclass Provides cache setting on MTRR.
|
||||
CacheLib|IntelFspPkg/Include/Library/CacheLib.h
|
||||
|
||||
## @libraryclass Provides debug device abstraction.
|
||||
DebugDeviceLib|IntelFspPkg/Include/Library/DebugDeviceLib.h
|
||||
|
||||
## @libraryclass Provides FSP related services.
|
||||
FspCommonLib|IntelFspPkg/Include/Library/FspCommonLib.h
|
||||
|
||||
## @libraryclass Provides FSP platform related actions.
|
||||
FspPlatformLib|IntelFspPkg/Include/Library/FspPlatformLib.h
|
||||
|
||||
## @libraryclass Provides FSP switch stack function.
|
||||
FspSwitchStackLib|IntelFspPkg/Include/Library/FspSwitchStackLib.h
|
||||
|
||||
[Guids]
|
||||
#
|
||||
|
|
@ -30,6 +49,7 @@
|
|||
|
||||
# Guid define in FSP EAS
|
||||
gFspHeaderFileGuid = { 0x912740BE, 0x2284, 0x4734, { 0xB9, 0x71, 0x84, 0xB0, 0x27, 0x35, 0x3F, 0x0C } }
|
||||
gFspBootLoaderTempMemoryGuid = { 0xbbcff46c, 0xc8d3, 0x4113, { 0x89, 0x85, 0xb9, 0xd4, 0xf3, 0xb3, 0xf6, 0x4e } }
|
||||
gFspBootLoaderTemporaryMemoryGuid = { 0xbbcff46c, 0xc8d3, 0x4113, { 0x89, 0x85, 0xb9, 0xd4, 0xf3, 0xb3, 0xf6, 0x4e } }
|
||||
gFspReservedMemoryResourceHobGuid = { 0x69a79759, 0x1373, 0x4367, { 0xa6, 0xc4, 0xc7, 0xf5, 0x9e, 0xfd, 0x98, 0x6e } }
|
||||
gFspNonVolatileStorageHobGuid = { 0x721acf02, 0x4d77, 0x4c2a, { 0xb3, 0xdc, 0x27, 0x0b, 0x7b, 0xa9, 0xe4, 0xb0 } }
|
||||
|
|
|
|||
|
|
@ -1,6 +1,6 @@
|
|||
/** @file
|
||||
|
||||
Copyright (c) 2014, Intel Corporation. All rights reserved.<BR>
|
||||
Copyright (c) 2014 - 2015, Intel Corporation. All rights reserved.<BR>
|
||||
This program and the accompanying materials
|
||||
are licensed and made available under the terms and conditions of the BSD License
|
||||
which accompanies this distribution. The full text of the license may be found at
|
||||
|
|
@ -316,3 +316,49 @@ SetFspMeasurePoint (
|
|||
|
||||
return FspData->PerfData[(FspData->PerfIdx)++];
|
||||
}
|
||||
|
||||
/**
|
||||
This function gets the FSP info header pointer.
|
||||
|
||||
@retval FspInfoHeader FSP info header pointer
|
||||
**/
|
||||
FSP_INFO_HEADER *
|
||||
EFIAPI
|
||||
GetFspInfoHeader (
|
||||
VOID
|
||||
)
|
||||
{
|
||||
return GetFspGlobalDataPointer()->FspInfoHeader;
|
||||
}
|
||||
|
||||
/**
|
||||
This function gets FSP API calling mode
|
||||
|
||||
@retval API calling mode
|
||||
**/
|
||||
UINT8
|
||||
EFIAPI
|
||||
GetFspApiCallingMode (
|
||||
VOID
|
||||
)
|
||||
{
|
||||
return GetFspGlobalDataPointer()->ApiMode;
|
||||
}
|
||||
|
||||
/**
|
||||
This function sets FSP API calling mode
|
||||
|
||||
@param[in] Mode API calling mode
|
||||
**/
|
||||
VOID
|
||||
EFIAPI
|
||||
SetFspApiCallingMode (
|
||||
UINT8 Mode
|
||||
)
|
||||
{
|
||||
FSP_GLOBAL_DATA *FspData;
|
||||
|
||||
FspData = GetFspGlobalDataPointer ();
|
||||
FspData->ApiMode = Mode;
|
||||
}
|
||||
|
||||
|
|
|
|||
|
|
@ -30,6 +30,7 @@
|
|||
|
||||
[LibraryClasses]
|
||||
BaseMemoryLib
|
||||
MemoryAllocationLib
|
||||
|
||||
[Pcd]
|
||||
gIntelFspPkgTokenSpaceGuid.PcdGlobalDataPointerAddress ## CONSUMES
|
||||
|
|
@ -38,7 +39,7 @@
|
|||
gIntelFspPkgTokenSpaceGuid.PcdFspTemporaryRamSize ## CONSUMES
|
||||
|
||||
[Guids]
|
||||
gFspBootLoaderTemporaryMemoryGuid ## PRODUCES ## HOB
|
||||
gFspBootLoaderTempMemoryGuid ## PRODUCES ## HOB
|
||||
|
||||
[FixedPcd]
|
||||
gIntelFspPkgTokenSpaceGuid.PcdFspMaxPatchEntry ## CONSUMES
|
||||
|
|
|
|||
|
|
@ -1,6 +1,6 @@
|
|||
/** @file
|
||||
|
||||
Copyright (c) 2014, Intel Corporation. All rights reserved.<BR>
|
||||
Copyright (c) 2014 - 2015, Intel Corporation. All rights reserved.<BR>
|
||||
This program and the accompanying materials
|
||||
are licensed and made available under the terms and conditions of the BSD License
|
||||
which accompanies this distribution. The full text of the license may be found at
|
||||
|
|
@ -14,6 +14,7 @@
|
|||
#include <PiPei.h>
|
||||
#include <Library/BaseLib.h>
|
||||
#include <Library/BaseMemoryLib.h>
|
||||
#include <Library/MemoryAllocationLib.h>
|
||||
#include <Library/DebugLib.h>
|
||||
#include <Library/PcdLib.h>
|
||||
#include <Library/HobLib.h>
|
||||
|
|
@ -76,17 +77,20 @@ FspMigrateTemporaryMemory (
|
|||
VOID
|
||||
)
|
||||
{
|
||||
FSP_INIT_RT_COMMON_BUFFER *FspInitRtBuffer;
|
||||
UINT32 BootLoaderTempRamStart;
|
||||
UINT32 BootLoaderTempRamEnd;
|
||||
UINT32 BootLoaderTempRamSize;
|
||||
UINT32 OffsetGap;
|
||||
UINT32 FspParamPtr;
|
||||
FSP_INIT_PARAMS *FspInitParams;
|
||||
UINT32 *NewStackTop;
|
||||
VOID *BootLoaderTempRamHob;
|
||||
VOID *UpdDataRgnPtr;
|
||||
VOID *PlatformDataPtr;
|
||||
FSP_INIT_RT_COMMON_BUFFER *FspInitRtBuffer;
|
||||
UINT32 BootLoaderTempRamStart;
|
||||
UINT32 BootLoaderTempRamEnd;
|
||||
UINT32 BootLoaderTempRamSize;
|
||||
UINT32 OffsetGap;
|
||||
UINT32 FspParamPtr;
|
||||
FSP_INIT_PARAMS *FspInitParams;
|
||||
UINT32 *NewStackTop;
|
||||
VOID *BootLoaderTempRamHob;
|
||||
VOID *UpdDataRgnPtr;
|
||||
VOID *PlatformDataPtr;
|
||||
UINT8 ApiMode;
|
||||
|
||||
ApiMode = GetFspApiCallingMode ();
|
||||
|
||||
//
|
||||
// Get the temporary memory range used by the bootloader
|
||||
|
|
@ -98,17 +102,24 @@ FspMigrateTemporaryMemory (
|
|||
//
|
||||
// Build a Boot Loader Temporary Memory GUID HOB
|
||||
//
|
||||
BootLoaderTempRamHob = BuildGuidHob (&gFspBootLoaderTemporaryMemoryGuid, BootLoaderTempRamSize);
|
||||
if (ApiMode == 0) {
|
||||
BootLoaderTempRamHob = BuildGuidHob (&gFspBootLoaderTempMemoryGuid, BootLoaderTempRamSize);
|
||||
} else {
|
||||
BootLoaderTempRamHob = (VOID *)AllocatePool (BootLoaderTempRamSize);
|
||||
}
|
||||
|
||||
CopyMem (BootLoaderTempRamHob, (VOID *)BootLoaderTempRamStart, BootLoaderTempRamSize);
|
||||
OffsetGap = (UINT32)BootLoaderTempRamHob - BootLoaderTempRamStart;
|
||||
|
||||
//
|
||||
// Set a new stack frame for the continuation function
|
||||
//
|
||||
FspInitParams = (FSP_INIT_PARAMS *)GetFspApiParameter ();
|
||||
FspInitRtBuffer = (FSP_INIT_RT_COMMON_BUFFER *)FspInitParams->RtBufferPtr;
|
||||
NewStackTop = (UINT32 *)FspInitRtBuffer->StackTop - 1;
|
||||
SetFspCoreStackPointer (NewStackTop);
|
||||
if (ApiMode == 0) {
|
||||
FspInitParams = (FSP_INIT_PARAMS *)GetFspApiParameter ();
|
||||
FspInitRtBuffer = (FSP_INIT_RT_COMMON_BUFFER *)FspInitParams->RtBufferPtr;
|
||||
NewStackTop = (UINT32 *)FspInitRtBuffer->StackTop - 1;
|
||||
SetFspCoreStackPointer (NewStackTop);
|
||||
}
|
||||
|
||||
//
|
||||
// Fix the FspInit Parameter Pointers to the new location.
|
||||
|
|
@ -151,5 +162,4 @@ FspMigrateTemporaryMemory (
|
|||
((UINT32)PlatformDataPtr < BootLoaderTempRamEnd)) {
|
||||
SetFspPlatformDataPointer ((UINT8 *)PlatformDataPtr + OffsetGap);
|
||||
}
|
||||
|
||||
}
|
||||
|
|
|
|||
|
|
@ -1,6 +1,6 @@
|
|||
/** @file
|
||||
|
||||
Copyright (c) 2014, Intel Corporation. All rights reserved.<BR>
|
||||
Copyright (c) 2014 - 2015, Intel Corporation. All rights reserved.<BR>
|
||||
This program and the accompanying materials
|
||||
are licensed and made available under the terms and conditions of the BSD License
|
||||
which accompanies this distribution. The full text of the license may be found at
|
||||
|
|
@ -98,26 +98,43 @@ FspInitDone (
|
|||
VOID
|
||||
)
|
||||
{
|
||||
FSP_INIT_PARAMS *FspInitParams;
|
||||
FSP_INIT_PARAMS *FspInitParams;
|
||||
|
||||
FspInitParams = (FSP_INIT_PARAMS *)GetFspApiParameter ();
|
||||
if (GetFspApiCallingMode() == 0) {
|
||||
//
|
||||
// FspInit API is used, so jump into the ContinuationFunc
|
||||
//
|
||||
FspInitParams = (FSP_INIT_PARAMS *)GetFspApiParameter ();
|
||||
|
||||
//
|
||||
// Modify the parameters for ContinuationFunc
|
||||
//
|
||||
SetFspContinuationFuncParameter(EFI_SUCCESS, 0);
|
||||
SetFspContinuationFuncParameter((UINT32)GetHobList(), 1);
|
||||
|
||||
//
|
||||
// Modify the return address to ContinuationFunc
|
||||
//
|
||||
SetFspApiReturnAddress((UINT32)FspInitParams->ContinuationFunc);
|
||||
|
||||
//
|
||||
// Give control back to the boot loader framework caller after FspInit is done
|
||||
// It is done throught the continuation function
|
||||
//
|
||||
SetFspMeasurePoint (FSP_PERF_ID_API_FSPINIT_EXIT);
|
||||
} else {
|
||||
//
|
||||
// FspMemoryInit API is used, so return directly
|
||||
//
|
||||
|
||||
//
|
||||
// Modify the parameters for ContinuationFunc
|
||||
//
|
||||
SetFspContinuationFuncParameter(EFI_SUCCESS, 0);
|
||||
SetFspContinuationFuncParameter((UINT32)GetHobList(), 1);
|
||||
//
|
||||
// This is the end of the FspSiliconInit API
|
||||
// Give control back to the boot loader
|
||||
//
|
||||
DEBUG ((DEBUG_INFO | DEBUG_INIT, "FspSiliconInitApi() - End\n"));
|
||||
SetFspApiReturnStatus (EFI_SUCCESS);
|
||||
}
|
||||
|
||||
//
|
||||
// Modify the return address to ContinuationFunc
|
||||
//
|
||||
SetFspApiReturnAddress((UINT32)FspInitParams->ContinuationFunc);
|
||||
|
||||
//
|
||||
// Give control back to the boot loader framework caller after FspInit is done
|
||||
// It is done throught the continuation function
|
||||
//
|
||||
SetFspMeasurePoint (FSP_PERF_ID_API_FSPINIT_EXIT);
|
||||
Pei2LoaderSwitchStack();
|
||||
}
|
||||
|
||||
|
|
@ -151,12 +168,14 @@ FspWaitForNotify (
|
|||
//
|
||||
// Notify code does not follow the predefined order
|
||||
//
|
||||
DEBUG ((DEBUG_INFO, "Unsupported FSP Notification Value\n"));
|
||||
SetFspApiReturnStatus(EFI_UNSUPPORTED);
|
||||
} else {
|
||||
//
|
||||
// Process Notification and Give control back to the boot loader framework caller
|
||||
//
|
||||
Status = FspNotificationHandler (NotificationValue);
|
||||
DEBUG ((DEBUG_INFO, "FSP Notification Handler Returns : 0x%08X\n", Status));
|
||||
SetFspApiReturnStatus(Status);
|
||||
if (!EFI_ERROR(Status)) {
|
||||
NotificationCount++;
|
||||
|
|
|
|||
|
|
@ -1,6 +1,6 @@
|
|||
#------------------------------------------------------------------------------
|
||||
#
|
||||
# Copyright (c) 2014, Intel Corporation. All rights reserved.<BR>
|
||||
# Copyright (c) 2014 - 2015, Intel Corporation. All rights reserved.<BR>
|
||||
# This program and the accompanying materials
|
||||
# are licensed and made available under the terms and conditions of the BSD License
|
||||
# which accompanies this distribution. The full text of the license may be found at
|
||||
|
|
@ -15,8 +15,6 @@
|
|||
#
|
||||
#------------------------------------------------------------------------------
|
||||
|
||||
ASM_GLOBAL ASM_PFX(Pei2LoaderSwitchStack)
|
||||
ASM_GLOBAL ASM_PFX(Loader2PeiSwitchStack)
|
||||
|
||||
#------------------------------------------------------------------------------
|
||||
# UINT32
|
||||
|
|
@ -37,27 +35,30 @@ ASM_PFX(Pei2LoaderSwitchStack):
|
|||
#------------------------------------------------------------------------------
|
||||
ASM_GLOBAL ASM_PFX(Loader2PeiSwitchStack)
|
||||
ASM_PFX(Loader2PeiSwitchStack):
|
||||
#Save current contexts
|
||||
#
|
||||
#Save current contexts
|
||||
#
|
||||
push $exit
|
||||
pushf
|
||||
pushf
|
||||
cli
|
||||
pusha
|
||||
push $0x0
|
||||
push $0x0
|
||||
sub $0x08, %esp
|
||||
sidt (%esp)
|
||||
|
||||
#
|
||||
# Load new stack
|
||||
#
|
||||
push %esp
|
||||
call ASM_PFX(SwapStack)
|
||||
mov %eax,%esp
|
||||
movl %eax, %esp
|
||||
|
||||
#
|
||||
# Restore previous contexts
|
||||
#
|
||||
lidt (%esp)
|
||||
add $8,%esp
|
||||
add $0x08,%esp
|
||||
popa
|
||||
popf
|
||||
popf
|
||||
exit:
|
||||
ret
|
||||
|
||||
|
|
|
|||
|
|
@ -1,6 +1,6 @@
|
|||
## @ GenCfgOpt.py
|
||||
#
|
||||
# Copyright (c) 2014, Intel Corporation. All rights reserved.<BR>
|
||||
# Copyright (c) 2014 - 2015, Intel Corporation. All rights reserved.<BR>
|
||||
# This program and the accompanying materials are licensed and made available under
|
||||
# the terms and conditions of the BSD License that accompanies this distribution.
|
||||
# The full text of the license may be found at
|
||||
|
|
@ -254,9 +254,10 @@ EndList
|
|||
ElifStack[-1] = ElifStack[-1] + 1
|
||||
else:
|
||||
if len(DscLine) > 0 and DscLine[0] == '!':
|
||||
self.Error = "Invalid DscLine '%s'" % DscLine
|
||||
Error = 3
|
||||
break;
|
||||
#
|
||||
# Current it can only handle build switch.
|
||||
# It does not support INF file in included dsc.
|
||||
#
|
||||
else:
|
||||
if reduce(lambda x,y: x and y, IfStack):
|
||||
Handle = True
|
||||
|
|
|
|||
Loading…
Reference in New Issue