mirror of https://github.com/acidanthera/audk.git
UefiCpuPkg: Rollback field name changes
Roll back commit 56649f4301
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The original names follows the spec definition.
Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Jian J Wang <jian.j.wang@intel.com>
Reviewed-by: Liming Gao <liming.gao@intel.com>
This commit is contained in:
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3ab032fc0f
commit
d69ba6a729
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@ -216,7 +216,7 @@ ArchSetupExcpetionStack (
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TssDesc->Bits.BaseLow = (UINT16)TssBase;
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TssDesc->Bits.BaseLow = (UINT16)TssBase;
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TssDesc->Bits.BaseMid = (UINT8)(TssBase >> 16);
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TssDesc->Bits.BaseMid = (UINT8)(TssBase >> 16);
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TssDesc->Bits.Type = IA32_GDT_TYPE_TSS;
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TssDesc->Bits.Type = IA32_GDT_TYPE_TSS;
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TssDesc->Bits.Present = 1;
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TssDesc->Bits.P = 1;
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TssDesc->Bits.LimitHigh = 0;
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TssDesc->Bits.LimitHigh = 0;
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TssDesc->Bits.BaseHigh = (UINT8)(TssBase >> 24);
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TssDesc->Bits.BaseHigh = (UINT8)(TssBase >> 24);
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@ -240,7 +240,7 @@ ArchSetupExcpetionStack (
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TssDesc->Bits.BaseLow = (UINT16)TssBase;
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TssDesc->Bits.BaseLow = (UINT16)TssBase;
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TssDesc->Bits.BaseMid = (UINT8)(TssBase >> 16);
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TssDesc->Bits.BaseMid = (UINT8)(TssBase >> 16);
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TssDesc->Bits.Type = IA32_GDT_TYPE_TSS;
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TssDesc->Bits.Type = IA32_GDT_TYPE_TSS;
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TssDesc->Bits.Present = 1;
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TssDesc->Bits.P = 1;
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TssDesc->Bits.LimitHigh = 0;
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TssDesc->Bits.LimitHigh = 0;
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TssDesc->Bits.BaseHigh = (UINT8)(TssBase >> 24);
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TssDesc->Bits.BaseHigh = (UINT8)(TssBase >> 24);
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@ -253,17 +253,17 @@ ArchSetupExcpetionStack (
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continue;
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continue;
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}
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}
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Tss->Eip = (UINT32)(TemplateMap.ExceptionStart
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Tss->EIP = (UINT32)(TemplateMap.ExceptionStart
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+ Vector * TemplateMap.ExceptionStubHeaderSize);
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+ Vector * TemplateMap.ExceptionStubHeaderSize);
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Tss->Eflags = 0x2;
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Tss->EFLAGS = 0x2;
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Tss->Esp = StackTop;
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Tss->ESP = StackTop;
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Tss->Cr3 = AsmReadCr3 ();
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Tss->CR3 = AsmReadCr3 ();
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Tss->Es = AsmReadEs ();
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Tss->ES = AsmReadEs ();
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Tss->Cs = AsmReadCs ();
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Tss->CS = AsmReadCs ();
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Tss->Ss = AsmReadSs ();
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Tss->SS = AsmReadSs ();
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Tss->Ds = AsmReadDs ();
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Tss->DS = AsmReadDs ();
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Tss->Fs = AsmReadFs ();
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Tss->FS = AsmReadFs ();
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Tss->Gs = AsmReadGs ();
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Tss->GS = AsmReadGs ();
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StackTop -= StackSwitchData->Ia32.KnownGoodStackSize;
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StackTop -= StackSwitchData->Ia32.KnownGoodStackSize;
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@ -186,7 +186,7 @@ ArchSetupExcpetionStack (
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//
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//
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TssDesc = StackSwitchData->X64.ExceptionTssDesc;
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TssDesc = StackSwitchData->X64.ExceptionTssDesc;
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Tss = StackSwitchData->X64.ExceptionTss;
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Tss = StackSwitchData->X64.ExceptionTss;
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if (StackSwitchData->X64.StackSwitchExceptionNumber > ARRAY_SIZE (Tss->Ist)) {
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if (StackSwitchData->X64.StackSwitchExceptionNumber > ARRAY_SIZE (Tss->IST)) {
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return EFI_INVALID_PARAMETER;
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return EFI_INVALID_PARAMETER;
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}
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}
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@ -221,7 +221,7 @@ ArchSetupExcpetionStack (
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TssDesc->Bits.BaseLow = (UINT16)TssBase;
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TssDesc->Bits.BaseLow = (UINT16)TssBase;
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TssDesc->Bits.BaseMidl = (UINT8)(TssBase >> 16);
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TssDesc->Bits.BaseMidl = (UINT8)(TssBase >> 16);
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TssDesc->Bits.Type = IA32_GDT_TYPE_TSS;
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TssDesc->Bits.Type = IA32_GDT_TYPE_TSS;
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TssDesc->Bits.Present = 1;
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TssDesc->Bits.P = 1;
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TssDesc->Bits.LimitHigh = 0;
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TssDesc->Bits.LimitHigh = 0;
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TssDesc->Bits.BaseMidh = (UINT8)(TssBase >> 24);
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TssDesc->Bits.BaseMidh = (UINT8)(TssBase >> 24);
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TssDesc->Bits.BaseHigh = (UINT32)(TssBase >> 32);
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TssDesc->Bits.BaseHigh = (UINT32)(TssBase >> 32);
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@ -236,7 +236,7 @@ ArchSetupExcpetionStack (
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//
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//
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// Fixup IST
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// Fixup IST
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//
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//
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Tss->Ist[Index] = StackTop;
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Tss->IST[Index] = StackTop;
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StackTop -= StackSwitchData->X64.KnownGoodStackSize;
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StackTop -= StackSwitchData->X64.KnownGoodStackSize;
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//
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//
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@ -243,7 +243,7 @@ RestoreVolatileRegisters (
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VolatileRegisters->Tr < VolatileRegisters->Gdtr.Limit) {
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VolatileRegisters->Tr < VolatileRegisters->Gdtr.Limit) {
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Tss = (IA32_TSS_DESCRIPTOR *)(VolatileRegisters->Gdtr.Base +
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Tss = (IA32_TSS_DESCRIPTOR *)(VolatileRegisters->Gdtr.Base +
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VolatileRegisters->Tr);
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VolatileRegisters->Tr);
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if (Tss->Bits.Present == 1) {
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if (Tss->Bits.P == 1) {
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Tss->Bits.Type &= 0xD; // 1101 - Clear busy bit just in case
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Tss->Bits.Type &= 0xD; // 1101 - Clear busy bit just in case
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AsmWriteTr (VolatileRegisters->Tr);
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AsmWriteTr (VolatileRegisters->Tr);
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}
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}
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