mirror of https://github.com/acidanthera/audk.git
OvmfPkg: QemuBootOrderLib: recognize NVMe devices
This patch enables QemuBootOrderLib to parse OFW device paths formatted by QEMU commit a907ec52cc1a: nvme: generate OpenFirmware device path in the "bootorder" fw_cfg file With both patches applied, OVMF will honor the bootindex=N property of the NVMe device: -drive id=drive0,if=none,format=FORMAT,file=PATHNAME \ -device nvme,drive=drive0,serial=SERIAL,bootindex=N ^^^^^^^^^^^ Cc: Vladislav Vovchenko <vladislav.vovchenko@sk.com> Cc: Jordan Justen <jordan.l.justen@intel.com> Reference: https://github.com/tianocore/edk2/issues/48 Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Laszlo Ersek <lersek@redhat.com> Reviewed-by: Jordan Justen <jordan.l.justen@intel.com> Tested-by: Vladislav Vovchenko <vladislav.vovchenko@sk.com> git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@19792 6f19259b-4bc3-4df7-8a09-765794883524
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@ -931,6 +931,61 @@ TranslatePciOfwNodes (
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TargetLun[0],
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TargetLun[0],
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TargetLun[1]
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TargetLun[1]
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);
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);
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} else if (NumNodes >= FirstNonBridge + 2 &&
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SubstringEq (OfwNode[FirstNonBridge + 0].DriverName, "pci8086,5845") &&
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SubstringEq (OfwNode[FirstNonBridge + 1].DriverName, "namespace")
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) {
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//
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// OpenFirmware device path (NVMe device):
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//
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// /pci@i0cf8/pci8086,5845@6[,1]/namespace@1,0
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// ^ ^ ^ ^ ^
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// | | | | Extended Unique Identifier
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// | | | | (EUI-64), big endian interp.
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// | | | namespace ID
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// | PCI slot & function holding NVMe controller
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// PCI root at system bus port, PIO
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//
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// UEFI device path:
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//
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// PciRoot(0x0)/Pci(0x6,0x1)/NVMe(0x1,00-00-00-00-00-00-00-00)
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// ^ ^
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// | octets of the EUI-64
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// | in address order
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// namespace ID
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//
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UINT64 Namespace[2];
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UINTN RequiredEntries;
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UINT8 *Eui64;
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RequiredEntries = sizeof (Namespace) / sizeof (Namespace[0]);
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NumEntries = RequiredEntries;
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if (ParseUnitAddressHexList (
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OfwNode[FirstNonBridge + 1].UnitAddress,
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Namespace,
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&NumEntries
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) != RETURN_SUCCESS ||
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NumEntries != RequiredEntries ||
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Namespace[0] == 0 ||
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Namespace[0] >= MAX_UINT32
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) {
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return RETURN_UNSUPPORTED;
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}
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Eui64 = (UINT8 *)&Namespace[1];
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Written = UnicodeSPrintAsciiFormat (
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Translated,
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*TranslatedSize * sizeof (*Translated), // BufferSize in bytes
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"PciRoot(0x%x)%s/Pci(0x%Lx,0x%Lx)/"
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"NVMe(0x%Lx,%02x-%02x-%02x-%02x-%02x-%02x-%02x-%02x)",
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PciRoot,
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Bridges,
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PciDevFun[0],
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PciDevFun[1],
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Namespace[0],
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Eui64[7], Eui64[6], Eui64[5], Eui64[4],
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Eui64[3], Eui64[2], Eui64[1], Eui64[0]
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);
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} else {
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} else {
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//
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//
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// Generic OpenFirmware device path for PCI devices:
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// Generic OpenFirmware device path for PCI devices:
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