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ArmPkg: Removed the non-used PCD PcdGicPrimaryCoreId 

Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Olivier Martin <olivier.martin@arm.com>



git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@14480 6f19259b-4bc3-4df7-8a09-765794883524
This commit is contained in:
Olivier Martin 2013-07-17 06:26:10 +00:00 committed by oliviermartin
parent a1cca63885
commit da275244e3
8 changed files with 0 additions and 29 deletions
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4
ArmPkg/ArmPkg.dec
View File

@ -147,10 +147,6 @@
gArmTokenSpaceGuid.PcdArmPrimaryCoreMask|0xF03|UINT32|0x00000031
# The Primary Core is ClusterId[0] & CoreId[0]
gArmTokenSpaceGuid.PcdArmPrimaryCore|0|UINT32|0x00000037
# Number of the CPU Interface for the Primary Core (eg: The number for the CPU0 of
# Cluster1 might be 4 if the implementer had followed the convention: Cpu Interface
# = 4 * Cluster)
gArmTokenSpaceGuid.PcdGicPrimaryCoreId|0|UINT32|0x00000043
#
# ARM L2x0 PCDs

7
ArmPkg/Drivers/PL390Gic/PL390GicDxe.c
View File

@ -346,13 +346,6 @@ InterruptDxeInitialize (
EFI_CPU_ARCH_PROTOCOL *Cpu;
UINT32 CpuTarget;
// Check PcdGicPrimaryCoreId has been set in case the Primary Core is not the core 0 of Cluster 0
DEBUG_CODE_BEGIN();
if ((PcdGet32(PcdArmPrimaryCore) != 0) && (PcdGet32 (PcdGicPrimaryCoreId) == 0)) {
DEBUG((EFI_D_WARN,"Warning: the PCD PcdGicPrimaryCoreId does not seem to be set up for the configuration.\n"));
}
DEBUG_CODE_END();
// Make sure the Interrupt Controller Protocol is not already installed in the system.
ASSERT_PROTOCOL_ALREADY_INSTALLED (NULL, &gHardwareInterruptProtocolGuid);

1
ArmPkg/Drivers/PL390Gic/PL390GicDxe.inf
View File

@ -51,7 +51,6 @@
gArmTokenSpaceGuid.PcdGicInterruptInterfaceBase
gArmTokenSpaceGuid.PcdArmPrimaryCore
gArmTokenSpaceGuid.PcdGicPrimaryCoreId
[Depex]
gEfiCpuArchProtocolGuid

1
ArmPlatformPkg/ArmVExpressPkg/ArmVExpress-CTA15-A7.dsc
View File

@ -122,7 +122,6 @@
# A7_1 = 0x101, GicCoreId = 3
# A7_2 = 0x102, GicCoreId = 4
gArmTokenSpaceGuid.PcdArmPrimaryCore|0x100
gArmTokenSpaceGuid.PcdGicPrimaryCoreId|2
!endif
#

7
ArmPlatformPkg/PrePeiCore/MainMPCore.c
View File

@ -110,13 +110,6 @@ PrimaryMain (
UINTN TemporaryRamBase;
UINTN TemporaryRamSize;
// Check PcdGicPrimaryCoreId has been set in case the Primary Core is not the core 0 of Cluster 0
DEBUG_CODE_BEGIN();
if ((PcdGet32(PcdArmPrimaryCore) != 0) && (PcdGet32 (PcdGicPrimaryCoreId) == 0)) {
DEBUG((EFI_D_WARN,"Warning: the PCD PcdGicPrimaryCoreId does not seem to be set up for the configuration.\n"));
}
DEBUG_CODE_END();
CreatePpiList (&PpiListSize, &PpiList);
// Enable the GIC Distributor

1
ArmPlatformPkg/PrePeiCore/PrePeiCoreMPCore.inf
View File

@ -63,7 +63,6 @@
gArmTokenSpaceGuid.PcdFvSize
gArmTokenSpaceGuid.PcdArmPrimaryCore
gArmTokenSpaceGuid.PcdGicPrimaryCoreId
gArmPlatformTokenSpaceGuid.PcdCPUCoresStackBase
gArmPlatformTokenSpaceGuid.PcdCPUCorePrimaryStackSize

7
ArmPlatformPkg/PrePi/MainMPCore.c
View File

@ -26,13 +26,6 @@ PrimaryMain (
IN UINT64 StartTimeStamp
)
{
// Check PcdGicPrimaryCoreId has been set in case the Primary Core is not the core 0 of Cluster 0
DEBUG_CODE_BEGIN();
if ((PcdGet32(PcdArmPrimaryCore) != 0) && (PcdGet32 (PcdGicPrimaryCoreId) == 0)) {
DEBUG((EFI_D_WARN,"Warning: the PCD PcdGicPrimaryCoreId does not seem to be set up for the configuration.\n"));
}
DEBUG_CODE_END();
// Enable the GIC Distributor
ArmGicEnableDistributor(PcdGet32(PcdGicDistributorBase));

1
ArmPlatformPkg/PrePi/PeiMPCore.inf
View File

@ -96,7 +96,6 @@
gArmPlatformTokenSpaceGuid.PcdCoreCount
gArmPlatformTokenSpaceGuid.PcdClusterCount
gArmTokenSpaceGuid.PcdArmPrimaryCore
gArmTokenSpaceGuid.PcdGicPrimaryCoreId
gEmbeddedTokenSpaceGuid.PcdPrePiCpuMemorySize
gEmbeddedTokenSpaceGuid.PcdPrePiCpuIoSize